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authorPeter Chen <peter.chen@nxp.com>2016-02-01 14:28:57 +0800
committerPeter Chen <peter.chen@nxp.com>2016-02-29 13:37:51 +0800
commit4670ba6c9e6334d6d518d52499628f6bcb08fa95 (patch)
tree36ffc738a4af2d63a5536465528b88b83993ccb9 /Documentation/devicetree/bindings/usb
parentaa7381876cf74d77fd48cb9569444f905cdb31c8 (diff)
downloadop-kernel-dev-4670ba6c9e6334d6d518d52499628f6bcb08fa95.zip
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doc: usb: ci-hdrc-usb2: add property non-zero-ttctrl-ttha
If this property is not set, the max packet size is 1023 bytes, and if the total of packet size for pervious transactions are more than 256 bytes, it can't accept any transactions within this frame. The use case is single transaction, but higher frame rate. If this property is set, the max packet size is 188 bytes, it can handle more transactions than above case, it can accept transactions until it considers the left room size within frame is less than 188 bytes, software needs to make sure it does not send more than 90% maximum_periodic_data_per_frame. The use case is multiple transactions, but less frame rate. Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/usb')
-rw-r--r--Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
index 1e83509..1084e2b 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
@@ -60,6 +60,22 @@ Optional properties:
be specified.
- phy-clkgate-delay-us: the delay time (us) between putting the PHY into
low power mode and gating the PHY clock.
+- non-zero-ttctrl-ttha: after setting this property, the value of register
+ ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default
+ value. It needs to be very carefully for setting this property, it is
+ recommended that consult with your IC engineer before setting this value.
+ On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this
+ property only affects siTD.
+ If this property is not set, the max packet size is 1023 bytes, and if
+ the total of packet size for pervious transactions are more than 256 bytes,
+ it can't accept any transactions within this frame. The use case is single
+ transaction, but higher frame rate.
+ If this property is set, the max packet size is 188 bytes, it can handle
+ more transactions than above case, it can accept transactions until it
+ considers the left room size within frame is less than 188 bytes, software
+ needs to make sure it does not send more than 90%
+ maximum_periodic_data_per_frame. The use case is multiple transactions, but
+ less frame rate.
i.mx specific properties
- fsl,usbmisc: phandler of non-core register device, with one
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