diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-11-07 12:01:48 +0100 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-12-11 11:37:50 +0100 |
commit | 67905540e8b8eaf51e621cfd2ef15641d6d5b9a7 (patch) | |
tree | e5f34ff5d62c075201fcd2337383cbac66183c50 /Documentation/devicetree/bindings/timer | |
parent | 5df9affb50a09e0cb571c4fa3e2d577db85c7475 (diff) | |
download | op-kernel-dev-67905540e8b8eaf51e621cfd2ef15641d6d5b9a7.zip op-kernel-dev-67905540e8b8eaf51e621cfd2ef15641d6d5b9a7.tar.gz |
clocksource: Add Allwinner SoCs HS timers driver
Most of the Allwinner SoCs (at this time, all but the A10) also have a
High Speed timers that are not using the 24MHz oscillator as a source
but rather the AHB clock running much faster.
The IP is slightly different between the A10s/A13 and the one used in
the A20/A31, since the latter have 4 timers available, while the former
have only 2 of them.
[dlezcano] : Fixed conflict with b788beda "Order Kconfig options
alphabetically"
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r-- | Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt new file mode 100644 index 0000000..7c26154 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt @@ -0,0 +1,22 @@ +Allwinner SoCs High Speed Timer Controller + +Required properties: + +- compatible : should be "allwinner,sun5i-a13-hstimer" or + "allwinner,sun7i-a20-hstimer" +- reg : Specifies base physical address and size of the registers. +- interrupts : The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i + one) +- clocks: phandle to the source clock (usually the AHB clock) + +Example: + +timer@01c60000 { + compatible = "allwinner,sun7i-a20-hstimer"; + reg = <0x01c60000 0x1000>; + interrupts = <0 51 1>, + <0 52 1>, + <0 53 1>, + <0 54 1>; + clocks = <&ahb1_gates 19>; +}; |