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author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-05-23 10:12:04 +0200 |
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committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2014-05-23 10:12:04 +0200 |
commit | 12e499d0ed1fa09940a573e5a8cce52b556f3c38 (patch) | |
tree | 245c6973be9520c36b2f03094f8fba7ed974ac79 /Documentation/devicetree/bindings/timer | |
parent | 28d4768869a297210bfd19d4a4b186acda0cdb1b (diff) | |
download | op-kernel-dev-12e499d0ed1fa09940a573e5a8cce52b556f3c38.zip op-kernel-dev-12e499d0ed1fa09940a573e5a8cce52b556f3c38.tar.gz |
clocksource: ftm: Add FlexTimer Module (FTM) Timer devicetree Documentation
The FTM binding could be used on Vybrid and LS1+, add a binding
document for it.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r-- | Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt b/Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt new file mode 100644 index 0000000..aa8c402 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt @@ -0,0 +1,31 @@ +Freescale FlexTimer Module (FTM) Timer + +Required properties: + +- compatible : should be "fsl,ftm-timer" +- reg : Specifies base physical address and size of the register sets for the + clock event device and clock source device. +- interrupts : Should be the clock event device interrupt. +- clocks : The clocks provided by the SoC to drive the timer, must contain an + entry for each entry in clock-names. +- clock-names : Must include the following entries: + o "ftm-evt" + o "ftm-src" + o "ftm-evt-counter-en" + o "ftm-src-counter-en" +- big-endian: One boolean property, the big endian mode will be in use if it is + present, or the little endian mode will be in use for all the device registers. + +Example: +ftm: ftm@400b8000 { + compatible = "fsl,ftm-timer"; + reg = <0x400b8000 0x1000 0x400b9000 0x1000>; + interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "ftm-evt", "ftm-src", + "ftm-evt-counter-en", "ftm-src-counter-en"; + clocks = <&clks VF610_CLK_FTM2>, + <&clks VF610_CLK_FTM3>, + <&clks VF610_CLK_FTM2_EXT_FIX_EN>, + <&clks VF610_CLK_FTM3_EXT_FIX_EN>; + big-endian; +}; |