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author | Zhao Qiang <B45475@freescale.com> | 2014-04-01 17:10:50 +0800 |
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committer | Mark Brown <broonie@linaro.org> | 2014-04-14 17:17:01 +0100 |
commit | cd6339e6ced387ad67b5551dd2931cfd7e8b970b (patch) | |
tree | c3222a2ff83afd95c9cd48a6cc602222298dd362 /Documentation/devicetree/bindings/spi | |
parent | c9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff) | |
download | op-kernel-dev-cd6339e6ced387ad67b5551dd2931cfd7e8b970b.zip op-kernel-dev-cd6339e6ced387ad67b5551dd2931cfd7e8b970b.tar.gz |
spi: add "spi-lsb-first" to devicetree
add optional property devicetree for SPI slave nodes
into devicetree so that LSB mode can be enabled by devicetree.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-bus.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index e5a4d1b..22d5740 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -55,6 +55,8 @@ contain the following properties. chip select active high - spi-3wire - (optional) Empty property indicating device requires 3-wire mode. +- spi-lsb-first - (optional) Empty property indicating device requires + LSB first mode. - spi-tx-bus-width - (optional) The bus width(number of data wires) that used for MOSI. Defaults to 1 if not present. - spi-rx-bus-width - (optional) The bus width(number of data wires) that |