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author | Stephen Boyd <sboyd@codeaurora.org> | 2013-08-28 13:32:40 -0700 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-08-28 16:03:29 -0700 |
commit | 6e01365c469f3cfe96a1b428bade1a3628896929 (patch) | |
tree | c84de7b9b5cd00c518f0330ea54eca817cd130f7 /Documentation/devicetree/bindings/serial/qcom,msm-uart.txt | |
parent | 6b9c1fa25a5c2a2a2d8fa1e2f8c2cc5d6d0c4a45 (diff) | |
download | op-kernel-dev-6e01365c469f3cfe96a1b428bade1a3628896929.zip op-kernel-dev-6e01365c469f3cfe96a1b428bade1a3628896929.tar.gz |
devicetree: serial: Document msm_serial bindings
Let's fix up the msm serial device bindings so that it's clearer
what hardware is supported. Instead of using hsuart (for high
speed uart) let's use uartdm because that matches the actual name
of the hardware. Also, let's add the version information in case
we need to differentiate between different versions of the
hardware in the future. Finally, lets specify that clocks are
required (the clock bindings didn't exist when the original
binding was written) and also specify dma bindings just in case
we want to use it in software. We split the binding into two
files to make it clearer what's required and not required.
Cc: David Brown <davidb@codeaurora.org>
Cc: <devicetree@vger.kernel.org>
Acked-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial/qcom,msm-uart.txt')
-rw-r--r-- | Documentation/devicetree/bindings/serial/qcom,msm-uart.txt | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt new file mode 100644 index 0000000..ce8c901 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt @@ -0,0 +1,25 @@ +* MSM Serial UART + +The MSM serial UART hardware is designed for low-speed use cases where a +dma-engine isn't needed. From a software perspective it's mostly compatible +with the MSM serial UARTDM except that it only supports reading and writing one +character at a time. + +Required properties: +- compatible: Should contain "qcom,msm-uart" +- reg: Should contain UART register location and length. +- interrupts: Should contain UART interrupt. +- clocks: Should contain the core clock. +- clock-names: Should be "core". + +Example: + +A uart device at 0xa9c00000 with interrupt 11. + +serial@a9c00000 { + compatible = "qcom,msm-uart"; + reg = <0xa9c00000 0x1000>; + interrupts = <11>; + clocks = <&uart_cxc>; + clock-names = "core"; +}; |