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author | Philip, Avinash <avinashphilip@ti.com> | 2012-11-27 14:18:13 +0530 |
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committer | Thierry Reding <thierry.reding@avionic-design.de> | 2012-11-28 15:16:17 +0100 |
commit | 53ad9e8d37031397ee141f9bf701c0fba4257b0f (patch) | |
tree | 41dda85d04ca64360a42874e6ea62a0299942de5 /Documentation/devicetree/bindings/pwm | |
parent | d91861dafda44d808272f55758ca91d962feda6e (diff) | |
download | op-kernel-dev-53ad9e8d37031397ee141f9bf701c0fba4257b0f.zip op-kernel-dev-53ad9e8d37031397ee141f9bf701c0fba4257b0f.tar.gz |
pwm: tiehrpwm: Add device-tree binding
This patch
1. Add support for device-tree binding for EHRWPM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period & polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member in platform_driver structure to
THIS_MODULE.
Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm')
-rw-r--r-- | Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt new file mode 100644 index 0000000..4fc7079 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt @@ -0,0 +1,23 @@ +TI SOC EHRPWM based PWM controller + +Required properties: +- compatible : Must be "ti,am33xx-ehrpwm" +- #pwm-cells: Should be 3. Number of cells being used to specify PWM property. + First cell specifies the per-chip index of the PWM to use, the second + cell is the period in nanoseconds and bit 0 in the third cell is used to + encode the polarity of PWM output. Set bit 0 of the third in PWM specifier + to 1 for inverse polarity & set to 0 for normal polarity. +- reg: physical base address and size of the registers map. + +Optional properties: +- ti,hwmods: Name of the hwmod associated to the EHRPWM: + "ehrpwm<x>", <x> being the 0-based instance number from the HW spec + +Example: + +ehrpwm0: ehrpwm@0 { + compatible = "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48300200 0x100>; + ti,hwmods = "ehrpwm0"; +}; |