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author | Kumar Gala <galak@codeaurora.org> | 2014-07-16 11:10:09 -0500 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2014-07-22 12:46:12 +0530 |
commit | c4aee1aacb4798d23f514ab4eb59acef752d2397 (patch) | |
tree | 502fa39026e9dc58bed50dc81153bc005e23a3e3 /Documentation/devicetree/bindings/phy | |
parent | 4f6160d4089ec0e39e33a197138413bd0701ce21 (diff) | |
download | op-kernel-dev-c4aee1aacb4798d23f514ab4eb59acef752d2397.zip op-kernel-dev-c4aee1aacb4798d23f514ab4eb59acef752d2397.tar.gz |
phy: qcom: Add device tree bindings for IPQ806x SATA PHY
Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on
the IPQ806x family of SoCs.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r-- | Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt b/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt new file mode 100644 index 0000000..76bfbd0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom-ipq806x-sata-phy.txt @@ -0,0 +1,23 @@ +Qualcomm IPQ806x SATA PHY Controller +------------------------------------ + +SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. +Each SATA PHY controller should have its own node. + +Required properties: +- compatible: compatible list, contains "qcom,ipq806x-sata-phy" +- reg: offset and length of the SATA PHY register set; +- #phy-cells: must be zero +- clocks: must be exactly one entry +- clock-names: must be "cfg" + +Example: + sata_phy: sata-phy@1b400000 { + compatible = "qcom,ipq806x-sata-phy"; + reg = <0x1b400000 0x200>; + + clocks = <&gcc SATA_PHY_CFG_CLK>; + clock-names = "cfg"; + + #phy-cells = <0>; + }; |