diff options
author | Minghuan Lian <Minghuan.Lian@freescale.com> | 2015-10-16 15:19:19 +0800 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-11-02 15:38:39 -0600 |
commit | 5192ec7b24dd78bd82fe554995b8889d317da0c1 (patch) | |
tree | 62c94a209bece3ccec273eafbe55b39b04dde64e /Documentation/devicetree/bindings/pci | |
parent | 0f3cb324bec688c61578c04c5207898050dcc7ac (diff) | |
download | op-kernel-dev-5192ec7b24dd78bd82fe554995b8889d317da0c1.zip op-kernel-dev-5192ec7b24dd78bd82fe554995b8889d317da0c1.tar.gz |
PCI: layerscape: Add support for LS1043a and LS2080a
Both LS1043a and LS2080a are based on ARMv8 64-bit architecture and have
similar PCIe implementation. LUT is added to controller.
Add LS1043a and LS2080a support.
[bhelgaas: move unused field removal into separate patch, include DT update]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> (DT update)
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de> (DT update)
Diffstat (limited to 'Documentation/devicetree/bindings/pci')
-rw-r--r-- | Documentation/devicetree/bindings/pci/layerscape-pci.txt | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 6286f04..e376785 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -1,10 +1,20 @@ Freescale Layerscape PCIe controller -This PCIe host controller is based on the Synopsis Designware PCIe IP +This PCIe host controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in designware-pcie.txt. +This controller derives its clocks from the Reset Configuration Word (RCW) +which is used to describe the PLL settings at the time of chip-reset. + +Also as per the available Reference Manuals, there is no specific 'version' +register available in the Freescale PCIe controller register set, +which can allow determining the underlying DesignWare PCIe controller version +information. + Required properties: -- compatible: should contain the platform identifier such as "fsl,ls1021a-pcie" +- compatible: should contain the platform identifier such as: + "fsl,ls1021a-pcie", "snps,dw-pcie" + "fsl,ls2080a-pcie", "snps,dw-pcie" - reg: base addresses and lengths of the PCIe controller - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. |