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author | Philipp Zabel <p.zabel@pengutronix.de> | 2017-05-14 21:51:15 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-06-03 19:29:26 +0900 |
commit | 5dc75a2d93d52617d50d72f8c056eb3b8f80ba62 (patch) | |
tree | 783e1c88ca8681e432fbb1fdecc1b0f68fd45a6a /Documentation/devicetree/bindings/mux | |
parent | afda08c4caa9489511557def51e322a5f2142a2f (diff) | |
download | op-kernel-dev-5dc75a2d93d52617d50d72f8c056eb3b8f80ba62.zip op-kernel-dev-5dc75a2d93d52617d50d72f8c056eb3b8f80ba62.tar.gz |
dt-bindings: add mmio-based syscon mux controller DT bindings
This adds device tree binding documentation for mmio-based syscon
multiplexers controlled by a bitfields in a syscon register range.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mux')
-rw-r--r-- | Documentation/devicetree/bindings/mux/mmio-mux.txt | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mux/mmio-mux.txt b/Documentation/devicetree/bindings/mux/mmio-mux.txt new file mode 100644 index 0000000..a9bfb4d --- /dev/null +++ b/Documentation/devicetree/bindings/mux/mmio-mux.txt @@ -0,0 +1,60 @@ +MMIO register bitfield-based multiplexer controller bindings + +Define register bitfields to be used to control multiplexers. The parent +device tree node must be a syscon node to provide register access. + +Required properties: +- compatible : "mmio-mux" +- #mux-control-cells : <1> +- mux-reg-masks : an array of register offset and pre-shifted bitfield mask + pairs, each describing a single mux control. +* Standard mux-controller bindings as decribed in mux-controller.txt + +Optional properties: +- idle-states : if present, the state the muxes will have when idle. The + special state MUX_IDLE_AS_IS is the default. + +The multiplexer state of each multiplexer is defined as the value of the +bitfield described by the corresponding register offset and bitfield mask pair +in the mux-reg-masks array, accessed through the parent syscon. + +Example: + + syscon { + compatible = "syscon"; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + + mux-reg-masks = <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */ + <0x3 0x40>, /* 1: reg 0x3, bit 6 */ + idle-states = <MUX_IDLE_AS_IS>, <0>; + }; + }; + + video-mux { + compatible = "video-mux"; + mux-controls = <&mux 0>; + + ports { + /* inputs 0..3 */ + port@0 { + reg = <0>; + }; + port@1 { + reg = <1>; + }; + port@2 { + reg = <2>; + }; + port@3 { + reg = <3>; + }; + + /* output */ + port@4 { + reg = <4>; + }; + }; + }; |