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author | Alexandru M Stan <amstan@chromium.org> | 2015-10-12 14:48:27 +0200 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2015-10-26 16:00:11 +0100 |
commit | f8085bbada3b124b5b39b61bb1a7a0a78c24604b (patch) | |
tree | c62cff6365b3a0e4d6fc3f8a697601244cb90a8b /Documentation/devicetree/bindings/mmc | |
parent | e0848f5d294c703917260a6228cc08b8be46c527 (diff) | |
download | op-kernel-dev-f8085bbada3b124b5b39b61bb1a7a0a78c24604b.zip op-kernel-dev-f8085bbada3b124b5b39b61bb1a7a0a78c24604b.tar.gz |
mmc: dw_mmc-rockchip: dt-binding: Add tuning related things
Add ciu_drive, ciu_sample clocks and default-sample-phase. This will later
be used by tuning code.
We do not touch ciu_drive (and by extension define default-drive-phase).
Drive phase is mostly used to define minimum hold times, while one could
write some code to determine what phase meets the minimum hold time
(ex 10 degrees) this will not work with the current clock phase framework
(which floors angles, so we'll get 0 deg, and there's no way to know what
resolution the floors happen at). We assume that the default drive angles
set by the hardware are good enough.
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
-rw-r--r-- | Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt index c327c2d..3dc13b6 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt @@ -14,6 +14,19 @@ Required Properties: before RK3288 - "rockchip,rk3288-dw-mshc": for Rockchip RK3288 +Optional Properties: +* clocks: from common clock binding: if ciu_drive and ciu_sample are + specified in clock-names, should contain handles to these clocks. + +* clock-names: Apart from the clock-names described in synopsys-dw-mshc.txt + two more clocks "ciu-drive" and "ciu-sample" are supported. They are used + to control the clock phases, "ciu-sample" is required for tuning high- + speed modes. + +* rockchip,default-sample-phase: The default phase to set ciu_sample at + probing, low speeds or in case where all phases work at tuning time. + If not specified 0 deg will be used. + Example: rkdwmmc0@12200000 { |