diff options
author | Chanwoo Choi <cw00.choi@samsung.com> | 2015-02-03 09:13:49 +0900 |
---|---|---|
committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-02-05 15:21:06 +0100 |
commit | df40a13ca53e6f83ead88e718dd96654e75365ec (patch) | |
tree | 5bd3c9d023d188b0545aafe280dffbd73b8d727e /Documentation/devicetree/bindings/clock | |
parent | 2a2f33e83ddb6c0abe3d32075f795aa14e4b9476 (diff) | |
download | op-kernel-dev-df40a13ca53e6f83ead88e718dd96654e75365ec.zip op-kernel-dev-df40a13ca53e6f83ead88e718dd96654e75365ec.tar.gz |
clk: samsung: exynos5433: Add clocks for CMU_APOLLO domain
This patch adds the mux/divider/gate clocks for CMU_APOLLO domain
which generates the clocks for Cortex-A53 Quad-core processsor.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
[s.nawrocki@samsung.com: Renamed pclk_pmu_sysreg_apollo to pclk_sysreg_apollo]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 9e7ed2d..0a71468 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -32,6 +32,8 @@ Required Properties: which generates clocks for 3D Graphics Engine IP. - "samsung,exynos5433-cmu-gscl" - clock controller compatible for CMU_GSCL which generates clocks for GSCALER IPs. + - "samsung,exynos5433-cmu-apollo"- clock controller compatible for CMU_APOLLO + which generates clocks for Cortex-A53 Quad-core processor. - reg: physical base address of the controller and length of memory mapped region. @@ -105,6 +107,10 @@ Required Properties: - aclk_gscl_111 - aclk_gscl_333 + Input clocks for apollo clock controller: + - oscclk + - sclk_bus_pll_apollo + Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. @@ -289,6 +295,15 @@ Example 2: Examples of clock controller nodes are listed below. <&cmu_top CLK_ACLK_GSCL_333>; }; + cmu_apollo: clock-controller@11900000 { + compatible = "samsung,exynos5433-cmu-apollo"; + reg = <0x11900000 0x1088>; + #clock-cells = <1>; + + clock-names = "oscclk", "sclk_bus_pll_apollo"; + clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_APOLLO>; + }; + Example 3: UART controller node that consumes the clock generated by the clock controller. |