diff options
author | Olof Johansson <olof@lixom.net> | 2014-05-29 09:48:55 -0700 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2014-05-29 09:48:55 -0700 |
commit | dca092f6d40735eb701ae6cd4d80c3c508266181 (patch) | |
tree | 168442d7b080ff7f4d53d63b038791c1a2f4f3ff /Documentation/devicetree/bindings/arm | |
parent | 4fd09120443a47ea1876ecce494205420b94d201 (diff) | |
parent | ccf5511797cd4b48d20a85fa1778f5608eac9fd7 (diff) | |
download | op-kernel-dev-dca092f6d40735eb701ae6cd4d80c3c508266181.zip op-kernel-dev-dca092f6d40735eb701ae6cd4d80c3c508266181.tar.gz |
Merge tag 'exynos-mcpm' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Exynos MCPM support for v3.16" from Kukjin Kim:
- adding MCPM backend support for SMP secondary boot and core switching
on Samsung's Exynos5420.
Tested on exynos5420-smdk5420 and exynos5420 based chromebook (peach-pit)
using the "/dev/b.L_switcher" user interface. Secondary core boot-up has
also been tested on both the boards.
* tag 'exynos-mcpm' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add MCPM call-back functions
ARM: dts: add CCI node for exynos5420
ARM: EXYNOS: Add generic cluster power control functions
ARM: EXYNOS: use generic exynos cpu power control functions
ARM: EXYNOS: Add generic cpu power control functions for exynos SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r-- | Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt b/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt new file mode 100644 index 0000000..4a0a4f7 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt @@ -0,0 +1,38 @@ +Samsung Exynos SYSRAM for SMP bringup: +------------------------------------ + +Samsung SMP-capable Exynos SoCs use part of the SYSRAM for the bringup +of the secondary cores. Once the core gets powered up it executes the +code that is residing at some specific location of the SYSRAM. + +Therefore reserved section sub-nodes have to be added to the mmio-sram +declaration. These nodes are of two types depending upon secure or +non-secure execution environment. + +Required sub-node properties: +- compatible : depending upon boot mode, should be + "samsung,exynos4210-sysram" : for Secure SYSRAM + "samsung,exynos4210-sysram-ns" : for Non-secure SYSRAM + +The rest of the properties should follow the generic mmio-sram discription +found in ../../misc/sysram.txt + +Example: + + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@53000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x53000 0x1000>; + }; + }; |