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authorThomas Gleixner <tglx@linutronix.de>2014-05-27 19:38:09 +0200
committerThomas Gleixner <tglx@linutronix.de>2014-05-27 19:38:09 +0200
commitc0ffa793994a7a69c37a96dabf38323eae1dffa6 (patch)
tree070efc4cc6a123cf0d76cd95c82ff19c77c66f8b /Documentation/devicetree/bindings/arm
parenta257954bb38ab23dbf93df812b4b2c01cae29d8b (diff)
parentc8dfe94bc7a14c6a644ce55ef77b7a81505c696f (diff)
downloadop-kernel-dev-c0ffa793994a7a69c37a96dabf38323eae1dffa6.zip
op-kernel-dev-c0ffa793994a7a69c37a96dabf38323eae1dffa6.tar.gz
Merge tag 'irqchip-3.16' of git://git.infradead.org/users/jcooper/linux into irq/core
irqchip core changes for v3.16 collected by Jason Cooper: - irq-gic: Use a mask field - irq-armada-370-xp: Move the DT binding docs to the irqchip directory - irq-brcmstb-l2: New driver for Broadcom Set Top Box Level-2
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-Marvell Armada 370, 375, 38x, XP Interrupt Controller
------------------------------------------------------
-
-Required properties:
-- compatible: Should be "marvell,mpic"
-- interrupt-controller: Identifies the node as an interrupt controller.
-- msi-controller: Identifies the node as an PCI Message Signaled
- Interrupt controller.
-- #interrupt-cells: The number of cells to define the interrupts. Should be 1.
- The cell is the IRQ number
-
-- reg: Should contain PMIC registers location and length. First pair
- for the main interrupt registers, second pair for the per-CPU
- interrupt registers. For this last pair, to be compliant with SMP
- support, the "virtual" must be use (For the record, these registers
- automatically map to the interrupt controller registers of the
- current CPU)
-
-Optional properties:
-
-- interrupts: If defined, then it indicates that this MPIC is
- connected as a slave to another interrupt controller. This is
- typically the case on Armada 375 and Armada 38x, where the MPIC is
- connected as a slave to the Cortex-A9 GIC. The provided interrupt
- indicate to which GIC interrupt the MPIC output is connected.
-
-Example:
-
- mpic: interrupt-controller@d0020000 {
- compatible = "marvell,mpic";
- #interrupt-cells = <1>;
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-controller;
- msi-controller;
- reg = <0xd0020a00 0x1d0>,
- <0xd0021070 0x58>;
- };
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