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authorSricharan R <r.sricharan@ti.com>2013-12-03 15:57:22 +0530
committerSricharan R <r.sricharan@ti.com>2014-02-05 20:08:00 +0530
commit006e983bbc805431c44e2135e13841f66059a045 (patch)
tree9dc934900b47f2cb9ca0c3f297ad672924a786b5 /Documentation/devicetree/bindings/arm/omap
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
downloadop-kernel-dev-006e983bbc805431c44e2135e13841f66059a045.zip
op-kernel-dev-006e983bbc805431c44e2135e13841f66059a045.tar.gz
DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
In some socs the gic can be preceded by a crossbar IP which routes the peripheral interrupts to the gic inputs. The peripheral interrupts are associated with a fixed crossbar input line and the crossbar routes that to one of the free gic input line. The DT entries for peripherals provides the fixed crossbar input line as its interrupt number and the mapping code should associate this with a free gic input line. This patch adds the support inside the gic irqchip to handle such routable irqs. The routable irqs are registered in a linear domain. The registered routable domain's callback should be implemented to get a free irq and to configure the IP to route it. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Tony Lindgren <tony@atomide.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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