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authorIngo Molnar <mingo@kernel.org>2014-12-12 09:09:03 +0100
committerIngo Molnar <mingo@kernel.org>2014-12-12 09:09:03 +0100
commit3459f0d78ffe27a1b341c22eb158b622eaaea3fc (patch)
tree715b0575eec541d0181876ad367ca5480cdcecf3 /Documentation/devicetree/bindings/arm/cpus.txt
parent9fc81d87420d0d3fd62d5e5529972c0ad9eab9cc (diff)
parentbee2782f30f66898be3f74ad02e4d1f87a969694 (diff)
downloadop-kernel-dev-3459f0d78ffe27a1b341c22eb158b622eaaea3fc.zip
op-kernel-dev-3459f0d78ffe27a1b341c22eb158b622eaaea3fc.tar.gz
Merge branch 'linus' into perf/urgent, to pick up the upstream merged bits
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
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--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -227,6 +227,15 @@ nodes to be present and contain the properties described below.
# List of phandles to idle state nodes supported
by this cpu [3].
+ - rockchip,pmu
+ Usage: optional for systems that have an "enable-method"
+ property value of "rockchip,rk3066-smp"
+ While optional, it is the preferred way to get access to
+ the cpu-core power-domains.
+ Value type: <phandle>
+ Definition: Specifies the syscon node controlling the cpu core
+ power domains.
+
Example 1 (dual-cluster big.LITTLE system 32-bit):
cpus {
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