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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-01-24 15:29:56 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-01-24 23:45:40 +0100 |
commit | fba5d532d16db812dabaa80fb7570820daa2707b (patch) | |
tree | a4d0231ca1b7ca4367f98d192fa0139a56c441b8 | |
parent | d811215004dbcc213e70eef94541aa10a2258aef (diff) | |
download | op-kernel-dev-fba5d532d16db812dabaa80fb7570820daa2707b.zip op-kernel-dev-fba5d532d16db812dabaa80fb7570820daa2707b.tar.gz |
drm/i915: Set display_mmio_offset for VLV
This will cause display registers to include the correct
offset on VLV.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 3ff8e73..521a253 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -276,6 +276,7 @@ static const struct intel_device_info intel_valleyview_m_info = { .has_bsd_ring = 1, .has_blt_ring = 1, .is_valleyview = 1, + .display_mmio_offset = VLV_DISPLAY_BASE, }; static const struct intel_device_info intel_valleyview_d_info = { @@ -285,6 +286,7 @@ static const struct intel_device_info intel_valleyview_d_info = { .has_bsd_ring = 1, .has_blt_ring = 1, .is_valleyview = 1, + .display_mmio_offset = VLV_DISPLAY_BASE, }; static const struct intel_device_info intel_haswell_d_info = { |