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author | Hou Zhiqiang <B48286@freescale.com> | 2015-10-23 16:01:21 +0800 |
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committer | Scott Wood <scottwood@freescale.com> | 2015-10-27 00:21:38 -0500 |
commit | e994412c5f19402a834f4b0d95e9159d1c7b0fb8 (patch) | |
tree | 6a7d97507f37fd7572b32946b367e364d27258fc | |
parent | 2c7693e081ab86e70931b2d05dbdbbdfab5086a3 (diff) | |
download | op-kernel-dev-e994412c5f19402a834f4b0d95e9159d1c7b0fb8.zip op-kernel-dev-e994412c5f19402a834f4b0d95e9159d1c7b0fb8.tar.gz |
clk: qoriq: Add ls1043a support.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
-rw-r--r-- | drivers/clk/clk-qoriq.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index 07985a5..1ab0fb8 100644 --- a/drivers/clk/clk-qoriq.c +++ b/drivers/clk/clk-qoriq.c @@ -244,6 +244,28 @@ static const struct clockgen_muxinfo clockgen2_cmux_cgb = { }, }; +static const struct clockgen_muxinfo ls1043a_hwa1 = { + { + {}, + {}, + { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 }, + { CLKSEL_VALID, CGA_PLL1, PLL_DIV3 }, + {}, + {}, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV2 }, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 }, + }, +}; + +static const struct clockgen_muxinfo ls1043a_hwa2 = { + { + {}, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV1 }, + {}, + { CLKSEL_VALID, CGA_PLL2, PLL_DIV3 }, + }, +}; + static const struct clockgen_muxinfo t1023_hwa1 = { { {}, @@ -452,6 +474,21 @@ static const struct clockgen_chipinfo chipinfo[] = { .pll_mask = 0x03, }, { + .compat = "fsl,ls1043a-clockgen", + .init_periph = t2080_init_periph, + .cmux_groups = { + &t1040_cmux + }, + .hwaccel = { + &ls1043a_hwa1, &ls1043a_hwa2 + }, + .cmux_to_group = { + 0, -1 + }, + .pll_mask = 0x07, + .flags = CG_PLL_8BIT, + }, + { .compat = "fsl,ls2080a-clockgen", .cmux_groups = { &clockgen2_cmux_cga12, &clockgen2_cmux_cgb @@ -1227,6 +1264,7 @@ err: CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init); +CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init); /* Legacy nodes */ |