summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorQuentin Schulz <quentin.schulz@free-electrons.com>2017-03-21 16:36:02 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-03-27 13:40:01 +0200
commite6bd37627e927a2e73bce95dbf5889a888e1c879 (patch)
tree52ad3189c3ddd7bc3e75393229f6fd33df2dc48d
parent347230758472a2d6ff6517add267b65664057d84 (diff)
downloadop-kernel-dev-e6bd37627e927a2e73bce95dbf5889a888e1c879.zip
op-kernel-dev-e6bd37627e927a2e73bce95dbf5889a888e1c879.tar.gz
ARM: sun8i: a33: add all operating points
This adds almost all operating points allowed for the A33 as defined by fex files available at: https://github.com/linux-sunxi/sunxi-boards/tree/master/sys_config/a33 There are more possible frequencies in this patch than there are in the fex files because the fex files only give an interval of possible frequencies for a given voltage. All supported frequencies are defined in the original driver code in Allwinner vendor tree. There are two missing frequencies though: 1104MHz and 1200MHz which require the CPU to have 1.32V supplied, which is higher than the default voltage. Without all A33 boards defining the CPU regulator, we cannot have these two frequencies as it would cause the CPU to try to run a higher frequency without "overvolting" which is very likely to crash the CPU. Therefore, these two frequencies must be enabled on a per-board basis. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/sun8i-a33.dtsi54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index edb8653..6ebd55d 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -49,18 +49,72 @@
compatible = "operating-points-v2";
opp-shared;
+ opp@120000000 {
+ opp-hz = /bits/ 64 <120000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp@240000000 {
+ opp-hz = /bits/ 64 <240000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp@312000000 {
+ opp-hz = /bits/ 64 <312000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp@408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp@480000000 {
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp@504000000 {
+ opp-hz = /bits/ 64 <504000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1040000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
opp@648000000 {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
+ opp@720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
+ opp@912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1200000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1200000>;
OpenPOWER on IntegriCloud