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authorAlex Deucher <alexander.deucher@amd.com>2017-09-06 18:06:24 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-02-19 14:17:13 -0500
commitdd8d07f2fb2a5acb972e62a5cd00f6d56e7d2b8c (patch)
treed3266aa57ba4fefa8ab45407944a497987448bda
parent13854c60d7753cbb2bb1db6463df220164ec001a (diff)
downloadop-kernel-dev-dd8d07f2fb2a5acb972e62a5cd00f6d56e7d2b8c.zip
op-kernel-dev-dd8d07f2fb2a5acb972e62a5cd00f6d56e7d2b8c.tar.gz
drm/amdgpu: add HDP asic callbacks for VI
Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/vi.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 1e3e05a..fbb77b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -856,6 +856,18 @@ static uint32_t vi_get_rev_id(struct amdgpu_device *adev)
>> PCIE_EFUSE4__STRAP_BIF_ATI_REV_ID__SHIFT;
}
+static void vi_flush_hdp(struct amdgpu_device *adev)
+{
+ WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);
+ RREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL);
+}
+
+static void vi_invalidate_hdp(struct amdgpu_device *adev)
+{
+ WREG32(mmHDP_DEBUG0, 1);
+ RREG32(mmHDP_DEBUG0);
+}
+
static const struct amdgpu_asic_funcs vi_asic_funcs =
{
.read_disabled_bios = &vi_read_disabled_bios,
@@ -867,6 +879,8 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
.set_uvd_clocks = &vi_set_uvd_clocks,
.set_vce_clocks = &vi_set_vce_clocks,
.get_config_memsize = &vi_get_config_memsize,
+ .flush_hdp = &vi_flush_hdp,
+ .invalidate_hdp = &vi_invalidate_hdp,
};
#define CZ_REV_BRISTOL(rev) \
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