diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 16:16:29 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 16:16:29 +0000 |
| commit | dcf7ec5ee62a78123057a1e286c88ca739717409 (patch) | |
| tree | fa3f19434638a942ba66d236dde4d9aaadf8b370 | |
| parent | 15db3e823c3246e3bd31fe454f5c8927eb85caf2 (diff) | |
| parent | 142f2101a86ade2d6c9dfbedf82e1b5b31c8fce6 (diff) | |
| download | op-kernel-dev-dcf7ec5ee62a78123057a1e286c88ca739717409.zip op-kernel-dev-dcf7ec5ee62a78123057a1e286c88ca739717409.tar.gz | |
Merge branch 'samsung/driver' into next/drivers
Conflicts:
arch/arm/mach-mxs/include/mach/common.h
Pull in previous samsung conflict merges and do a trivial
merge of an mxs double-add conflict.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1271 files changed, 12353 insertions, 12763 deletions
diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt index 771d48d..208a2d4 100644 --- a/Documentation/arm/memory.txt +++ b/Documentation/arm/memory.txt @@ -51,15 +51,14 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned ff000000 ffbfffff Reserved for future expansion of DMA mapping region. -VMALLOC_END feffffff Free for platform use, recommended. - VMALLOC_END must be aligned to a 2MB - boundary. - VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. Memory returned by vmalloc/ioremap will be dynamically placed in this region. - VMALLOC_START may be based upon the value - of the high_memory variable. + Machine specific static mappings are also + located here through iotable_init(). + VMALLOC_START is based upon the value + of the high_memory variable, and VMALLOC_END + is equal to 0xff000000. PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. This maps the platforms RAM, and typically diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 52916b4..9b4b82a 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -42,6 +42,10 @@ Optional - interrupts : Interrupt source of the parent interrupt controller. Only present on secondary GICs. +- cpu-offset : per-cpu offset within the distributor and cpu interface + regions, used when the GIC doesn't have banked registers. The offset is + cpu-offset * cpu-nr. + Example: intc: interrupt-controller@fff11000 { diff --git a/Documentation/devicetree/bindings/arm/vic.txt b/Documentation/devicetree/bindings/arm/vic.txt new file mode 100644 index 0000000..266716b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/vic.txt @@ -0,0 +1,29 @@ +* ARM Vectored Interrupt Controller + +One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM +system for interrupt routing. For multiple controllers they can either be +nested or have the outputs wire-OR'd together. + +Required properties: + +- compatible : should be one of + "arm,pl190-vic" + "arm,pl192-vic" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as + the VIC has no configuration options for interrupt sources. The cell is a u32 + and defines the interrupt number. +- reg : The register bank for the VIC. + +Optional properties: + +- interrupts : Interrupt source for parent controllers if the VIC is nested. + +Example: + + vic0: interrupt-controller@60000 { + compatible = "arm,pl192-vic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x60000 0x1000>; + }; diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 7945b0b..e2a4b52 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows: eax, ebx, ecx, edx: the values returned by the cpuid instruction for this function/index combination +The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned +as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC +support. Instead it is reported via + + ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER) + +if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the +feature in userspace, then you can enable the feature for KVM_SET_CPUID2. + 4.47 KVM_PPC_GET_PVINFO Capability: KVM_CAP_PPC_GET_PVINFO @@ -1151,6 +1160,13 @@ following flags are specified: /* Depends on KVM_CAP_IOMMU */ #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) +The KVM_DEV_ASSIGN_ENABLE_IOMMU flag is a mandatory option to ensure +isolation of the device. Usages not specifying this flag are deprecated. + +Only PCI header type 0 devices with PCI BAR resources are supported by +device assignment. The user requesting this ioctl must have read/write +access to the PCI sysfs resource files associated with the device. + 4.49 KVM_DEASSIGN_PCI_DEVICE Capability: KVM_CAP_DEVICE_DEASSIGNMENT diff --git a/MAINTAINERS b/MAINTAINERS index b9db108..b262190 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1124,13 +1124,6 @@ S: Supported F: arch/arm/mach-shmobile/ F: drivers/sh/ -ARM/TELECHIPS ARM ARCHITECTURE -M: "Hans J. Koch" <hjk@hansjkoch.de> -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Maintained -F: arch/arm/plat-tcc/ -F: arch/arm/mach-tcc8k/ - ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT M: Lennert Buytenhek <kernel@wantstofly.org> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) @@ -2700,7 +2693,7 @@ FIREWIRE SUBSYSTEM M: Stefan Richter <stefanr@s5r6.in-berlin.de> L: linux1394-devel@lists.sourceforge.net W: http://ieee1394.wiki.kernel.org/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394.git S: Maintained F: drivers/firewire/ F: include/linux/firewire*.h @@ -3101,6 +3094,7 @@ F: include/linux/hid* HIGH-RESOLUTION TIMERS, CLOCKEVENTS, DYNTICKS M: Thomas Gleixner <tglx@linutronix.de> +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core S: Maintained F: Documentation/timers/ F: kernel/hrtimer.c @@ -3610,7 +3604,7 @@ F: net/irda/ IRQ SUBSYSTEM M: Thomas Gleixner <tglx@linutronix.de> S: Maintained -T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git irq/core +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core F: kernel/irq/ ISAPNP @@ -4098,7 +4092,7 @@ F: drivers/hwmon/lm90.c LOCKDEP AND LOCKSTAT M: Peter Zijlstra <peterz@infradead.org> M: Ingo Molnar <mingo@redhat.com> -T: git git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-lockdep.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core/locking S: Maintained F: Documentation/lockdep*.txt F: Documentation/lockstat.txt @@ -4280,7 +4274,9 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git S: Maintained F: Documentation/dvb/ F: Documentation/video4linux/ +F: Documentation/DocBook/media/ F: drivers/media/ +F: drivers/staging/media/ F: include/media/ F: include/linux/dvb/ F: include/linux/videodev*.h @@ -5086,6 +5082,7 @@ M: Peter Zijlstra <a.p.zijlstra@chello.nl> M: Paul Mackerras <paulus@samba.org> M: Ingo Molnar <mingo@elte.hu> M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core S: Supported F: kernel/events/* F: include/linux/perf_event.h @@ -5117,6 +5114,15 @@ L: linux-mtd@lists.infradead.org S: Maintained F: drivers/mtd/devices/phram.c +PICOXCELL SUPPORT +M: Jamie Iles <jamie@jamieiles.com> +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +T: git git://github.com/jamieiles/linux-2.6-ji.git +S: Supported +F: arch/arm/mach-picoxcell +F: drivers/*/picoxcell* +F: drivers/*/*/picoxcell* + PIN CONTROL SUBSYSTEM M: Linus Walleij <linus.walleij@linaro.org> S: Maintained @@ -5165,6 +5171,7 @@ F: drivers/scsi/pm8001/ POSIX CLOCKS and TIMERS M: Thomas Gleixner <tglx@linutronix.de> +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core S: Supported F: fs/timerfd.c F: include/linux/timer* @@ -5680,6 +5687,7 @@ F: drivers/dma/dw_dmac.c TIMEKEEPING, NTP M: John Stultz <johnstul@us.ibm.com> M: Thomas Gleixner <tglx@linutronix.de> +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core S: Supported F: include/linux/clocksource.h F: include/linux/time.h @@ -5704,6 +5712,7 @@ F: drivers/watchdog/sc1200wdt.c SCHEDULER M: Ingo Molnar <mingo@elte.hu> M: Peter Zijlstra <peterz@infradead.org> +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git sched/core S: Maintained F: kernel/sched* F: include/linux/sched.h @@ -6631,7 +6640,7 @@ TRACING M: Steven Rostedt <rostedt@goodmis.org> M: Frederic Weisbecker <fweisbec@gmail.com> M: Ingo Molnar <mingo@redhat.com> -T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git perf/core +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf/core S: Maintained F: Documentation/trace/ftrace.txt F: arch/*/*/*/ftrace.h @@ -7381,7 +7390,7 @@ M: Thomas Gleixner <tglx@linutronix.de> M: Ingo Molnar <mingo@redhat.com> M: "H. Peter Anvin" <hpa@zytor.com> M: x86@kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core S: Maintained F: Documentation/x86/ F: arch/x86/ @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 2 SUBLEVEL = 0 -EXTRAVERSION = -rc6 +EXTRAVERSION = -rc7 NAME = Saber-toothed Squirrel # *DOCUMENTATION* diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 34d13ff..c8d6706 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -258,6 +258,7 @@ config ARCH_INTEGRATOR select ARCH_HAS_CPUFREQ select CLKDEV_LOOKUP select HAVE_MACH_CLKDEV + select HAVE_TCM select ICST select GENERIC_CLOCKEVENTS select PLAT_VERSATILE @@ -341,10 +342,12 @@ config ARCH_HIGHBANK select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 + select CACHE_L2X0 select CLKDEV_LOOKUP select CPU_V7 select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU + select HAVE_SMP select USE_OF help Support for the Calxeda Highbank SoC based boards. @@ -362,6 +365,7 @@ config ARCH_CNS3XXX select CPU_V6K select GENERIC_CLOCKEVENTS select ARM_GIC + select MIGHT_HAVE_CACHE_L2X0 select MIGHT_HAVE_PCI select PCI_DOMAINS if PCI help @@ -382,6 +386,7 @@ config ARCH_PRIMA2 select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP + select MIGHT_HAVE_CACHE_L2X0 select USE_OF select ZONE_DMA help @@ -635,6 +640,8 @@ config ARCH_TEGRA select GENERIC_GPIO select HAVE_CLK select HAVE_SCHED_CLOCK + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_CPUFREQ help This enables support for NVIDIA Tegra based systems (Tegra APX, @@ -652,6 +659,7 @@ config ARCH_PICOXCELL select HAVE_SCHED_CLOCK select HAVE_TCM select NO_IOPORT + select SPARSE_IRQ select USE_OF help This enables support for systems based on the Picochip picoXcell @@ -705,7 +713,9 @@ config ARCH_SHMOBILE select HAVE_CLK select CLKDEV_LOOKUP select HAVE_MACH_CLKDEV + select HAVE_SMP select GENERIC_CLOCKEVENTS + select MIGHT_HAVE_CACHE_L2X0 select NO_IOPORT select SPARSE_IRQ select MULTI_IRQ_HANDLER @@ -870,16 +880,6 @@ config ARCH_SHARK Support for the StrongARM based Digital DNARD machine, also known as "Shark" (<http://www.shark-linux.de/shark.html>). -config ARCH_TCC_926 - bool "Telechips TCC ARM926-based systems" - select CLKSRC_MMIO - select CPU_ARM926T - select HAVE_CLK - select CLKDEV_LOOKUP - select GENERIC_CLOCKEVENTS - help - Support for Telechips TCC ARM926-based systems. - config ARCH_U300 bool "ST-Ericsson U300 Series" depends on MMU @@ -895,7 +895,6 @@ config ARCH_U300 select HAVE_MACH_CLKDEV select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB - select NEED_MACH_MEMORY_H help Support for ST-Ericsson U300 series mobile platforms. @@ -907,6 +906,8 @@ config ARCH_U8500 select CLKDEV_LOOKUP select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 help Support for ST-Ericsson's Ux500 architecture @@ -917,6 +918,7 @@ config ARCH_NOMADIK select CPU_ARM926T select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS + select MIGHT_HAVE_CACHE_L2X0 select ARCH_REQUIRE_GPIOLIB help Support for the Nomadik platform by ST-Ericsson @@ -976,6 +978,7 @@ config ARCH_ZYNQ select ARM_GIC select ARM_AMBA select ICST + select MIGHT_HAVE_CACHE_L2X0 select USE_OF help Support for Xilinx Zynq ARM Cortex A9 Platform @@ -1062,8 +1065,6 @@ source "arch/arm/plat-s5p/Kconfig" source "arch/arm/plat-spear/Kconfig" -source "arch/arm/plat-tcc/Kconfig" - if ARCH_S3C2410 source "arch/arm/mach-s3c2410/Kconfig" source "arch/arm/mach-s3c2412/Kconfig" @@ -1128,6 +1129,11 @@ config ARM_TIMER_SP804 source arch/arm/mm/Kconfig +config ARM_NR_BANKS + int + default 16 if ARCH_EP93XX + default 8 + config IWMMXT bool "Enable iWMMXt support" depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 @@ -1248,7 +1254,7 @@ config PL310_ERRATA_588369 config ARM_ERRATA_720789 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" - depends on CPU_V7 && SMP + depends on CPU_V7 help This option enables the workaround for the 720789 Cortex-A9 (prior to r2p0) erratum. A faulty ASID can be sent to the other CPUs for the @@ -1284,7 +1290,7 @@ config ARM_ERRATA_743622 config ARM_ERRATA_751472 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" - depends on CPU_V7 && SMP + depends on CPU_V7 help This option enables the workaround for the 751472 Cortex-A9 (prior to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the @@ -1437,14 +1443,20 @@ menu "Kernel Features" source "kernel/time/Kconfig" +config HAVE_SMP + bool + help + This option should be selected by machines which have an SMP- + capable CPU. + + The only effect of this option is to make the SMP-related + options available to the user for configuration. + config SMP bool "Symmetric Multi-Processing" depends on CPU_V6K || CPU_V7 depends on GENERIC_CLOCKEVENTS - depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ - MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ - ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ - ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q + depends on HAVE_SMP depends on MMU select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP @@ -1562,6 +1574,16 @@ config LOCAL_TIMERS accounting to be spread across the timer interval, preventing a "thundering herd" at every timer tick. +config ARCH_NR_GPIO + int + default 1024 if ARCH_SHMOBILE || ARCH_TEGRA + default 350 if ARCH_U8500 + default 0 + help + Maximum number of GPIOs in the system. + + If unsure, leave the default value. + source kernel/Kconfig.preempt config HZ @@ -1974,7 +1996,7 @@ endchoice config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" - depends on !ZBOOT_ROM + depends on !ZBOOT_ROM && !ARM_LPAE help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM @@ -2004,7 +2026,7 @@ config XIP_PHYS_ADDR config KEXEC bool "Kexec system call (EXPERIMENTAL)" - depends on EXPERIMENTAL + depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index c5213e7..e0d236d 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -100,6 +100,14 @@ choice Note that the system will appear to hang during boot if there is nothing connected to read from the DCC. + config AT91_DEBUG_LL_DBGU0 + bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" + depends on HAVE_AT91_DBGU0 + + config AT91_DEBUG_LL_DBGU1 + bool "Kernel low-level debugging on 9263, 9g45 and cap9" + depends on HAVE_AT91_DBGU1 + config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" depends on FOOTBRIDGE @@ -247,6 +255,43 @@ choice their output to the standard serial port on the RealView PB1176 platform. + config DEBUG_MSM_UART1 + bool "Kernel low-level debugging messages via MSM UART1" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on MSM devices. + + config DEBUG_MSM_UART2 + bool "Kernel low-level debugging messages via MSM UART2" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + help + Say Y here if you want the debug print routines to direct + their output to the second serial port on MSM devices. + + config DEBUG_MSM_UART3 + bool "Kernel low-level debugging messages via MSM UART3" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + help + Say Y here if you want the debug print routines to direct + their output to the third serial port on MSM devices. + + config DEBUG_MSM8660_UART + bool "Kernel low-level debugging messages via MSM 8660 UART" + depends on ARCH_MSM8X60 + select MSM_HAS_DEBUG_UART_HS + help + Say Y here if you want the debug print routines to direct + their output to the serial port on MSM 8660 devices. + + config DEBUG_MSM8960_UART + bool "Kernel low-level debugging messages via MSM 8960 UART" + depends on ARCH_MSM8960 + select MSM_HAS_DEBUG_UART_HS + help + Say Y here if you want the debug print routines to direct + their output to the serial port on MSM 8960 devices. + endchoice config EARLY_PRINTK diff --git a/arch/arm/Makefile b/arch/arm/Makefile index dfcf3b0..40319d9 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4) := exynos machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHMOBILE) := shmobile -machine-$(CONFIG_ARCH_TCC8K) := tcc8k machine-$(CONFIG_ARCH_TEGRA) := tegra machine-$(CONFIG_ARCH_U300) := u300 machine-$(CONFIG_ARCH_U8500) := ux500 @@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ) := zynq plat-$(CONFIG_ARCH_MXC) := mxc plat-$(CONFIG_ARCH_OMAP) := omap plat-$(CONFIG_ARCH_S3C64XX) := samsung -plat-$(CONFIG_ARCH_TCC_926) := tcc plat-$(CONFIG_ARCH_ZYNQ) := versatile plat-$(CONFIG_PLAT_IOP) := iop plat-$(CONFIG_PLAT_NOMADIK) := nomadik diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 21f56ff..cf0a64c 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj) asflags-y := -Wa,-march=all # Supply kernel BSS size to the decompressor via a linker symbol. -KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}') +KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \ + awk 'END{print $$3}') LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ) # Supply ZRELADDR to the decompressor via a linker symbol. ifneq ($(CONFIG_AUTO_ZRELADDR),y) diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index c2effc9..c5d6025 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -659,6 +659,7 @@ __armv7_mmu_cache_on: mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif + mcr p15, 0, r0, c7, c5, 4 @ ISB mcr p15, 0, r0, c1, c0, 0 @ load control register mrc p15, 0, r0, c1, c0, 0 @ and read it back mov r0, #0 diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 74df9ca..81a933e 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -1,8 +1,14 @@ config ARM_GIC select IRQ_DOMAIN + select MULTI_IRQ_HANDLER + bool + +config GIC_NON_BANKED bool config ARM_VIC + select IRQ_DOMAIN + select MULTI_IRQ_HANDLER bool config ARM_VIC_NR diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 410a546..b2dc2dd 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -40,13 +40,36 @@ #include <linux/slab.h> #include <asm/irq.h> +#include <asm/exception.h> #include <asm/mach/irq.h> #include <asm/hardware/gic.h> -static DEFINE_RAW_SPINLOCK(irq_controller_lock); +union gic_base { + void __iomem *common_base; + void __percpu __iomem **percpu_base; +}; -/* Address of GIC 0 CPU interface */ -void __iomem *gic_cpu_base_addr __read_mostly; +struct gic_chip_data { + unsigned int irq_offset; + union gic_base dist_base; + union gic_base cpu_base; +#ifdef CONFIG_CPU_PM + u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; + u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; + u32 saved_spi_target[DIV_ROUND_UP(1020, 4)]; + u32 __percpu *saved_ppi_enable; + u32 __percpu *saved_ppi_conf; +#endif +#ifdef CONFIG_IRQ_DOMAIN + struct irq_domain domain; +#endif + unsigned int gic_irqs; +#ifdef CONFIG_GIC_NON_BANKED + void __iomem *(*get_base)(union gic_base *); +#endif +}; + +static DEFINE_RAW_SPINLOCK(irq_controller_lock); /* * Supported arch specific GIC irq extension. @@ -67,16 +90,48 @@ struct irq_chip gic_arch_extn = { static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; +#ifdef CONFIG_GIC_NON_BANKED +static void __iomem *gic_get_percpu_base(union gic_base *base) +{ + return *__this_cpu_ptr(base->percpu_base); +} + +static void __iomem *gic_get_common_base(union gic_base *base) +{ + return base->common_base; +} + +static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data) +{ + return data->get_base(&data->dist_base); +} + +static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data) +{ + return data->get_base(&data->cpu_base); +} + +static inline void gic_set_base_accessor(struct gic_chip_data *data, + void __iomem *(*f)(union gic_base *)) +{ + data->get_base = f; +} +#else +#define gic_data_dist_base(d) ((d)->dist_base.common_base) +#define gic_data_cpu_base(d) ((d)->cpu_base.common_base) +#define gic_set_base_accessor(d,f) +#endif + static inline void __iomem *gic_dist_base(struct irq_data *d) { struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); - return gic_data->dist_base; + return gic_data_dist_base(gic_data); } static inline void __iomem *gic_cpu_base(struct irq_data *d) { struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); - return gic_data->cpu_base; + return gic_data_cpu_base(gic_data); } static inline unsigned int gic_irq(struct irq_data *d) @@ -215,6 +270,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on) #define gic_set_wake NULL #endif +asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) +{ + u32 irqstat, irqnr; + struct gic_chip_data *gic = &gic_data[0]; + void __iomem *cpu_base = gic_data_cpu_base(gic); + + do { + irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); + irqnr = irqstat & ~0x1c00; + + if (likely(irqnr > 15 && irqnr < 1021)) { + irqnr = irq_domain_to_irq(&gic->domain, irqnr); + handle_IRQ(irqnr, regs); + continue; + } + if (irqnr < 16) { + writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); +#ifdef CONFIG_SMP + handle_IPI(irqnr, regs); +#endif + continue; + } + break; + } while (1); +} + static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) { struct gic_chip_data *chip_data = irq_get_handler_data(irq); @@ -225,7 +306,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) chained_irq_enter(chip, desc); raw_spin_lock(&irq_controller_lock); - status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK); + status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK); raw_spin_unlock(&irq_controller_lock); gic_irq = (status & 0x3ff); @@ -270,7 +351,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic) u32 cpumask; unsigned int gic_irqs = gic->gic_irqs; struct irq_domain *domain = &gic->domain; - void __iomem *base = gic->dist_base; + void __iomem *base = gic_data_dist_base(gic); u32 cpu = 0; #ifdef CONFIG_SMP @@ -330,8 +411,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic) static void __cpuinit gic_cpu_init(struct gic_chip_data *gic) { - void __iomem *dist_base = gic->dist_base; - void __iomem *base = gic->cpu_base; + void __iomem *dist_base = gic_data_dist_base(gic); + void __iomem *base = gic_data_cpu_base(gic); int i; /* @@ -368,7 +449,7 @@ static void gic_dist_save(unsigned int gic_nr) BUG(); gic_irqs = gic_data[gic_nr].gic_irqs; - dist_base = gic_data[gic_nr].dist_base; + dist_base = gic_data_dist_base(&gic_data[gic_nr]); if (!dist_base) return; @@ -403,7 +484,7 @@ static void gic_dist_restore(unsigned int gic_nr) BUG(); gic_irqs = gic_data[gic_nr].gic_irqs; - dist_base = gic_data[gic_nr].dist_base; + dist_base = gic_data_dist_base(&gic_data[gic_nr]); if (!dist_base) return; @@ -439,8 +520,8 @@ static void gic_cpu_save(unsigned int gic_nr) if (gic_nr >= MAX_GIC_NR) BUG(); - dist_base = gic_data[gic_nr].dist_base; - cpu_base = gic_data[gic_nr].cpu_base; + dist_base = gic_data_dist_base(&gic_data[gic_nr]); + cpu_base = gic_data_cpu_base(&gic_data[gic_nr]); if (!dist_base || !cpu_base) return; @@ -465,8 +546,8 @@ static void gic_cpu_restore(unsigned int gic_nr) if (gic_nr >= MAX_GIC_NR) BUG(); - dist_base = gic_data[gic_nr].dist_base; - cpu_base = gic_data[gic_nr].cpu_base; + dist_base = gic_data_dist_base(&gic_data[gic_nr]); + cpu_base = gic_data_cpu_base(&gic_data[gic_nr]); if (!dist_base || !cpu_base) return; @@ -491,6 +572,11 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v) int i; for (i = 0; i < MAX_GIC_NR; i++) { +#ifdef CONFIG_GIC_NON_BANKED + /* Skip over unused GICs */ + if (!gic_data[i].get_base) + continue; +#endif switch (cmd) { case CPU_PM_ENTER: gic_cpu_save(i); @@ -564,8 +650,9 @@ const struct irq_domain_ops gic_irq_domain_ops = { #endif }; -void __init gic_init(unsigned int gic_nr, int irq_start, - void __iomem *dist_base, void __iomem *cpu_base) +void __init gic_init_bases(unsigned int gic_nr, int irq_start, + void __iomem *dist_base, void __iomem *cpu_base, + u32 percpu_offset) { struct gic_chip_data *gic; struct irq_domain *domain; @@ -575,8 +662,36 @@ void __init gic_init(unsigned int gic_nr, int irq_start, gic = &gic_data[gic_nr]; domain = &gic->domain; - gic->dist_base = dist_base; - gic->cpu_base = cpu_base; +#ifdef CONFIG_GIC_NON_BANKED + if (percpu_offset) { /* Frankein-GIC without banked registers... */ + unsigned int cpu; + + gic->dist_base.percpu_base = alloc_percpu(void __iomem *); + gic->cpu_base.percpu_base = alloc_percpu(void __iomem *); + if (WARN_ON(!gic->dist_base.percpu_base || + !gic->cpu_base.percpu_base)) { + free_percpu(gic->dist_base.percpu_base); + free_percpu(gic->cpu_base.percpu_base); + return; + } + + for_each_possible_cpu(cpu) { + unsigned long offset = percpu_offset * cpu_logical_map(cpu); + *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset; + *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset; + } + + gic_set_base_accessor(gic, gic_get_percpu_base); + } else +#endif + { /* Normal, sane GIC... */ + WARN(percpu_offset, + "GIC_NON_BANKED not enabled, ignoring %08x offset!", + percpu_offset); + gic->dist_base.common_base = dist_base; + gic->cpu_base.common_base = cpu_base; + gic_set_base_accessor(gic, gic_get_common_base); + } /* * For primary GICs, skip over SGIs. @@ -584,8 +699,6 @@ void __init gic_init(unsigned int gic_nr, int irq_start, */ domain->hwirq_base = 32; if (gic_nr == 0) { - gic_cpu_base_addr = cpu_base; - if ((irq_start & 31) > 0) { domain->hwirq_base = 16; if (irq_start != -1) @@ -597,7 +710,7 @@ void __init gic_init(unsigned int gic_nr, int irq_start, * Find out how many interrupts are supported. * The GIC only supports up to 1020 interrupt sources. */ - gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; + gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f; gic_irqs = (gic_irqs + 1) * 32; if (gic_irqs > 1020) gic_irqs = 1020; @@ -645,7 +758,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) dsb(); /* this always happens on GIC0 */ - writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); + writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); } #endif @@ -656,6 +769,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) { void __iomem *cpu_base; void __iomem *dist_base; + u32 percpu_offset; int irq; struct irq_domain *domain = &gic_data[gic_cnt].domain; @@ -668,9 +782,12 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) cpu_base = of_iomap(node, 1); WARN(!cpu_base, "unable to map gic cpu registers\n"); + if (of_property_read_u32(node, "cpu-offset", &percpu_offset)) + percpu_offset = 0; + domain->of_node = of_node_get(node); - gic_init(gic_cnt, -1, dist_base, cpu_base); + gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset); if (parent) { irq = irq_of_parse_and_map(node, 0); diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c index f407a6b..d8e44a4 100644 --- a/arch/arm/common/pl330.c +++ b/arch/arm/common/pl330.c @@ -221,17 +221,6 @@ */ #define MCODE_BUFF_PER_REQ 256 -/* - * Mark a _pl330_req as free. - * We do it by writing DMAEND as the first instruction - * because no valid request is going to have DMAEND as - * its first instruction to execute. - */ -#define MARK_FREE(req) do { \ - _emit_END(0, (req)->mc_cpu); \ - (req)->mc_len = 0; \ - } while (0) - /* If the _pl330_req is available to the client */ #define IS_FREE(req) (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND) @@ -301,8 +290,10 @@ struct pl330_thread { struct pl330_dmac *dmac; /* Only two at a time */ struct _pl330_req req[2]; - /* Index of the last submitted request */ + /* Index of the last enqueued request */ unsigned lstenq; + /* Index of the last submitted request or -1 if the DMA is stopped */ + int req_running; }; enum pl330_dmac_state { @@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, writel(0, regs + DBGCMD); } +/* + * Mark a _pl330_req as free. + * We do it by writing DMAEND as the first instruction + * because no valid request is going to have DMAEND as + * its first instruction to execute. + */ +static void mark_free(struct pl330_thread *thrd, int idx) +{ + struct _pl330_req *req = &thrd->req[idx]; + + _emit_END(0, req->mc_cpu); + req->mc_len = 0; + + thrd->req_running = -1; +} + static inline u32 _state(struct pl330_thread *thrd) { void __iomem *regs = thrd->dmac->pinfo->base; @@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd) } } -/* If the request 'req' of thread 'thrd' is currently active */ -static inline bool _req_active(struct pl330_thread *thrd, - struct _pl330_req *req) -{ - void __iomem *regs = thrd->dmac->pinfo->base; - u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id)); - - if (IS_FREE(req)) - return false; - - return (pc >= buf && pc <= buf + req->mc_len) ? true : false; -} - -/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */ -static inline unsigned _thrd_active(struct pl330_thread *thrd) -{ - if (_req_active(thrd, &thrd->req[0])) - return 1; /* First req active */ - - if (_req_active(thrd, &thrd->req[1])) - return 2; /* Second req active */ - - return 0; -} - static void _stop(struct pl330_thread *thrd) { void __iomem *regs = thrd->dmac->pinfo->base; @@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd) struct _arg_GO go; unsigned ns; u8 insn[6] = {0, 0, 0, 0, 0, 0}; + int idx; /* Return if already ACTIVE */ if (_state(thrd) != PL330_STATE_STOPPED) return true; - if (!IS_FREE(&thrd->req[1 - thrd->lstenq])) - req = &thrd->req[1 - thrd->lstenq]; - else if (!IS_FREE(&thrd->req[thrd->lstenq])) - req = &thrd->req[thrd->lstenq]; - else - req = NULL; + idx = 1 - thrd->lstenq; + if (!IS_FREE(&thrd->req[idx])) + req = &thrd->req[idx]; + else { + idx = thrd->lstenq; + if (!IS_FREE(&thrd->req[idx])) + req = &thrd->req[idx]; + else + req = NULL; + } /* Return if no request */ if (!req || !req->r) @@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd) /* Only manager can execute GO */ _execute_DBGINSN(thrd, insn, true); + thrd->req_running = idx; + return true; } @@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data) thrd->req[0].r = NULL; thrd->req[1].r = NULL; - MARK_FREE(&thrd->req[0]); - MARK_FREE(&thrd->req[1]); + mark_free(thrd, 0); + mark_free(thrd, 1); /* Clear the reset flag */ pl330->dmac_tbd.reset_chan &= ~(1 << i); @@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi) thrd = &pl330->channels[id]; - active = _thrd_active(thrd); - if (!active) /* Aborted */ + active = thrd->req_running; + if (active == -1) /* Aborted */ continue; - active -= 1; - rqdone = &thrd->req[active]; - MARK_FREE(rqdone); + mark_free(thrd, active); /* Get going again ASAP */ _start(thrd); @@ -1480,13 +1467,19 @@ int pl330_update(const struct pl330_info *pi) /* Now that we are in no hurry, do the callbacks */ while (!list_empty(&pl330->req_done)) { + struct pl330_req *r; + rqdone = container_of(pl330->req_done.next, struct _pl330_req, rqd); list_del_init(&rqdone->rqd); + /* Detach the req */ + r = rqdone->r; + rqdone->r = NULL; + spin_unlock_irqrestore(&pl330->lock, flags); - _callback(rqdone->r, PL330_ERR_NONE); + _callback(r, PL330_ERR_NONE); spin_lock_irqsave(&pl330->lock, flags); } @@ -1509,7 +1502,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) struct pl330_thread *thrd = ch_id; struct pl330_dmac *pl330; unsigned long flags; - int ret = 0, active; + int ret = 0, active = thrd->req_running; if (!thrd || thrd->free || thrd->dmac->state == DYING) return -EINVAL; @@ -1525,28 +1518,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) thrd->req[0].r = NULL; thrd->req[1].r = NULL; - MARK_FREE(&thrd->req[0]); - MARK_FREE(&thrd->req[1]); + mark_free(thrd, 0); + mark_free(thrd, 1); break; case PL330_OP_ABORT: - active = _thrd_active(thrd); - /* Make sure the channel is stopped */ _stop(thrd); /* ABORT is only for the active req */ - if (!active) + if (active == -1) break; - active--; - thrd->req[active].r = NULL; - MARK_FREE(&thrd->req[active]); + mark_free(thrd, active); /* Start the next */ case PL330_OP_START: - if (!_thrd_active(thrd) && !_start(thrd)) + if ((active == -1) && !_start(thrd)) ret = -EIO; break; @@ -1587,14 +1576,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus) else pstatus->faulting = false; - active = _thrd_active(thrd); + active = thrd->req_running; - if (!active) { + if (active == -1) { /* Indicate that the thread is not running */ pstatus->top_req = NULL; pstatus->wait_req = NULL; } else { - active--; pstatus->top_req = thrd->req[active].r; pstatus->wait_req = !IS_FREE(&thrd->req[1 - active]) ? thrd->req[1 - active].r : NULL; @@ -1659,9 +1647,9 @@ void *pl330_request_channel(const struct pl330_info *pi) thrd->free = false; thrd->lstenq = 1; thrd->req[0].r = NULL; - MARK_FREE(&thrd->req[0]); + mark_free(thrd, 0); thrd->req[1].r = NULL; - MARK_FREE(&thrd->req[1]); + mark_free(thrd, 1); break; } } @@ -1767,14 +1755,14 @@ static inline void _reset_thread(struct pl330_thread *thrd) thrd->req[0].mc_bus = pl330->mcode_bus + (thrd->id * pi->mcbufsz); thrd->req[0].r = NULL; - MARK_FREE(&thrd->req[0]); + mark_free(thrd, 0); thrd->req[1].mc_cpu = thrd->req[0].mc_cpu + pi->mcbufsz / 2; thrd->req[1].mc_bus = thrd->req[0].mc_bus + pi->mcbufsz / 2; thrd->req[1].r = NULL; - MARK_FREE(&thrd->req[1]); + mark_free(thrd, 1); } static int dmac_alloc_threads(struct pl330_dmac *pl330) diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index 2393b5b..8794a34 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c @@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next, } static struct clock_event_device sp804_clockevent = { - .shift = 32, .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .set_mode = sp804_set_mode, .set_next_event = sp804_set_next_event, @@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq, clkevt_base = base; clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); - evt->name = name; evt->irq = irq; - evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift); - evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt); - evt->min_delta_ns = clockevent_delta2ns(0xf, evt); setup_irq(irq, &sp804_timer_irq); - clockevents_register_device(evt); + clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); } diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 01f18a4..dcb004a 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -19,17 +19,22 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include <linux/export.h> #include <linux/init.h> #include <linux/list.h> #include <linux/io.h> +#include <linux/irqdomain.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <linux/syscore_ops.h> #include <linux/device.h> #include <linux/amba/bus.h> +#include <asm/exception.h> #include <asm/mach/irq.h> #include <asm/hardware/vic.h> -#ifdef CONFIG_PM /** * struct vic_device - VIC PM device * @irq: The IRQ number for the base of the VIC. @@ -40,6 +45,7 @@ * @int_enable: Save for VIC_INT_ENABLE. * @soft_int: Save for VIC_INT_SOFT. * @protect: Save for VIC_PROTECT. + * @domain: The IRQ domain for the VIC. */ struct vic_device { void __iomem *base; @@ -50,13 +56,13 @@ struct vic_device { u32 int_enable; u32 soft_int; u32 protect; + struct irq_domain domain; }; /* we cannot allocate memory when VICs are initially registered */ static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; static int vic_id; -#endif /* CONFIG_PM */ /** * vic_init2 - common initialisation code @@ -156,39 +162,50 @@ static int __init vic_pm_init(void) return 0; } late_initcall(vic_pm_init); +#endif /* CONFIG_PM */ /** - * vic_pm_register - Register a VIC for later power management control + * vic_register() - Register a VIC. * @base: The base address of the VIC. * @irq: The base IRQ for the VIC. * @resume_sources: bitmask of interrupts allowed for resume sources. + * @node: The device tree node associated with the VIC. * * Register the VIC with the system device tree so that it can be notified * of suspend and resume requests and ensure that the correct actions are * taken to re-instate the settings on resume. + * + * This also configures the IRQ domain for the VIC. */ -static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) +static void __init vic_register(void __iomem *base, unsigned int irq, + u32 resume_sources, struct device_node *node) { struct vic_device *v; - if (vic_id >= ARRAY_SIZE(vic_devices)) + if (vic_id >= ARRAY_SIZE(vic_devices)) { printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); - else { - v = &vic_devices[vic_id]; - v->base = base; - v->resume_sources = resume_sources; - v->irq = irq; - vic_id++; + return; } + + v = &vic_devices[vic_id]; + v->base = base; + v->resume_sources = resume_sources; + v->irq = irq; + vic_id++; + + v->domain.irq_base = irq; + v->domain.nr_irq = 32; +#ifdef CONFIG_OF_IRQ + v->domain.of_node = of_node_get(node); +#endif /* CONFIG_OF */ + v->domain.ops = &irq_domain_simple_ops; + irq_domain_add(&v->domain); } -#else -static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } -#endif /* CONFIG_PM */ static void vic_ack_irq(struct irq_data *d) { void __iomem *base = irq_data_get_irq_chip_data(d); - unsigned int irq = d->irq & 31; + unsigned int irq = d->hwirq; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); /* moreover, clear the soft-triggered, in case it was the reason */ writel(1 << irq, base + VIC_INT_SOFT_CLEAR); @@ -197,14 +214,14 @@ static void vic_ack_irq(struct irq_data *d) static void vic_mask_irq(struct irq_data *d) { void __iomem *base = irq_data_get_irq_chip_data(d); - unsigned int irq = d->irq & 31; + unsigned int irq = d->hwirq; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); } static void vic_unmask_irq(struct irq_data *d) { void __iomem *base = irq_data_get_irq_chip_data(d); - unsigned int irq = d->irq & 31; + unsigned int irq = d->hwirq; writel(1 << irq, base + VIC_INT_ENABLE); } @@ -226,7 +243,7 @@ static struct vic_device *vic_from_irq(unsigned int irq) static int vic_set_wake(struct irq_data *d, unsigned int on) { struct vic_device *v = vic_from_irq(d->irq); - unsigned int off = d->irq & 31; + unsigned int off = d->hwirq; u32 bit = 1 << off; if (!v) @@ -301,7 +318,7 @@ static void __init vic_set_irq_sources(void __iomem *base, * and 020 within the page. We call this "second block". */ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, - u32 vic_sources) + u32 vic_sources, struct device_node *node) { unsigned int i; int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; @@ -328,17 +345,12 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, } vic_set_irq_sources(base, irq_start, vic_sources); + vic_register(base, irq_start, 0, node); } -/** - * vic_init - initialise a vectored interrupt controller - * @base: iomem base address - * @irq_start: starting interrupt number, must be muliple of 32 - * @vic_sources: bitmask of interrupt sources to allow - * @resume_sources: bitmask of interrupt sources to allow for resume - */ -void __init vic_init(void __iomem *base, unsigned int irq_start, - u32 vic_sources, u32 resume_sources) +static void __init __vic_init(void __iomem *base, unsigned int irq_start, + u32 vic_sources, u32 resume_sources, + struct device_node *node) { unsigned int i; u32 cellid = 0; @@ -356,7 +368,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, switch(vendor) { case AMBA_VENDOR_ST: - vic_init_st(base, irq_start, vic_sources); + vic_init_st(base, irq_start, vic_sources, node); return; default: printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n"); @@ -375,5 +387,81 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, vic_set_irq_sources(base, irq_start, vic_sources); - vic_pm_register(base, irq_start, resume_sources); + vic_register(base, irq_start, resume_sources, node); +} + +/** + * vic_init() - initialise a vectored interrupt controller + * @base: iomem base address + * @irq_start: starting interrupt number, must be muliple of 32 + * @vic_sources: bitmask of interrupt sources to allow + * @resume_sources: bitmask of interrupt sources to allow for resume + */ +void __init vic_init(void __iomem *base, unsigned int irq_start, + u32 vic_sources, u32 resume_sources) +{ + __vic_init(base, irq_start, vic_sources, resume_sources, NULL); +} + +#ifdef CONFIG_OF +int __init vic_of_init(struct device_node *node, struct device_node *parent) +{ + void __iomem *regs; + int irq_base; + + if (WARN(parent, "non-root VICs are not supported")) + return -EINVAL; + + regs = of_iomap(node, 0); + if (WARN_ON(!regs)) + return -EIO; + + irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id()); + if (WARN_ON(irq_base < 0)) + goto out_unmap; + + __vic_init(regs, irq_base, ~0, ~0, node); + + return 0; + + out_unmap: + iounmap(regs); + + return -EIO; +} +#endif /* CONFIG OF */ + +/* + * Handle each interrupt in a single VIC. Returns non-zero if we've + * handled at least one interrupt. This does a single read of the + * status register and handles all interrupts in order from LSB first. + */ +static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) +{ + u32 stat, irq; + int handled = 0; + + stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); + while (stat) { + irq = ffs(stat) - 1; + handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs); + stat &= ~(1 << irq); + handled = 1; + } + + return handled; +} + +/* + * Keep iterating over all registered VIC's until there are no pending + * interrupts. + */ +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs) +{ + int i, handled; + + do { + for (i = 0, handled = 0; i < vic_id; ++i) + handled |= handle_one_vic(&vic_devices[i], regs); + } while (handled); } diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig index 11a4192..cf497ce 100644 --- a/arch/arm/configs/imx_v4_v5_defconfig +++ b/arch/arm/configs/imx_v4_v5_defconfig @@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y CONFIG_ARCH_IMX_V4_V5=y CONFIG_ARCH_MX1ADS=y CONFIG_MACH_SCB9328=y +CONFIG_MACH_APF9328=y CONFIG_MACH_MX21ADS=y CONFIG_MACH_MX25_3DS=y -CONFIG_MACH_EUKREA_CPUIMX25=y +CONFIG_MACH_EUKREA_CPUIMX25SD=y CONFIG_MACH_MX27ADS=y CONFIG_MACH_PCM038=y CONFIG_MACH_CPUIMX27=y @@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_PHYSMAP=y CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_MXC=y CONFIG_MTD_UBI=y CONFIG_MISC_DEVICES=y CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y CONFIG_DM9000=y +CONFIG_SMC91X=y CONFIG_SMC911X=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set +CONFIG_SMSC_PHY=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set @@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y CONFIG_I2C_IMX=y CONFIG_SPI=y CONFIG_SPI_IMX=y +CONFIG_SPI_SPIDEV=y CONFIG_W1=y CONFIG_W1_MASTER_MXC=y CONFIG_W1_SLAVE_THERM=y @@ -139,6 +140,7 @@ CONFIG_MMC=y CONFIG_MMC_MXC=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y CONFIG_LEDS_MC13783=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig deleted file mode 100644 index c75c9fc..0000000 --- a/arch/arm/configs/pcontrol_g20_defconfig +++ /dev/null @@ -1,175 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-" -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_TREE_PREEMPT_RCU=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_NAMESPACES=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_KALLSYMS is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_LBDAF is not set -# CONFIG_BLK_DEV_BSG is not set -CONFIG_DEFAULT_DEADLINE=y -CONFIG_ARCH_AT91=y -CONFIG_ARCH_AT91SAM9G20=y -CONFIG_MACH_PCONTROL_G20=y -CONFIG_AT91_PROGRAMMABLE_CLOCKS=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw" -CONFIG_VFP=y -CONFIG_BINFMT_MISC=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_VLAN_8021Q=y -# CONFIG_WIRELESS is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHRAM=m -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ATMEL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_ATMEL_TCLIB=y -CONFIG_EEPROM_AT24=m -CONFIG_SCSI=m -# CONFIG_SCSI_PROC_FS is not set -CONFIG_BLK_DEV_SD=m -CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_LOWLEVEL is not set -CONFIG_NETDEVICES=y -CONFIG_MACVLAN=m -CONFIG_TUN=m -CONFIG_SMSC_PHY=m -CONFIG_BROADCOM_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MACB=y -CONFIG_SMSC911X=m -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_WLAN is not set -CONFIG_PPP=m -CONFIG_PPP_ASYNC=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_MPPE=m -CONFIG_INPUT_POLLDEV=y -CONFIG_INPUT_SPARSEKMAP=y -# CONFIG_INPUT_MOUSEDEV is not set -CONFIG_INPUT_EVDEV=m -CONFIG_INPUT_EVBUG=m -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=m -CONFIG_KEYBOARD_MATRIX=m -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=m -CONFIG_INPUT_GPIO_ROTARY_ENCODER=m -# CONFIG_SERIO is not set -# CONFIG_DEVKMEM is not set -CONFIG_SERIAL_ATMEL=y -CONFIG_SERIAL_ATMEL_CONSOLE=y -CONFIG_SERIAL_MAX3100=m -# CONFIG_LEGACY_PTYS is not set -# CONFIG_HW_RANDOM is not set -CONFIG_R3964=m -CONFIG_I2C=m -CONFIG_I2C_CHARDEV=m -# CONFIG_I2C_HELPER_AUTO is not set -CONFIG_I2C_GPIO=m -CONFIG_SPI=y -CONFIG_SPI_ATMEL=m -CONFIG_SPI_SPIDEV=m -CONFIG_GPIO_SYSFS=y -CONFIG_W1=m -CONFIG_W1_MASTER_GPIO=m -CONFIG_W1_SLAVE_DS2431=m -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -CONFIG_AT91SAM9X_WATCHDOG=y -# CONFIG_MFD_SUPPORT is not set -# CONFIG_HID_SUPPORT is not set -CONFIG_USB=y -# CONFIG_USB_DEVICE_CLASS is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=m -CONFIG_USB_LIBUSUAL=y -CONFIG_USB_SERIAL=m -CONFIG_USB_SERIAL_GENERIC=y -CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_GADGET=y -CONFIG_USB_ZERO=m -CONFIG_USB_ETH=m -CONFIG_USB_FILE_STORAGE=m -CONFIG_USB_G_SERIAL=m -CONFIG_USB_G_HID=m -CONFIG_MMC=y -CONFIG_MMC_UNSAFE_RESUME=y -CONFIG_MMC_ATMELMCI=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_AT91SAM9=y -CONFIG_AUXDISPLAY=y -CONFIG_UIO=y -CONFIG_UIO_PDRV=y -CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -CONFIG_IIO=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_ISO8859_15=y -CONFIG_NLS_UTF8=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ANSI_CPRNG=y -# CONFIG_CRYPTO_HW is not set -CONFIG_CRC_CCITT=y diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 29035e8..b6e65de 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -187,6 +187,17 @@ #endif /* + * Instruction barrier + */ + .macro instr_sync +#if __LINUX_ARM_ARCH__ >= 7 + isb +#elif __LINUX_ARM_ARCH__ == 6 + mcr p15, 0, r0, c7, c5, 4 +#endif + .endm + +/* * SMP data memory barrier */ .macro smp_dmb mode diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h index 9abe7a0..fac79dc 100644 --- a/arch/arm/include/asm/bug.h +++ b/arch/arm/include/asm/bug.h @@ -32,7 +32,6 @@ #define __BUG(__file, __line, __value) \ do { \ - BUILD_BUG_ON(sizeof(struct bug_entry) != 12); \ asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \ ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ "2:\t.asciz " #__file "\n" \ diff --git a/arch/arm/include/asm/cti.h b/arch/arm/include/asm/cti.h new file mode 100644 index 0000000..a0ada3e --- /dev/null +++ b/arch/arm/include/asm/cti.h @@ -0,0 +1,179 @@ +#ifndef __ASMARM_CTI_H +#define __ASMARM_CTI_H + +#include <asm/io.h> + +/* The registers' definition is from section 3.2 of + * Embedded Cross Trigger Revision: r0p0 + */ +#define CTICONTROL 0x000 +#define CTISTATUS 0x004 +#define CTILOCK 0x008 +#define CTIPROTECTION 0x00C +#define CTIINTACK 0x010 +#define CTIAPPSET 0x014 +#define CTIAPPCLEAR 0x018 +#define CTIAPPPULSE 0x01c +#define CTIINEN 0x020 +#define CTIOUTEN 0x0A0 +#define CTITRIGINSTATUS 0x130 +#define CTITRIGOUTSTATUS 0x134 +#define CTICHINSTATUS 0x138 +#define CTICHOUTSTATUS 0x13c +#define CTIPERIPHID0 0xFE0 +#define CTIPERIPHID1 0xFE4 +#define CTIPERIPHID2 0xFE8 +#define CTIPERIPHID3 0xFEC +#define CTIPCELLID0 0xFF0 +#define CTIPCELLID1 0xFF4 +#define CTIPCELLID2 0xFF8 +#define CTIPCELLID3 0xFFC + +/* The below are from section 3.6.4 of + * CoreSight v1.0 Architecture Specification + */ +#define LOCKACCESS 0xFB0 +#define LOCKSTATUS 0xFB4 + +/* write this value to LOCKACCESS will unlock the module, and + * other value will lock the module + */ +#define LOCKCODE 0xC5ACCE55 + +/** + * struct cti - cross trigger interface struct + * @base: mapped virtual address for the cti base + * @irq: irq number for the cti + * @trig_out_for_irq: triger out number which will cause + * the @irq happen + * + * cti struct used to operate cti registers. + */ +struct cti { + void __iomem *base; + int irq; + int trig_out_for_irq; +}; + +/** + * cti_init - initialize the cti instance + * @cti: cti instance + * @base: mapped virtual address for the cti base + * @irq: irq number for the cti + * @trig_out: triger out number which will cause + * the @irq happen + * + * called by machine code to pass the board dependent + * @base, @irq and @trig_out to cti. + */ +static inline void cti_init(struct cti *cti, + void __iomem *base, int irq, int trig_out) +{ + cti->base = base; + cti->irq = irq; + cti->trig_out_for_irq = trig_out; +} + +/** + * cti_map_trigger - use the @chan to map @trig_in to @trig_out + * @cti: cti instance + * @trig_in: trigger in number + * @trig_out: trigger out number + * @channel: channel number + * + * This function maps one trigger in of @trig_in to one trigger + * out of @trig_out using the channel @chan. + */ +static inline void cti_map_trigger(struct cti *cti, + int trig_in, int trig_out, int chan) +{ + void __iomem *base = cti->base; + unsigned long val; + + val = __raw_readl(base + CTIINEN + trig_in * 4); + val |= BIT(chan); + __raw_writel(val, base + CTIINEN + trig_in * 4); + + val = __raw_readl(base + CTIOUTEN + trig_out * 4); + val |= BIT(chan); + __raw_writel(val, base + CTIOUTEN + trig_out * 4); +} + +/** + * cti_enable - enable the cti module + * @cti: cti instance + * + * enable the cti module + */ +static inline void cti_enable(struct cti *cti) +{ + __raw_writel(0x1, cti->base + CTICONTROL); +} + +/** + * cti_disable - disable the cti module + * @cti: cti instance + * + * enable the cti module + */ +static inline void cti_disable(struct cti *cti) +{ + __raw_writel(0, cti->base + CTICONTROL); +} + +/** + * cti_irq_ack - clear the cti irq + * @cti: cti instance + * + * clear the cti irq + */ +static inline void cti_irq_ack(struct cti *cti) +{ + void __iomem *base = cti->base; + unsigned long val; + + val = __raw_readl(base + CTIINTACK); + val |= BIT(cti->trig_out_for_irq); + __raw_writel(val, base + CTIINTACK); +} + +/** + * cti_unlock - unlock cti module + * @cti: cti instance + * + * unlock the cti module, or else any writes to the cti + * module is not allowed. + */ +static inline void cti_unlock(struct cti *cti) +{ + void __iomem *base = cti->base; + unsigned long val; + + val = __raw_readl(base + LOCKSTATUS); + + if (val & 1) { + val = LOCKCODE; + __raw_writel(val, base + LOCKACCESS); + } +} + +/** + * cti_lock - lock cti module + * @cti: cti instance + * + * lock the cti module, so any writes to the cti + * module will be not allowed. + */ +static inline void cti_lock(struct cti *cti) +{ + void __iomem *base = cti->base; + unsigned long val; + + val = __raw_readl(base + LOCKSTATUS); + + if (!(val & 1)) { + val = ~LOCKCODE; + __raw_writel(val, base + LOCKACCESS); + } +} +#endif diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h new file mode 100644 index 0000000..0df7a2c --- /dev/null +++ b/arch/arm/include/asm/edac.h @@ -0,0 +1,48 @@ +/* + * Copyright 2011 Calxeda, Inc. + * Based on PPC version Copyright 2007 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef ASM_EDAC_H +#define ASM_EDAC_H +/* + * ECC atomic, DMA, SMP and interrupt safe scrub function. + * Implements the per arch atomic_scrub() that EDAC use for software + * ECC scrubbing. It reads memory and then writes back the original + * value, allowing the hardware to detect and correct memory errors. + */ +static inline void atomic_scrub(void *va, u32 size) +{ +#if __LINUX_ARM_ARCH__ >= 6 + unsigned int *virt_addr = va; + unsigned int temp, temp2; + unsigned int i; + + for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) { + /* Very carefully read and write to memory atomically + * so we are interrupt, DMA and SMP safe. + */ + __asm__ __volatile__("\n" + "1: ldrex %0, [%2]\n" + " strex %1, %0, [%2]\n" + " teq %1, #0\n" + " bne 1b\n" + : "=&r"(temp), "=&r"(temp2) + : "r"(virt_addr) + : "cc"); + } +#endif +} + +#endif diff --git a/arch/arm/include/asm/entry-macro-vic2.S b/arch/arm/include/asm/entry-macro-vic2.S deleted file mode 100644 index 3ceb85e..0000000 --- a/arch/arm/include/asm/entry-macro-vic2.S +++ /dev/null @@ -1,57 +0,0 @@ -/* arch/arm/include/asm/entry-macro-vic2.S - * - * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * Low-level IRQ helper macros for a device with two VICs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. -*/ - -/* This should be included from <mach/entry-macro.S> with the necessary - * defines for virtual addresses and IRQ bases for the two vics. - * - * The code needs the following defined: - * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ - * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ - * VA_VIC0 Virtual address of VIC0 - * VA_VIC1 Virtual address of VIC1 - * - * Note, code assumes VIC0's virtual address is an ARM immediate constant - * away from VIC1. -*/ - -#include <asm/hardware/vic.h> - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =VA_VIC0 - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - @ check the vic0 - mov \irqnr, #IRQ_VIC0_BASE + 31 - ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] - teq \irqstat, #0 - - @ otherwise try vic1 - addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) - addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE) - ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] - teqeq \irqstat, #0 - - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h index 11ad0bf..7151753 100644 --- a/arch/arm/include/asm/gpio.h +++ b/arch/arm/include/asm/gpio.h @@ -1,6 +1,10 @@ #ifndef _ARCH_ARM_GPIO_H #define _ARCH_ARM_GPIO_H +#if CONFIG_ARCH_NR_GPIO > 0 +#define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO +#endif + /* not all ARM platforms necessarily support this API ... */ #include <mach/gpio.h> diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h index ddf07a9..436e60b 100644 --- a/arch/arm/include/asm/hardirq.h +++ b/arch/arm/include/asm/hardirq.h @@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu); #define arch_irq_stat_cpu smp_irq_stat_cpu -#if NR_IRQS > 512 -#define HARDIRQ_BITS 10 -#elif NR_IRQS > 256 -#define HARDIRQ_BITS 9 -#else -#define HARDIRQ_BITS 8 -#endif - -/* - * The hardirq mask has to be large enough to have space - * for potentially all IRQ sources in the system nesting - * on a single CPU: - */ -#if (1 << HARDIRQ_BITS) < NR_IRQS -# error HARDIRQ_BITS is too low! -#endif - #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 #endif /* __ASM_HARDIRQ_H */ diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S deleted file mode 100644 index 74ebc80..0000000 --- a/arch/arm/include/asm/hardware/entry-macro-gic.S +++ /dev/null @@ -1,60 +0,0 @@ -/* - * arch/arm/include/asm/hardware/entry-macro-gic.S - * - * Low-level IRQ helper macros for GIC - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <asm/hardware/gic.h> - -#ifndef HAVE_GET_IRQNR_PREAMBLE - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm -#endif - -/* - * The interrupt numbering scheme is defined in the - * interrupt controller spec. To wit: - * - * Interrupts 0-15 are IPI - * 16-31 are local. We allow 30 to be used for the watchdog. - * 32-1020 are global - * 1021-1022 are reserved - * 1023 is "spurious" (no interrupt) - * - * A simple read from the controller will tell us the number of the highest - * priority enabled interrupt. We then just need to check whether it is in the - * valid range for an IRQ (30-1020 inclusive). - */ - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - ldr \irqstat, [\base, #GIC_CPU_INTACK] - /* bits 12-10 = src CPU, 9-0 = int # */ - - ldr \tmp, =1021 - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #15 - cmpcc \irqnr, \irqnr - cmpne \irqnr, \tmp - cmpcs \irqnr, \irqnr - .endm - -/* We assume that irqstat (the raw value of the IRQ acknowledge - * register) is preserved from the macro above. - * If there is an IPI, we immediately signal end of interrupt on the - * controller, since this requires the original irqstat value which - * we won't easily be able to recreate later. - */ - - .macro test_for_ipi, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #16 - strcc \irqstat, [\base, #GIC_CPU_EOI] - cmpcs \irqnr, \irqnr - .endm diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 3e91f22..4bdfe00 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -36,30 +36,22 @@ #include <linux/irqdomain.h> struct device_node; -extern void __iomem *gic_cpu_base_addr; extern struct irq_chip gic_arch_extn; -void gic_init(unsigned int, int, void __iomem *, void __iomem *); +void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, + u32 offset); int gic_of_init(struct device_node *node, struct device_node *parent); void gic_secondary_init(unsigned int); +void gic_handle_irq(struct pt_regs *regs); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); -struct gic_chip_data { - void __iomem *dist_base; - void __iomem *cpu_base; -#ifdef CONFIG_CPU_PM - u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; - u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; - u32 saved_spi_target[DIV_ROUND_UP(1020, 4)]; - u32 __percpu *saved_ppi_enable; - u32 __percpu *saved_ppi_conf; -#endif -#ifdef CONFIG_IRQ_DOMAIN - struct irq_domain domain; -#endif - unsigned int gic_irqs; -}; +static inline void gic_init(unsigned int nr, int start, + void __iomem *dist , void __iomem *cpu) +{ + gic_init_bases(nr, start, dist, cpu, 0); +} + #endif #endif diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h index 5daea29..077c323 100644 --- a/arch/arm/include/asm/hardware/iop3xx.h +++ b/arch/arm/include/asm/hardware/iop3xx.h @@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void); void iop3xx_map_io(void); void iop_init_cp6_handler(void); void iop_init_time(unsigned long tickrate); +void iop3xx_restart(char, const char *); static inline u32 read_tmr0(void) { diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h index 5d72550..f42ebd6 100644 --- a/arch/arm/include/asm/hardware/vic.h +++ b/arch/arm/include/asm/hardware/vic.h @@ -41,7 +41,15 @@ #define VIC_PL192_VECT_ADDR 0xF00 #ifndef __ASSEMBLY__ +#include <linux/compiler.h> +#include <linux/types.h> + +struct device_node; +struct pt_regs; + void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); -#endif +int vic_of_init(struct device_node *node, struct device_node *parent); +void vic_handle_irq(struct pt_regs *regs); +#endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm/include/asm/idmap.h b/arch/arm/include/asm/idmap.h new file mode 100644 index 0000000..bf863ed --- /dev/null +++ b/arch/arm/include/asm/idmap.h @@ -0,0 +1,14 @@ +#ifndef __ASM_IDMAP_H +#define __ASM_IDMAP_H + +#include <linux/compiler.h> +#include <asm/pgtable.h> + +/* Tag a function as requiring to be executed via an identity mapping. */ +#define __idmap __section(.idmap.text) noinline notrace + +extern pgd_t *idmap_pgd; + +void setup_mm_for_reboot(void); + +#endif /* __ASM_IDMAP_H */ diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 2b0efc3..bcb0c88 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h @@ -31,10 +31,10 @@ struct machine_desc { unsigned int video_start; /* start of video RAM */ unsigned int video_end; /* end of video RAM */ - unsigned int reserve_lp0 :1; /* never has lp0 */ - unsigned int reserve_lp1 :1; /* never has lp1 */ - unsigned int reserve_lp2 :1; /* never has lp2 */ - unsigned int soft_reboot :1; /* soft reboot */ + unsigned char reserve_lp0 :1; /* never has lp0 */ + unsigned char reserve_lp1 :1; /* never has lp1 */ + unsigned char reserve_lp2 :1; /* never has lp2 */ + char restart_mode; /* default restart mode */ void (*fixup)(struct tag *, char **, struct meminfo *); void (*reserve)(void);/* reserve mem blocks */ @@ -46,6 +46,7 @@ struct machine_desc { #ifdef CONFIG_MULTI_IRQ_HANDLER void (*handle_irq)(struct pt_regs *); #endif + void (*restart)(char, const char *); }; /* diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h new file mode 100644 index 0000000..c0efdd6 --- /dev/null +++ b/arch/arm/include/asm/opcodes.h @@ -0,0 +1,20 @@ +/* + * arch/arm/include/asm/opcodes.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARM_OPCODES_H +#define __ASM_ARM_OPCODES_H + +#ifndef __ASSEMBLY__ +extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); +#endif + +#define ARM_OPCODE_CONDTEST_FAIL 0 +#define ARM_OPCODE_CONDTEST_PASS 1 +#define ARM_OPCODE_CONDTEST_UNCOND 2 + +#endif /* __ASM_ARM_OPCODES_H */ diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h index ca94653..97b440c 100644 --- a/arch/arm/include/asm/page.h +++ b/arch/arm/include/asm/page.h @@ -151,7 +151,11 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) extern void copy_page(void *to, const void *from); +#ifdef CONFIG_ARM_LPAE +#include <asm/pgtable-3level-types.h> +#else #include <asm/pgtable-2level-types.h> +#endif #endif /* CONFIG_MMU */ diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h index 0f8e382..99cfe36 100644 --- a/arch/arm/include/asm/perf_event.h +++ b/arch/arm/include/asm/perf_event.h @@ -32,7 +32,4 @@ enum arm_perf_pmu_ids { extern enum arm_perf_pmu_ids armpmu_get_pmu_id(void); -extern int -armpmu_get_max_events(void); - #endif /* __ARM_PERF_EVENT_H__ */ diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h index 3e08fd3..943504f 100644 --- a/arch/arm/include/asm/pgalloc.h +++ b/arch/arm/include/asm/pgalloc.h @@ -25,12 +25,34 @@ #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) +#ifdef CONFIG_ARM_LPAE + +static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) +{ + return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT); +} + +static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) +{ + BUG_ON((unsigned long)pmd & (PAGE_SIZE-1)); + free_page((unsigned long)pmd); +} + +static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) +{ + set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE)); +} + +#else /* !CONFIG_ARM_LPAE */ + /* * Since we have only two-level page tables, these are trivial */ #define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); }) #define pmd_free(mm, pmd) do { } while (0) -#define pgd_populate(mm,pmd,pte) BUG() +#define pud_populate(mm,pmd,pte) BUG() + +#endif /* CONFIG_ARM_LPAE */ extern pgd_t *pgd_alloc(struct mm_struct *mm); extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); @@ -109,7 +131,9 @@ static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte, { pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot; pmdp[0] = __pmd(pmdval); +#ifndef CONFIG_ARM_LPAE pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); +#endif flush_pmd_entry(pmdp); } diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h index 470457e..2317a71 100644 --- a/arch/arm/include/asm/pgtable-2level.h +++ b/arch/arm/include/asm/pgtable-2level.h @@ -140,4 +140,45 @@ #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ #define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) +#ifndef __ASSEMBLY__ + +/* + * The "pud_xxx()" functions here are trivial when the pmd is folded into + * the pud: the pud entry is never bad, always exists, and can't be set or + * cleared. + */ +#define pud_none(pud) (0) +#define pud_bad(pud) (0) +#define pud_present(pud) (1) +#define pud_clear(pudp) do { } while (0) +#define set_pud(pud,pudp) do { } while (0) + +static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) +{ + return (pmd_t *)pud; +} + +#define pmd_bad(pmd) (pmd_val(pmd) & 2) + +#define copy_pmd(pmdpd,pmdps) \ + do { \ + pmdpd[0] = pmdps[0]; \ + pmdpd[1] = pmdps[1]; \ + flush_pmd_entry(pmdpd); \ + } while (0) + +#define pmd_clear(pmdp) \ + do { \ + pmdp[0] = __pmd(0); \ + pmdp[1] = __pmd(0); \ + clean_pmd_entry(pmdp); \ + } while (0) + +/* we don't need complex calculations here as the pmd is folded into the pgd */ +#define pmd_addr_end(addr,end) (end) + +#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) + +#endif /* __ASSEMBLY__ */ + #endif /* _ASM_PGTABLE_2LEVEL_H */ diff --git a/arch/arm/include/asm/pgtable-3level-hwdef.h b/arch/arm/include/asm/pgtable-3level-hwdef.h new file mode 100644 index 0000000..d795282 --- /dev/null +++ b/arch/arm/include/asm/pgtable-3level-hwdef.h @@ -0,0 +1,77 @@ +/* + * arch/arm/include/asm/pgtable-3level-hwdef.h + * + * Copyright (C) 2011 ARM Ltd. + * Author: Catalin Marinas <catalin.marinas@arm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef _ASM_PGTABLE_3LEVEL_HWDEF_H +#define _ASM_PGTABLE_3LEVEL_HWDEF_H + +/* + * Hardware page table definitions. + * + * + Level 1/2 descriptor + * - common + */ +#define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0) +#define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) +#define PMD_TYPE_TABLE (_AT(pmdval_t, 3) << 0) +#define PMD_TYPE_SECT (_AT(pmdval_t, 1) << 0) +#define PMD_BIT4 (_AT(pmdval_t, 0)) +#define PMD_DOMAIN(x) (_AT(pmdval_t, 0)) + +/* + * - section + */ +#define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) +#define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) +#define PMD_SECT_S (_AT(pmdval_t, 3) << 8) +#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10) +#define PMD_SECT_nG (_AT(pmdval_t, 1) << 11) +#define PMD_SECT_XN (_AT(pmdval_t, 1) << 54) +#define PMD_SECT_AP_WRITE (_AT(pmdval_t, 0)) +#define PMD_SECT_AP_READ (_AT(pmdval_t, 0)) +#define PMD_SECT_TEX(x) (_AT(pmdval_t, 0)) + +/* + * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). + */ +#define PMD_SECT_UNCACHED (_AT(pmdval_t, 0) << 2) /* strongly ordered */ +#define PMD_SECT_BUFFERED (_AT(pmdval_t, 1) << 2) /* normal non-cacheable */ +#define PMD_SECT_WT (_AT(pmdval_t, 2) << 2) /* normal inner write-through */ +#define PMD_SECT_WB (_AT(pmdval_t, 3) << 2) /* normal inner write-back */ +#define PMD_SECT_WBWA (_AT(pmdval_t, 7) << 2) /* normal inner write-alloc */ + +/* + * + Level 3 descriptor (PTE) + */ +#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) +#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0) +#define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0) +#define PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) /* AttrIndx[0] */ +#define PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* AttrIndx[1] */ +#define PTE_EXT_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ +#define PTE_EXT_AF (_AT(pteval_t, 1) << 10) /* Access Flag */ +#define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* nG */ +#define PTE_EXT_XN (_AT(pteval_t, 1) << 54) /* XN */ + +/* + * 40-bit physical address supported. + */ +#define PHYS_MASK_SHIFT (40) +#define PHYS_MASK ((1ULL << PHYS_MASK_SHIFT) - 1) + +#endif diff --git a/arch/arm/include/asm/pgtable-3level-types.h b/arch/arm/include/asm/pgtable-3level-types.h new file mode 100644 index 0000000..921aa30 --- /dev/null +++ b/arch/arm/include/asm/pgtable-3level-types.h @@ -0,0 +1,70 @@ +/* + * arch/arm/include/asm/pgtable-3level-types.h + * + * Copyright (C) 2011 ARM Ltd. + * Author: Catalin Marinas <catalin.marinas@arm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef _ASM_PGTABLE_3LEVEL_TYPES_H +#define _ASM_PGTABLE_3LEVEL_TYPES_H + +#include <asm/types.h> + +typedef u64 pteval_t; +typedef u64 pmdval_t; +typedef u64 pgdval_t; + +#undef STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS + +/* + * These are used to make use of C type-checking.. + */ +typedef struct { pteval_t pte; } pte_t; +typedef struct { pmdval_t pmd; } pmd_t; +typedef struct { pgdval_t pgd; } pgd_t; +typedef struct { pteval_t pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define pmd_val(x) ((x).pmd) +#define pgd_val(x) ((x).pgd) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgd(x) ((pgd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#else /* !STRICT_MM_TYPECHECKS */ + +typedef pteval_t pte_t; +typedef pmdval_t pmd_t; +typedef pgdval_t pgd_t; +typedef pteval_t pgprot_t; + +#define pte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) (x) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __pmd(x) (x) +#define __pgd(x) (x) +#define __pgprot(x) (x) + +#endif /* STRICT_MM_TYPECHECKS */ + +#endif /* _ASM_PGTABLE_3LEVEL_TYPES_H */ diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h new file mode 100644 index 0000000..759af70 --- /dev/null +++ b/arch/arm/include/asm/pgtable-3level.h @@ -0,0 +1,155 @@ +/* + * arch/arm/include/asm/pgtable-3level.h + * + * Copyright (C) 2011 ARM Ltd. + * Author: Catalin Marinas <catalin.marinas@arm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef _ASM_PGTABLE_3LEVEL_H +#define _ASM_PGTABLE_3LEVEL_H + +/* + * With LPAE, there are 3 levels of page tables. Each level has 512 entries of + * 8 bytes each, occupying a 4K page. The first level table covers a range of + * 512GB, each entry representing 1GB. Since we are limited to 4GB input + * address range, only 4 entries in the PGD are used. + * + * There are enough spare bits in a page table entry for the kernel specific + * state. + */ +#define PTRS_PER_PTE 512 +#define PTRS_PER_PMD 512 +#define PTRS_PER_PGD 4 + +#define PTE_HWTABLE_PTRS (PTRS_PER_PTE) +#define PTE_HWTABLE_OFF (0) +#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64)) + +/* + * PGDIR_SHIFT determines the size a top-level page table entry can map. + */ +#define PGDIR_SHIFT 30 + +/* + * PMD_SHIFT determines the size a middle-level page table entry can map. + */ +#define PMD_SHIFT 21 + +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) + +/* + * section address mask and size definitions. + */ +#define SECTION_SHIFT 21 +#define SECTION_SIZE (1UL << SECTION_SHIFT) +#define SECTION_MASK (~(SECTION_SIZE-1)) + +#define USER_PTRS_PER_PGD (PAGE_OFFSET / PGDIR_SIZE) + +/* + * "Linux" PTE definitions for LPAE. + * + * These bits overlap with the hardware bits but the naming is preserved for + * consistency with the classic page table format. + */ +#define L_PTE_PRESENT (_AT(pteval_t, 3) << 0) /* Valid */ +#define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */ +#define L_PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) /* AttrIndx[0] */ +#define L_PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* AttrIndx[1] */ +#define L_PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */ +#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */ +#define L_PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ +#define L_PTE_YOUNG (_AT(pteval_t, 1) << 10) /* AF */ +#define L_PTE_XN (_AT(pteval_t, 1) << 54) /* XN */ +#define L_PTE_DIRTY (_AT(pteval_t, 1) << 55) /* unused */ +#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 56) /* unused */ + +/* + * To be used in assembly code with the upper page attributes. + */ +#define L_PTE_XN_HIGH (1 << (54 - 32)) +#define L_PTE_DIRTY_HIGH (1 << (55 - 32)) + +/* + * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). + */ +#define L_PTE_MT_UNCACHED (_AT(pteval_t, 0) << 2) /* strongly ordered */ +#define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 1) << 2) /* normal non-cacheable */ +#define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 2) << 2) /* normal inner write-through */ +#define L_PTE_MT_WRITEBACK (_AT(pteval_t, 3) << 2) /* normal inner write-back */ +#define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 7) << 2) /* normal inner write-alloc */ +#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 4) << 2) /* device */ +#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 4) << 2) /* device */ +#define L_PTE_MT_DEV_WC (_AT(pteval_t, 1) << 2) /* normal non-cacheable */ +#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 3) << 2) /* normal inner write-back */ +#define L_PTE_MT_MASK (_AT(pteval_t, 7) << 2) + +/* + * Software PGD flags. + */ +#define L_PGD_SWAPPER (_AT(pgdval_t, 1) << 55) /* swapper_pg_dir entry */ + +#ifndef __ASSEMBLY__ + +#define pud_none(pud) (!pud_val(pud)) +#define pud_bad(pud) (!(pud_val(pud) & 2)) +#define pud_present(pud) (pud_val(pud)) + +#define pud_clear(pudp) \ + do { \ + *pudp = __pud(0); \ + clean_pmd_entry(pudp); \ + } while (0) + +#define set_pud(pudp, pud) \ + do { \ + *pudp = pud; \ + flush_pmd_entry(pudp); \ + } while (0) + +static inline pmd_t *pud_page_vaddr(pud_t pud) +{ + return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK); +} + +/* Find an entry in the second-level page table.. */ +#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) +static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) +{ + return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr); +} + +#define pmd_bad(pmd) (!(pmd_val(pmd) & 2)) + +#define copy_pmd(pmdpd,pmdps) \ + do { \ + *pmdpd = *pmdps; \ + flush_pmd_entry(pmdpd); \ + } while (0) + +#define pmd_clear(pmdp) \ + do { \ + *pmdp = __pmd(0); \ + clean_pmd_entry(pmdp); \ + } while (0) + +#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext))) + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_PGTABLE_3LEVEL_H */ diff --git a/arch/arm/include/asm/pgtable-hwdef.h b/arch/arm/include/asm/pgtable-hwdef.h index 1831111..8426229 100644 --- a/arch/arm/include/asm/pgtable-hwdef.h +++ b/arch/arm/include/asm/pgtable-hwdef.h @@ -10,6 +10,10 @@ #ifndef _ASMARM_PGTABLE_HWDEF_H #define _ASMARM_PGTABLE_HWDEF_H +#ifdef CONFIG_ARM_LPAE +#include <asm/pgtable-3level-hwdef.h> +#else #include <asm/pgtable-2level-hwdef.h> +#endif #endif diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 9451dce..f66626d 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -11,20 +11,24 @@ #define _ASMARM_PGTABLE_H #include <linux/const.h> -#include <asm-generic/4level-fixup.h> #include <asm/proc-fns.h> #ifndef CONFIG_MMU +#include <asm-generic/4level-fixup.h> #include "pgtable-nommu.h" #else +#include <asm-generic/pgtable-nopud.h> #include <asm/memory.h> -#include <mach/vmalloc.h> #include <asm/pgtable-hwdef.h> +#ifdef CONFIG_ARM_LPAE +#include <asm/pgtable-3level.h> +#else #include <asm/pgtable-2level.h> +#endif /* * Just any arbitrary offset to the start of the vmalloc VM area: the @@ -33,15 +37,10 @@ * any out-of-bounds memory accesses will hopefully be caught. * The vmalloc() routines leaves a hole of 4kB between each vmalloced * area for the same reason. ;) - * - * Note that platforms may override VMALLOC_START, but they must provide - * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space, - * which may not overlap IO space. */ -#ifndef VMALLOC_START #define VMALLOC_OFFSET (8*1024*1024) #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) -#endif +#define VMALLOC_END 0xff000000UL #define LIBRARY_TEXT_START 0x0c000000 @@ -163,39 +162,8 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* to find an entry in a kernel page-table-directory */ #define pgd_offset_k(addr) pgd_offset(&init_mm, addr) -/* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - */ -#define pgd_none(pgd) (0) -#define pgd_bad(pgd) (0) -#define pgd_present(pgd) (1) -#define pgd_clear(pgdp) do { } while (0) -#define set_pgd(pgd,pgdp) do { } while (0) -#define set_pud(pud,pudp) do { } while (0) - - -/* Find an entry in the second-level page table.. */ -#define pmd_offset(dir, addr) ((pmd_t *)(dir)) - #define pmd_none(pmd) (!pmd_val(pmd)) #define pmd_present(pmd) (pmd_val(pmd)) -#define pmd_bad(pmd) (pmd_val(pmd) & 2) - -#define copy_pmd(pmdpd,pmdps) \ - do { \ - pmdpd[0] = pmdps[0]; \ - pmdpd[1] = pmdps[1]; \ - flush_pmd_entry(pmdpd); \ - } while (0) - -#define pmd_clear(pmdp) \ - do { \ - pmdp[0] = __pmd(0); \ - pmdp[1] = __pmd(0); \ - clean_pmd_entry(pmdp); \ - } while (0) static inline pte_t *pmd_page_vaddr(pmd_t pmd) { @@ -204,10 +172,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) -/* we don't need complex calculations here as the pmd is folded into the pgd */ -#define pmd_addr_end(addr,end) (end) - - #ifndef CONFIG_HIGHPTE #define __pte_map(pmd) pmd_page_vaddr(*(pmd)) #define __pte_unmap(pte) do { } while (0) @@ -229,7 +193,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pte_page(pte) pfn_to_page(pte_pfn(pte)) #define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) -#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) #if __LINUX_ARM_ARCH__ < 6 @@ -336,6 +299,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) * We provide our own arch_get_unmapped_area to cope with VIPT caches. */ #define HAVE_ARCH_UNMAPPED_AREA +#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN /* * remap a physical page `pfn' of size `size' with page protection `prot' @@ -346,9 +310,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pgtable_cache_init() do { } while (0) -void identity_mapping_add(pgd_t *, unsigned long, unsigned long); -void identity_mapping_del(pgd_t *, unsigned long, unsigned long); - #endif /* !__ASSEMBLY__ */ #endif /* CONFIG_MMU */ diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h index 0bda22c..b5a5be2 100644 --- a/arch/arm/include/asm/pmu.h +++ b/arch/arm/include/asm/pmu.h @@ -27,13 +27,22 @@ enum arm_pmu_type { /* * struct arm_pmu_platdata - ARM PMU platform data * - * @handle_irq: an optional handler which will be called from the interrupt and - * passed the address of the low level handler, and can be used to implement - * any platform specific handling before or after calling it. + * @handle_irq: an optional handler which will be called from the + * interrupt and passed the address of the low level handler, + * and can be used to implement any platform specific handling + * before or after calling it. + * @enable_irq: an optional handler which will be called after + * request_irq and be used to handle some platform specific + * irq enablement + * @disable_irq: an optional handler which will be called before + * free_irq and be used to handle some platform specific + * irq disablement */ struct arm_pmu_platdata { irqreturn_t (*handle_irq)(int irq, void *dev, irq_handler_t pmu_handler); + void (*enable_irq)(int irq); + void (*disable_irq)(int irq); }; #ifdef CONFIG_CPU_HAS_PMU diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h index 9e92cb20..f3628fb 100644 --- a/arch/arm/include/asm/proc-fns.h +++ b/arch/arm/include/asm/proc-fns.h @@ -65,7 +65,11 @@ extern struct processor { * Set a possibly extended PTE. Non-extended PTEs should * ignore 'ext'. */ +#ifdef CONFIG_ARM_LPAE + void (*set_pte_ext)(pte_t *ptep, pte_t pte); +#else void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); +#endif /* Suspend/resume */ unsigned int suspend_size; @@ -79,7 +83,11 @@ extern void cpu_proc_fin(void); extern int cpu_do_idle(void); extern void cpu_dcache_clean_area(void *, int); extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); +#ifdef CONFIG_ARM_LPAE +extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte); +#else extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); +#endif extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); /* These three are private to arch/arm/kernel/suspend.c */ @@ -107,6 +115,18 @@ extern void cpu_resume(void); #define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm) +#ifdef CONFIG_ARM_LPAE +#define cpu_get_pgd() \ + ({ \ + unsigned long pg, pg2; \ + __asm__("mrrc p15, 0, %0, %1, c2" \ + : "=r" (pg), "=r" (pg2) \ + : \ + : "cc"); \ + pg &= ~(PTRS_PER_PGD*sizeof(pgd_t)-1); \ + (pgd_t *)phys_to_virt(pg); \ + }) +#else #define cpu_get_pgd() \ ({ \ unsigned long pg; \ @@ -115,6 +135,7 @@ extern void cpu_resume(void); pg &= ~0x3fff; \ (pgd_t *)phys_to_virt(pg); \ }) +#endif #endif diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index b2d9df5..ce280b8 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h @@ -123,6 +123,8 @@ static inline void prefetch(const void *ptr) #endif +#define HAVE_ARCH_PICK_MMAP_LAYOUT + #endif #endif /* __ASM_ARM_PROCESSOR_H */ diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index c8e6ddf..e3f7572 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h @@ -8,113 +8,7 @@ #ifndef ASM_SCHED_CLOCK #define ASM_SCHED_CLOCK -#include <linux/kernel.h> -#include <linux/types.h> - -struct clock_data { - u64 epoch_ns; - u32 epoch_cyc; - u32 epoch_cyc_copy; - u32 mult; - u32 shift; -}; - -#define DEFINE_CLOCK_DATA(name) struct clock_data name - -static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) -{ - return (cyc * mult) >> shift; -} - -/* - * Atomically update the sched_clock epoch. Your update callback will - * be called from a timer before the counter wraps - read the current - * counter value, and call this function to safely move the epochs - * forward. Only use this from the update callback. - */ -static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask) -{ - unsigned long flags; - u64 ns = cd->epoch_ns + - cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift); - - /* - * Write epoch_cyc and epoch_ns in a way that the update is - * detectable in cyc_to_fixed_sched_clock(). - */ - raw_local_irq_save(flags); - cd->epoch_cyc = cyc; - smp_wmb(); - cd->epoch_ns = ns; - smp_wmb(); - cd->epoch_cyc_copy = cyc; - raw_local_irq_restore(flags); -} - -/* - * If your clock rate is known at compile time, using this will allow - * you to optimize the mult/shift loads away. This is paired with - * init_fixed_sched_clock() to ensure that your mult/shift are correct. - */ -static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd, - u32 cyc, u32 mask, u32 mult, u32 shift) -{ - u64 epoch_ns; - u32 epoch_cyc; - - /* - * Load the epoch_cyc and epoch_ns atomically. We do this by - * ensuring that we always write epoch_cyc, epoch_ns and - * epoch_cyc_copy in strict order, and read them in strict order. - * If epoch_cyc and epoch_cyc_copy are not equal, then we're in - * the middle of an update, and we should repeat the load. - */ - do { - epoch_cyc = cd->epoch_cyc; - smp_rmb(); - epoch_ns = cd->epoch_ns; - smp_rmb(); - } while (epoch_cyc != cd->epoch_cyc_copy); - - return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift); -} - -/* - * Otherwise, you need to use this, which will obtain the mult/shift - * from the clock_data structure. Use init_sched_clock() with this. - */ -static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd, - u32 cyc, u32 mask) -{ - return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift); -} - -/* - * Initialize the clock data - calculate the appropriate multiplier - * and shift. Also setup a timer to ensure that the epoch is refreshed - * at the appropriate time interval, which will call your update - * handler. - */ -void init_sched_clock(struct clock_data *, void (*)(void), - unsigned int, unsigned long); - -/* - * Use this initialization function rather than init_sched_clock() if - * you're using cyc_to_fixed_sched_clock, which will warn if your - * constants are incorrect. - */ -static inline void init_fixed_sched_clock(struct clock_data *cd, - void (*update)(void), unsigned int bits, unsigned long rate, - u32 mult, u32 shift) -{ - init_sched_clock(cd, update, bits, rate); - if (cd->mult != mult || cd->shift != shift) { - pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n" - "sched_clock: fix multiply/shift to avoid scheduler hiccups\n", - mult, shift, cd->mult, cd->shift); - } -} - extern void sched_clock_postinit(void); +extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); #endif diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index 915696d..23ebc0c 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h @@ -192,11 +192,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn } /* * Memory map description */ -#ifdef CONFIG_ARCH_EP93XX -# define NR_BANKS 16 -#else -# define NR_BANKS 8 -#endif +#define NR_BANKS CONFIG_ARM_NR_BANKS struct membank { phys_addr_t start; diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h index 9997ad2..32ee164 100644 --- a/arch/arm/include/asm/swab.h +++ b/arch/arm/include/asm/swab.h @@ -24,12 +24,13 @@ #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 -static inline __attribute_const__ __u16 __arch_swab16(__u16 x) +static inline __attribute_const__ __u32 __arch_swahb32(__u32 x) { __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x)); return x; } -#define __arch_swab16 __arch_swab16 +#define __arch_swahb32 __arch_swahb32 +#define __arch_swab16(x) ((__u16)__arch_swahb32(x)) static inline __attribute_const__ __u32 __arch_swab32(__u32 x) { diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 984014b..e4c96cc 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -80,6 +80,14 @@ struct siginfo; void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, unsigned long err, unsigned long trap); +#ifdef CONFIG_ARM_LPAE +#define FAULT_CODE_ALIGNMENT 33 +#define FAULT_CODE_DEBUG 34 +#else +#define FAULT_CODE_ALIGNMENT 1 +#define FAULT_CODE_DEBUG 2 +#endif + void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name); @@ -100,7 +108,7 @@ extern void __show_regs(struct pt_regs *); extern int __pure cpu_architecture(void); extern void cpu_init(void); -void arm_machine_restart(char mode, const char *cmd); +void soft_restart(unsigned long); extern void (*arm_pm_restart)(char str, const char *cmd); #define UDBG_UNDEFINED (1 << 0) diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h index 265f908..5d3ed7e3 100644 --- a/arch/arm/include/asm/tlb.h +++ b/arch/arm/include/asm/tlb.h @@ -202,8 +202,18 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, tlb_remove_page(tlb, pte); } +static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, + unsigned long addr) +{ +#ifdef CONFIG_ARM_LPAE + tlb_add_flush(tlb, addr); + tlb_remove_page(tlb, virt_to_page(pmdp)); +#endif +} + #define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr) -#define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) +#define pmd_free_tlb(tlb, pmdp, addr) __pmd_free_tlb(tlb, pmdp, addr) +#define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp) #define tlb_migrate_finish(mm) do { } while (0) diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 16eed6a..43b740d 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -13,7 +13,7 @@ CFLAGS_REMOVE_return_address.o = -pg # Object file lists. -obj-y := elf.o entry-armv.o entry-common.o irq.o \ +obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \ process.o ptrace.o return_address.o setup.o signal.o \ sys_arm.o stacktrace.o time.o traps.o diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index b145f16..3a456c6 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -36,12 +36,11 @@ #ifdef CONFIG_MULTI_IRQ_HANDLER ldr r1, =handle_arch_irq mov r0, sp - ldr r1, [r1] adr lr, BSYM(9997f) - teq r1, #0 - movne pc, r1 -#endif + ldr pc, [r1] +#else arch_irq_handler_default +#endif 9997: .endm diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 08c82fd..14e277d 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -39,8 +39,14 @@ #error KERNEL_RAM_VADDR must start at 0xXXXX8000 #endif +#ifdef CONFIG_ARM_LPAE + /* LPAE requires an additional page for the PGD */ +#define PG_DIR_SIZE 0x5000 +#define PMD_ORDER 3 +#else #define PG_DIR_SIZE 0x4000 #define PMD_ORDER 2 +#endif .globl swapper_pg_dir .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE @@ -164,17 +170,36 @@ __create_page_tables: teq r0, r6 bne 1b +#ifdef CONFIG_ARM_LPAE + /* + * Build the PGD table (first level) to point to the PMD table. A PGD + * entry is 64-bit wide. + */ + mov r0, r4 + add r3, r4, #0x1000 @ first PMD table address + orr r3, r3, #3 @ PGD block type + mov r6, #4 @ PTRS_PER_PGD + mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER +1: str r3, [r0], #4 @ set bottom PGD entry bits + str r7, [r0], #4 @ set top PGD entry bits + add r3, r3, #0x1000 @ next PMD table + subs r6, r6, #1 + bne 1b + + add r4, r4, #0x1000 @ point to the PMD tables +#endif + ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags /* * Create identity mapping to cater for __enable_mmu. * This identity mapping will be removed by paging_init(). */ - adr r0, __enable_mmu_loc + adr r0, __turn_mmu_on_loc ldmia r0, {r3, r5, r6} sub r0, r0, r3 @ virt->phys offset - add r5, r5, r0 @ phys __enable_mmu - add r6, r6, r0 @ phys __enable_mmu_end + add r5, r5, r0 @ phys __turn_mmu_on + add r6, r6, r0 @ phys __turn_mmu_on_end mov r5, r5, lsr #SECTION_SHIFT mov r6, r6, lsr #SECTION_SHIFT @@ -219,8 +244,8 @@ __create_page_tables: #endif /* - * Then map boot params address in r2 or - * the first 1MB of ram if boot params address is not specified. + * Then map boot params address in r2 or the first 1MB (2MB with LPAE) + * of ram if boot params address is not specified. */ mov r0, r2, lsr #SECTION_SHIFT movs r0, r0, lsl #SECTION_SHIFT @@ -251,7 +276,15 @@ __create_page_tables: mov r3, r7, lsr #SECTION_SHIFT ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags orr r3, r7, r3, lsl #SECTION_SHIFT +#ifdef CONFIG_ARM_LPAE + mov r7, #1 << (54 - 32) @ XN +#else + orr r3, r3, #PMD_SECT_XN +#endif 1: str r3, [r0], #4 +#ifdef CONFIG_ARM_LPAE + str r7, [r0], #4 +#endif add r3, r3, #1 << SECTION_SHIFT cmp r0, r6 blo 1b @@ -283,14 +316,17 @@ __create_page_tables: str r3, [r0] #endif #endif +#ifdef CONFIG_ARM_LPAE + sub r4, r4, #0x1000 @ point to the PGD table +#endif mov pc, lr ENDPROC(__create_page_tables) .ltorg .align -__enable_mmu_loc: +__turn_mmu_on_loc: .long . - .long __enable_mmu - .long __enable_mmu_end + .long __turn_mmu_on + .long __turn_mmu_on_end #if defined(CONFIG_SMP) __CPUINIT @@ -374,12 +410,17 @@ __enable_mmu: #ifdef CONFIG_CPU_ICACHE_DISABLE bic r0, r0, #CR_I #endif +#ifdef CONFIG_ARM_LPAE + mov r5, #0 + mcrr p15, 0, r4, r5, c2 @ load TTBR0 +#else mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ domain_val(DOMAIN_IO, DOMAIN_CLIENT)) mcr p15, 0, r5, c3, c0, 0 @ load domain access register mcr p15, 0, r4, c2, c0, 0 @ load page table pointer +#endif b __turn_mmu_on ENDPROC(__enable_mmu) @@ -398,15 +439,19 @@ ENDPROC(__enable_mmu) * other registers depend on the function called upon completion */ .align 5 -__turn_mmu_on: + .pushsection .idmap.text, "ax" +ENTRY(__turn_mmu_on) mov r0, r0 + instr_sync mcr p15, 0, r0, c1, c0, 0 @ write control reg mrc p15, 0, r3, c0, c0, 0 @ read id reg + instr_sync mov r3, r3 mov r3, r13 mov pc, r3 -__enable_mmu_end: +__turn_mmu_on_end: ENDPROC(__turn_mmu_on) + .popsection #ifdef CONFIG_SMP_ON_UP diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 814a52a9..d6a95ef 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -1016,10 +1016,10 @@ static int __init arch_hw_breakpoint_init(void) } /* Register debug fault handler. */ - hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, - "watchpoint debug exception"); - hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, - "breakpoint debug exception"); + hook_fault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP, + TRAP_HWBKPT, "watchpoint debug exception"); + hook_ifault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP, + TRAP_HWBKPT, "breakpoint debug exception"); /* Register hotplug notifier. */ register_cpu_notifier(&dbg_reset_nb); diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c index e17cdd6..1862d8f 100644 --- a/arch/arm/kernel/kprobes-test.c +++ b/arch/arm/kernel/kprobes-test.c @@ -202,6 +202,8 @@ #include <linux/slab.h> #include <linux/kprobes.h> +#include <asm/opcodes.h> + #include "kprobes.h" #include "kprobes-test.h" @@ -1050,65 +1052,9 @@ static int test_instance; static unsigned long test_check_cc(int cc, unsigned long cpsr) { - unsigned long temp; - - switch (cc) { - case 0x0: /* eq */ - return cpsr & PSR_Z_BIT; - - case 0x1: /* ne */ - return (~cpsr) & PSR_Z_BIT; - - case 0x2: /* cs */ - return cpsr & PSR_C_BIT; - - case 0x3: /* cc */ - return (~cpsr) & PSR_C_BIT; - - case 0x4: /* mi */ - return cpsr & PSR_N_BIT; - - case 0x5: /* pl */ - return (~cpsr) & PSR_N_BIT; - - case 0x6: /* vs */ - return cpsr & PSR_V_BIT; - - case 0x7: /* vc */ - return (~cpsr) & PSR_V_BIT; + int ret = arm_check_condition(cc << 28, cpsr); - case 0x8: /* hi */ - cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ - return cpsr & PSR_C_BIT; - - case 0x9: /* ls */ - cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ - return (~cpsr) & PSR_C_BIT; - - case 0xa: /* ge */ - cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ - return (~cpsr) & PSR_N_BIT; - - case 0xb: /* lt */ - cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ - return cpsr & PSR_N_BIT; - - case 0xc: /* gt */ - temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ - temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ - return (~temp) & PSR_N_BIT; - - case 0xd: /* le */ - temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ - temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ - return temp & PSR_N_BIT; - - case 0xe: /* al */ - case 0xf: /* unconditional */ - return true; - } - BUG(); - return false; + return (ret != ARM_OPCODE_CONDTEST_FAIL); } static int is_last_scenario; @@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario) if (!test_case_is_thumb) { /* Testing ARM code */ - probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0; + int cc = current_instruction >> 28; + + probe_should_run = test_check_cc(cc, cpsr) != 0; if (scenario == 15) is_last_scenario = true; diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index e59bbd4..764bd45 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -12,12 +12,11 @@ #include <asm/mmu_context.h> #include <asm/cacheflush.h> #include <asm/mach-types.h> +#include <asm/system.h> extern const unsigned char relocate_new_kernel[]; extern const unsigned int relocate_new_kernel_size; -extern void setup_mm_for_reboot(char mode); - extern unsigned long kexec_start_address; extern unsigned long kexec_indirection_page; extern unsigned long kexec_mach_type; @@ -111,14 +110,6 @@ void machine_kexec(struct kimage *image) if (kexec_reinit) kexec_reinit(); - local_irq_disable(); - local_fiq_disable(); - setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/ - flush_cache_all(); - outer_flush_all(); - outer_disable(); - cpu_proc_fin(); - outer_inv_all(); - flush_cache_all(); - cpu_reset(reboot_code_buffer_phys); + + soft_restart(reboot_code_buffer_phys); } diff --git a/arch/arm/kernel/opcodes.c b/arch/arm/kernel/opcodes.c new file mode 100644 index 0000000..f8179c6 --- /dev/null +++ b/arch/arm/kernel/opcodes.c @@ -0,0 +1,72 @@ +/* + * linux/arch/arm/kernel/opcodes.c + * + * A32 condition code lookup feature moved from nwfpe/fpopcode.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <asm/opcodes.h> + +#define ARM_OPCODE_CONDITION_UNCOND 0xf + +/* + * condition code lookup table + * index into the table is test code: EQ, NE, ... LT, GT, AL, NV + * + * bit position in short is condition code: NZCV + */ +static const unsigned short cc_map[16] = { + 0xF0F0, /* EQ == Z set */ + 0x0F0F, /* NE */ + 0xCCCC, /* CS == C set */ + 0x3333, /* CC */ + 0xFF00, /* MI == N set */ + 0x00FF, /* PL */ + 0xAAAA, /* VS == V set */ + 0x5555, /* VC */ + 0x0C0C, /* HI == C set && Z clear */ + 0xF3F3, /* LS == C clear || Z set */ + 0xAA55, /* GE == (N==V) */ + 0x55AA, /* LT == (N!=V) */ + 0x0A05, /* GT == (!Z && (N==V)) */ + 0xF5FA, /* LE == (Z || (N!=V)) */ + 0xFFFF, /* AL always */ + 0 /* NV */ +}; + +/* + * Returns: + * ARM_OPCODE_CONDTEST_FAIL - if condition fails + * ARM_OPCODE_CONDTEST_PASS - if condition passes (including AL) + * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional + * opcode space from v5 onwards + * + * Code that tests whether a conditional instruction would pass its condition + * check should check that return value == ARM_OPCODE_CONDTEST_PASS. + * + * Code that tests if a condition means that the instruction would be executed + * (regardless of conditional or unconditional) should instead check that the + * return value != ARM_OPCODE_CONDTEST_FAIL. + */ +asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr) +{ + u32 cc_bits = opcode >> 28; + u32 psr_cond = psr >> 28; + unsigned int ret; + + if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) { + if ((cc_map[cc_bits] >> (psr_cond)) & 1) + ret = ARM_OPCODE_CONDTEST_PASS; + else + ret = ARM_OPCODE_CONDTEST_FAIL; + } else { + ret = ARM_OPCODE_CONDTEST_UNCOND; + } + + return ret; +} +EXPORT_SYMBOL_GPL(arm_check_condition); diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 88b0941..5bb91bf 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -59,8 +59,7 @@ armpmu_get_pmu_id(void) } EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); -int -armpmu_get_max_events(void) +int perf_num_counters(void) { int max_events = 0; @@ -69,12 +68,6 @@ armpmu_get_max_events(void) return max_events; } -EXPORT_SYMBOL_GPL(armpmu_get_max_events); - -int perf_num_counters(void) -{ - return armpmu_get_max_events(); -} EXPORT_SYMBOL_GPL(perf_num_counters); #define HW_OP_UNSUPPORTED 0xFFFF @@ -380,6 +373,8 @@ armpmu_release_hardware(struct arm_pmu *armpmu) { int i, irq, irqs; struct platform_device *pmu_device = armpmu->plat_device; + struct arm_pmu_platdata *plat = + dev_get_platdata(&pmu_device->dev); irqs = min(pmu_device->num_resources, num_possible_cpus()); @@ -387,8 +382,11 @@ armpmu_release_hardware(struct arm_pmu *armpmu) if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs)) continue; irq = platform_get_irq(pmu_device, i); - if (irq >= 0) + if (irq >= 0) { + if (plat && plat->disable_irq) + plat->disable_irq(irq); free_irq(irq, armpmu); + } } release_pmu(armpmu->type); @@ -448,7 +446,8 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu) irq); armpmu_release_hardware(armpmu); return err; - } + } else if (plat && plat->enable_irq) + plat->enable_irq(irq); cpumask_set_cpu(i, &armpmu->active_irqs); } diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c index e63d811..533be99 100644 --- a/arch/arm/kernel/perf_event_v6.c +++ b/arch/arm/kernel/perf_event_v6.c @@ -65,13 +65,15 @@ enum armv6_counters { * accesses/misses in hardware. */ static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, - [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6_PERFCTR_IBUF_STALL, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6_PERFCTR_LSU_FULL_STALL, }; static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] @@ -218,13 +220,15 @@ enum armv6mpcore_perf_types { * accesses/misses in hardware. */ static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, - [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6MPCORE_PERFCTR_IBUF_STALL, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6MPCORE_PERFCTR_LSU_FULL_STALL, }; static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 1ef6d00..460bbbb 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -28,165 +28,87 @@ static struct arm_pmu armv7pmu; * they are not available. */ enum armv7_perf_types { - ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, - ARMV7_PERFCTR_IFETCH_MISS = 0x01, - ARMV7_PERFCTR_ITLB_MISS = 0x02, - ARMV7_PERFCTR_DCACHE_REFILL = 0x03, /* L1 */ - ARMV7_PERFCTR_DCACHE_ACCESS = 0x04, /* L1 */ - ARMV7_PERFCTR_DTLB_REFILL = 0x05, - ARMV7_PERFCTR_DREAD = 0x06, - ARMV7_PERFCTR_DWRITE = 0x07, - ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, - ARMV7_PERFCTR_EXC_TAKEN = 0x09, - ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, - ARMV7_PERFCTR_CID_WRITE = 0x0B, - /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. + ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, + ARMV7_PERFCTR_L1_ICACHE_REFILL = 0x01, + ARMV7_PERFCTR_ITLB_REFILL = 0x02, + ARMV7_PERFCTR_L1_DCACHE_REFILL = 0x03, + ARMV7_PERFCTR_L1_DCACHE_ACCESS = 0x04, + ARMV7_PERFCTR_DTLB_REFILL = 0x05, + ARMV7_PERFCTR_MEM_READ = 0x06, + ARMV7_PERFCTR_MEM_WRITE = 0x07, + ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, + ARMV7_PERFCTR_EXC_TAKEN = 0x09, + ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, + ARMV7_PERFCTR_CID_WRITE = 0x0B, + + /* + * ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. * It counts: - * - all branch instructions, + * - all (taken) branch instructions, * - instructions that explicitly write the PC, * - exception generating instructions. */ - ARMV7_PERFCTR_PC_WRITE = 0x0C, - ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, - ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, - ARMV7_PERFCTR_UNALIGNED_ACCESS = 0x0F, + ARMV7_PERFCTR_PC_WRITE = 0x0C, + ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, + ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, + ARMV7_PERFCTR_MEM_UNALIGNED_ACCESS = 0x0F, + ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, + ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, + ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12, /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */ - ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, - ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, - ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12, - ARMV7_PERFCTR_MEM_ACCESS = 0x13, - ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14, - ARMV7_PERFCTR_L1_DCACHE_WB = 0x15, - ARMV7_PERFCTR_L2_DCACHE_ACCESS = 0x16, - ARMV7_PERFCTR_L2_DCACHE_REFILL = 0x17, - ARMV7_PERFCTR_L2_DCACHE_WB = 0x18, - ARMV7_PERFCTR_BUS_ACCESS = 0x19, - ARMV7_PERFCTR_MEMORY_ERROR = 0x1A, - ARMV7_PERFCTR_INSTR_SPEC = 0x1B, - ARMV7_PERFCTR_TTBR_WRITE = 0x1C, - ARMV7_PERFCTR_BUS_CYCLES = 0x1D, - - ARMV7_PERFCTR_CPU_CYCLES = 0xFF + ARMV7_PERFCTR_MEM_ACCESS = 0x13, + ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14, + ARMV7_PERFCTR_L1_DCACHE_WB = 0x15, + ARMV7_PERFCTR_L2_CACHE_ACCESS = 0x16, + ARMV7_PERFCTR_L2_CACHE_REFILL = 0x17, + ARMV7_PERFCTR_L2_CACHE_WB = 0x18, + ARMV7_PERFCTR_BUS_ACCESS = 0x19, + ARMV7_PERFCTR_MEM_ERROR = 0x1A, + ARMV7_PERFCTR_INSTR_SPEC = 0x1B, + ARMV7_PERFCTR_TTBR_WRITE = 0x1C, + ARMV7_PERFCTR_BUS_CYCLES = 0x1D, + + ARMV7_PERFCTR_CPU_CYCLES = 0xFF }; /* ARMv7 Cortex-A8 specific event types */ enum armv7_a8_perf_types { - ARMV7_PERFCTR_WRITE_BUFFER_FULL = 0x40, - ARMV7_PERFCTR_L2_STORE_MERGED = 0x41, - ARMV7_PERFCTR_L2_STORE_BUFF = 0x42, - ARMV7_PERFCTR_L2_ACCESS = 0x43, - ARMV7_PERFCTR_L2_CACH_MISS = 0x44, - ARMV7_PERFCTR_AXI_READ_CYCLES = 0x45, - ARMV7_PERFCTR_AXI_WRITE_CYCLES = 0x46, - ARMV7_PERFCTR_MEMORY_REPLAY = 0x47, - ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY = 0x48, - ARMV7_PERFCTR_L1_DATA_MISS = 0x49, - ARMV7_PERFCTR_L1_INST_MISS = 0x4A, - ARMV7_PERFCTR_L1_DATA_COLORING = 0x4B, - ARMV7_PERFCTR_L1_NEON_DATA = 0x4C, - ARMV7_PERFCTR_L1_NEON_CACH_DATA = 0x4D, - ARMV7_PERFCTR_L2_NEON = 0x4E, - ARMV7_PERFCTR_L2_NEON_HIT = 0x4F, - ARMV7_PERFCTR_L1_INST = 0x50, - ARMV7_PERFCTR_PC_RETURN_MIS_PRED = 0x51, - ARMV7_PERFCTR_PC_BRANCH_FAILED = 0x52, - ARMV7_PERFCTR_PC_BRANCH_TAKEN = 0x53, - ARMV7_PERFCTR_PC_BRANCH_EXECUTED = 0x54, - ARMV7_PERFCTR_OP_EXECUTED = 0x55, - ARMV7_PERFCTR_CYCLES_INST_STALL = 0x56, - ARMV7_PERFCTR_CYCLES_INST = 0x57, - ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL = 0x58, - ARMV7_PERFCTR_CYCLES_NEON_INST_STALL = 0x59, - ARMV7_PERFCTR_NEON_CYCLES = 0x5A, - - ARMV7_PERFCTR_PMU0_EVENTS = 0x70, - ARMV7_PERFCTR_PMU1_EVENTS = 0x71, - ARMV7_PERFCTR_PMU_EVENTS = 0x72, + ARMV7_A8_PERFCTR_L2_CACHE_ACCESS = 0x43, + ARMV7_A8_PERFCTR_L2_CACHE_REFILL = 0x44, + ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS = 0x50, + ARMV7_A8_PERFCTR_STALL_ISIDE = 0x56, }; /* ARMv7 Cortex-A9 specific event types */ enum armv7_a9_perf_types { - ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC = 0x40, - ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC = 0x41, - ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC = 0x42, - - ARMV7_PERFCTR_COHERENT_LINE_MISS = 0x50, - ARMV7_PERFCTR_COHERENT_LINE_HIT = 0x51, - - ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES = 0x60, - ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES = 0x61, - ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62, - ARMV7_PERFCTR_STREX_EXECUTED_PASSED = 0x63, - ARMV7_PERFCTR_STREX_EXECUTED_FAILED = 0x64, - ARMV7_PERFCTR_DATA_EVICTION = 0x65, - ARMV7_PERFCTR_ISSUE_STAGE_NO_INST = 0x66, - ARMV7_PERFCTR_ISSUE_STAGE_EMPTY = 0x67, - ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE = 0x68, - - ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E, - - ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST = 0x70, - ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71, - ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST = 0x72, - ARMV7_PERFCTR_FP_EXECUTED_INST = 0x73, - ARMV7_PERFCTR_NEON_EXECUTED_INST = 0x74, - - ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80, - ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES = 0x81, - ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES = 0x82, - ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES = 0x83, - ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES = 0x84, - ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES = 0x85, - ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES = 0x86, - - ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES = 0x8A, - ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B, - - ARMV7_PERFCTR_ISB_INST = 0x90, - ARMV7_PERFCTR_DSB_INST = 0x91, - ARMV7_PERFCTR_DMB_INST = 0x92, - ARMV7_PERFCTR_EXT_INTERRUPTS = 0x93, - - ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED = 0xA0, - ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED = 0xA1, - ARMV7_PERFCTR_PLE_FIFO_FLUSH = 0xA2, - ARMV7_PERFCTR_PLE_RQST_COMPLETED = 0xA3, - ARMV7_PERFCTR_PLE_FIFO_OVERFLOW = 0xA4, - ARMV7_PERFCTR_PLE_RQST_PROG = 0xA5 + ARMV7_A9_PERFCTR_INSTR_CORE_RENAME = 0x68, + ARMV7_A9_PERFCTR_STALL_ICACHE = 0x60, + ARMV7_A9_PERFCTR_STALL_DISPATCH = 0x66, }; /* ARMv7 Cortex-A5 specific event types */ enum armv7_a5_perf_types { - ARMV7_PERFCTR_IRQ_TAKEN = 0x86, - ARMV7_PERFCTR_FIQ_TAKEN = 0x87, - - ARMV7_PERFCTR_EXT_MEM_RQST = 0xc0, - ARMV7_PERFCTR_NC_EXT_MEM_RQST = 0xc1, - ARMV7_PERFCTR_PREFETCH_LINEFILL = 0xc2, - ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3, - ARMV7_PERFCTR_ENTER_READ_ALLOC = 0xc4, - ARMV7_PERFCTR_READ_ALLOC = 0xc5, - - ARMV7_PERFCTR_STALL_SB_FULL = 0xc9, + ARMV7_A5_PERFCTR_PREFETCH_LINEFILL = 0xc2, + ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3, }; /* ARMv7 Cortex-A15 specific event types */ enum armv7_a15_perf_types { - ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS = 0x40, - ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS = 0x41, - ARMV7_PERFCTR_L1_DCACHE_READ_REFILL = 0x42, - ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL = 0x43, + ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ = 0x40, + ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE = 0x41, + ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ = 0x42, + ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE = 0x43, - ARMV7_PERFCTR_L1_DTLB_READ_REFILL = 0x4C, - ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL = 0x4D, + ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ = 0x4C, + ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE = 0x4D, - ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS = 0x50, - ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS = 0x51, - ARMV7_PERFCTR_L2_DCACHE_READ_REFILL = 0x52, - ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL = 0x53, + ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ = 0x50, + ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE = 0x51, + ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ = 0x52, + ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE = 0x53, - ARMV7_PERFCTR_SPEC_PC_WRITE = 0x76, + ARMV7_A15_PERFCTR_PC_WRITE_SPEC = 0x76, }; /* @@ -197,13 +119,15 @@ enum armv7_a15_perf_types { * accesses/misses in hardware. */ static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A8_PERFCTR_STALL_ISIDE, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, }; static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] @@ -217,12 +141,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] * combined. */ [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -231,12 +155,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] }, [C(L1I)] = { [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -245,12 +169,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] }, [C(LL)] = { [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -274,11 +198,11 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(ITLB)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -287,14 +211,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] }, [C(BPU)] = { [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -321,14 +243,15 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] * Cortex-A9 HW events mapping */ static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = - ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, - [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_DCACHE_ACCESS, - [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_DCACHE_REFILL, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_A9_PERFCTR_INSTR_CORE_RENAME, + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A9_PERFCTR_STALL_ICACHE, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV7_A9_PERFCTR_STALL_DISPATCH, }; static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] @@ -342,12 +265,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] * combined. */ [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -357,11 +280,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(L1I)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -399,11 +322,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(ITLB)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -412,14 +335,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] }, [C(BPU)] = { [C(OP_READ)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -446,13 +367,15 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] * Cortex-A5 HW events mapping */ static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, }; static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] @@ -460,42 +383,34 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [PERF_COUNT_HW_CACHE_RESULT_MAX] = { [C(L1D)] = { [C(OP_READ)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_DCACHE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_DCACHE_ACCESS, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_DCACHE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, }, [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_PREFETCH_LINEFILL, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP, + [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL, + [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP, }, }, [C(L1I)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, /* * The prefetch counters don't differentiate between the I * side and the D side. */ [C(OP_PREFETCH)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_PREFETCH_LINEFILL, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP, + [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL, + [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP, }, }, [C(LL)] = { @@ -529,11 +444,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(ITLB)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -543,13 +458,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(BPU)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -562,13 +475,15 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] * Cortex-A15 HW events mapping */ static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, - [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_SPEC_PC_WRITE, - [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, - [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_A15_PERFCTR_PC_WRITE_SPEC, + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, }; static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] @@ -576,16 +491,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [PERF_COUNT_HW_CACHE_RESULT_MAX] = { [C(L1D)] = { [C(OP_READ)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_L1_DCACHE_READ_REFILL, + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ, + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE, + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -601,11 +512,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] */ [C(OP_READ)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, - [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -614,16 +525,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] }, [C(LL)] = { [C(OP_READ)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_L2_DCACHE_READ_REFILL, + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ, + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ, }, [C(OP_WRITE)] = { - [C(RESULT_ACCESS)] - = ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL, + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE, + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -633,13 +540,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(DTLB)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_L1_DTLB_READ_REFILL, + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL, + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -649,11 +554,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(ITLB)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, - [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, @@ -663,13 +568,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] [C(BPU)] = { [C(OP_READ)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_WRITE)] = { [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, - [C(RESULT_MISS)] - = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, }, [C(OP_PREFETCH)] = { [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c index e0cca10..3b99d82 100644 --- a/arch/arm/kernel/perf_event_xscale.c +++ b/arch/arm/kernel/perf_event_xscale.c @@ -48,13 +48,15 @@ enum xscale_counters { }; static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT, - [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION, - [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, - [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH, - [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS, - [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT, + [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION, + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH, + [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS, + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = XSCALE_PERFCTR_ICACHE_NO_DELIVER, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, }; static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 3d0c6fb..b29776a 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -57,7 +57,7 @@ static const char *isa_modes[] = { "ARM" , "Thumb" , "Jazelle", "ThumbEE" }; -extern void setup_mm_for_reboot(char mode); +extern void setup_mm_for_reboot(void); static volatile int hlt_counter; @@ -92,18 +92,24 @@ static int __init hlt_setup(char *__unused) __setup("nohlt", nohlt_setup); __setup("hlt", hlt_setup); -void arm_machine_restart(char mode, const char *cmd) +extern void call_with_stack(void (*fn)(void *), void *arg, void *sp); +typedef void (*phys_reset_t)(unsigned long); + +/* + * A temporary stack to use for CPU reset. This is static so that we + * don't clobber it with the identity mapping. When running with this + * stack, any references to the current task *will not work* so you + * should really do as little as possible before jumping to your reset + * code. + */ +static u64 soft_restart_stack[16]; + +static void __soft_restart(void *addr) { - /* Disable interrupts first */ - local_irq_disable(); - local_fiq_disable(); + phys_reset_t phys_reset; - /* - * Tell the mm system that we are going to reboot - - * we may need it to insert some 1:1 mappings so that - * soft boot works. - */ - setup_mm_for_reboot(mode); + /* Take out a flat memory mapping. */ + setup_mm_for_reboot(); /* Clean and invalidate caches */ flush_cache_all(); @@ -114,18 +120,35 @@ void arm_machine_restart(char mode, const char *cmd) /* Push out any further dirty data, and ensure cache is empty */ flush_cache_all(); - /* - * Now call the architecture specific reboot code. - */ - arch_reset(mode, cmd); + /* Switch to the identity mapping. */ + phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset); + phys_reset((unsigned long)addr); - /* - * Whoops - the architecture was unable to reboot. - * Tell the user! - */ - mdelay(1000); - printk("Reboot failed -- System halted\n"); - while (1); + /* Should never get here. */ + BUG(); +} + +void soft_restart(unsigned long addr) +{ + u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack); + + /* Disable interrupts first */ + local_irq_disable(); + local_fiq_disable(); + + /* Disable the L2 if we're the last man standing. */ + if (num_online_cpus() == 1) + outer_disable(); + + /* Change to the new stack and continue with the reset. */ + call_with_stack(__soft_restart, (void *)addr, (void *)stack); + + /* Should never get here. */ + BUG(); +} + +static void null_restart(char mode, const char *cmd) +{ } /* @@ -134,7 +157,7 @@ void arm_machine_restart(char mode, const char *cmd) void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); -void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart; +void (*arm_pm_restart)(char str, const char *cmd) = null_restart; EXPORT_SYMBOL_GPL(arm_pm_restart); static void do_nothing(void *unused) @@ -253,7 +276,15 @@ void machine_power_off(void) void machine_restart(char *cmd) { machine_shutdown(); + arm_pm_restart(reboot_mode, cmd); + + /* Give a grace period for failure to restart of 1s */ + mdelay(1000); + + /* Whoops - the platform was unable to reboot. Tell the user! */ + printk("Reboot failed -- System halted\n"); + while (1); } void __show_regs(struct pt_regs *regs) diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index 9a46370..5416c7c 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c @@ -14,61 +14,153 @@ #include <asm/sched_clock.h> +struct clock_data { + u64 epoch_ns; + u32 epoch_cyc; + u32 epoch_cyc_copy; + u32 mult; + u32 shift; +}; + static void sched_clock_poll(unsigned long wrap_ticks); static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); -static void (*sched_clock_update_fn)(void); + +static struct clock_data cd = { + .mult = NSEC_PER_SEC / HZ, +}; + +static u32 __read_mostly sched_clock_mask = 0xffffffff; + +static u32 notrace jiffy_sched_clock_read(void) +{ + return (u32)(jiffies - INITIAL_JIFFIES); +} + +static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read; + +static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) +{ + return (cyc * mult) >> shift; +} + +static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask) +{ + u64 epoch_ns; + u32 epoch_cyc; + + /* + * Load the epoch_cyc and epoch_ns atomically. We do this by + * ensuring that we always write epoch_cyc, epoch_ns and + * epoch_cyc_copy in strict order, and read them in strict order. + * If epoch_cyc and epoch_cyc_copy are not equal, then we're in + * the middle of an update, and we should repeat the load. + */ + do { + epoch_cyc = cd.epoch_cyc; + smp_rmb(); + epoch_ns = cd.epoch_ns; + smp_rmb(); + } while (epoch_cyc != cd.epoch_cyc_copy); + + return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift); +} + +/* + * Atomically update the sched_clock epoch. + */ +static void notrace update_sched_clock(void) +{ + unsigned long flags; + u32 cyc; + u64 ns; + + cyc = read_sched_clock(); + ns = cd.epoch_ns + + cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask, + cd.mult, cd.shift); + /* + * Write epoch_cyc and epoch_ns in a way that the update is + * detectable in cyc_to_fixed_sched_clock(). + */ + raw_local_irq_save(flags); + cd.epoch_cyc = cyc; + smp_wmb(); + cd.epoch_ns = ns; + smp_wmb(); + cd.epoch_cyc_copy = cyc; + raw_local_irq_restore(flags); +} static void sched_clock_poll(unsigned long wrap_ticks) { mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks)); - sched_clock_update_fn(); + update_sched_clock(); } -void __init init_sched_clock(struct clock_data *cd, void (*update)(void), - unsigned int clock_bits, unsigned long rate) +void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) { unsigned long r, w; u64 res, wrap; char r_unit; - sched_clock_update_fn = update; + BUG_ON(bits > 32); + WARN_ON(!irqs_disabled()); + WARN_ON(read_sched_clock != jiffy_sched_clock_read); + read_sched_clock = read; + sched_clock_mask = (1 << bits) - 1; /* calculate the mult/shift to convert counter ticks to ns. */ - clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0); + clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0); r = rate; if (r >= 4000000) { r /= 1000000; r_unit = 'M'; - } else { + } else if (r >= 1000) { r /= 1000; r_unit = 'k'; - } + } else + r_unit = ' '; /* calculate how many ns until we wrap */ - wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift); + wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift); do_div(wrap, NSEC_PER_MSEC); w = wrap; /* calculate the ns resolution of this counter */ - res = cyc_to_ns(1ULL, cd->mult, cd->shift); + res = cyc_to_ns(1ULL, cd.mult, cd.shift); pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n", - clock_bits, r, r_unit, res, w); + bits, r, r_unit, res, w); /* * Start the timer to keep sched_clock() properly updated and * sets the initial epoch. */ sched_clock_timer.data = msecs_to_jiffies(w - (w / 10)); - update(); + update_sched_clock(); /* * Ensure that sched_clock() starts off at 0ns */ - cd->epoch_ns = 0; + cd.epoch_ns = 0; + + pr_debug("Registered %pF as sched_clock source\n", read); +} + +unsigned long long notrace sched_clock(void) +{ + u32 cyc = read_sched_clock(); + return cyc_to_sched_clock(cyc, sched_clock_mask); } void __init sched_clock_postinit(void) { + /* + * If no sched_clock function has been provided at that point, + * make it the final one one. + */ + if (read_sched_clock == jiffy_sched_clock_read) + setup_sched_clock(jiffy_sched_clock_read, 32, HZ); + sched_clock_poll(sched_clock_timer.data); } diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 8fc2c8f..095d661 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -31,6 +31,7 @@ #include <linux/memblock.h> #include <linux/bug.h> #include <linux/compiler.h> +#include <linux/sort.h> #include <asm/unified.h> #include <asm/cpu.h> @@ -890,6 +891,12 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr) return mdesc; } +static int __init meminfo_cmp(const void *_a, const void *_b) +{ + const struct membank *a = _a, *b = _b; + long cmp = bank_pfn_start(a) - bank_pfn_start(b); + return cmp < 0 ? -1 : cmp > 0 ? 1 : 0; +} void __init setup_arch(char **cmdline_p) { @@ -908,8 +915,8 @@ void __init setup_arch(char **cmdline_p) arm_dma_zone_size = mdesc->dma_zone_size; } #endif - if (mdesc->soft_reboot) - reboot_setup("s"); + if (mdesc->restart_mode) + reboot_setup(&mdesc->restart_mode); init_mm.start_code = (unsigned long) _text; init_mm.end_code = (unsigned long) _etext; @@ -922,12 +929,16 @@ void __init setup_arch(char **cmdline_p) parse_early_param(); + sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL); sanity_check_meminfo(); arm_memblock_init(&meminfo, mdesc); paging_init(mdesc); request_standard_resources(mdesc); + if (mdesc->restart) + arm_pm_restart = mdesc->restart; + unflatten_device_tree(); #ifdef CONFIG_SMP diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index 020e99c..1f268bd 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -54,14 +54,18 @@ ENDPROC(cpu_suspend_abort) * r0 = control register value */ .align 5 + .pushsection .idmap.text,"ax" ENTRY(cpu_resume_mmu) ldr r3, =cpu_resume_after_mmu + instr_sync mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc mrc p15, 0, r0, c0, c0, 0 @ read id reg + instr_sync mov r0, r0 mov r0, r0 mov pc, r3 @ jump to virtual address ENDPROC(cpu_resume_mmu) + .popsection cpu_resume_after_mmu: bl cpu_init @ restore the und/abt/irq banked regs mov r0, #0 @ return zero on success diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index ef5640b..57db122 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -31,6 +31,7 @@ #include <asm/cpu.h> #include <asm/cputype.h> #include <asm/exception.h> +#include <asm/idmap.h> #include <asm/topology.h> #include <asm/mmu_context.h> #include <asm/pgtable.h> @@ -61,7 +62,6 @@ int __cpuinit __cpu_up(unsigned int cpu) { struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); struct task_struct *idle = ci->idle; - pgd_t *pgd; int ret; /* @@ -84,29 +84,11 @@ int __cpuinit __cpu_up(unsigned int cpu) } /* - * Allocate initial page tables to allow the new CPU to - * enable the MMU safely. This essentially means a set - * of our "standard" page tables, with the addition of - * a 1:1 mapping for the physical address of the kernel. - */ - pgd = pgd_alloc(&init_mm); - if (!pgd) - return -ENOMEM; - - if (PHYS_OFFSET != PAGE_OFFSET) { -#ifndef CONFIG_HOTPLUG_CPU - identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end)); -#endif - identity_mapping_add(pgd, __pa(_stext), __pa(_etext)); - identity_mapping_add(pgd, __pa(_sdata), __pa(_edata)); - } - - /* * We need to tell the secondary core where to find * its stack and the page tables. */ secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; - secondary_data.pgdir = virt_to_phys(pgd); + secondary_data.pgdir = virt_to_phys(idmap_pgd); secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); @@ -142,16 +124,6 @@ int __cpuinit __cpu_up(unsigned int cpu) secondary_data.stack = NULL; secondary_data.pgdir = 0; - if (PHYS_OFFSET != PAGE_OFFSET) { -#ifndef CONFIG_HOTPLUG_CPU - identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end)); -#endif - identity_mapping_del(pgd, __pa(_stext), __pa(_etext)); - identity_mapping_del(pgd, __pa(_sdata), __pa(_edata)); - } - - pgd_free(&init_mm, pgd); - return ret; } @@ -550,6 +522,10 @@ static void ipi_cpu_stop(unsigned int cpu) local_fiq_disable(); local_irq_disable(); +#ifdef CONFIG_HOTPLUG_CPU + platform_cpu_kill(cpu); +#endif + while (1) cpu_relax(); } diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index a8a6682..c8e9385 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -10,8 +10,11 @@ */ #include <linux/init.h> #include <linux/kernel.h> +#include <linux/clk.h> +#include <linux/cpufreq.h> #include <linux/delay.h> #include <linux/device.h> +#include <linux/err.h> #include <linux/smp.h> #include <linux/jiffies.h> #include <linux/clockchips.h> @@ -25,6 +28,7 @@ /* set up by the platform code */ void __iomem *twd_base; +static struct clk *twd_clk; static unsigned long twd_timer_rate; static struct clock_event_device __percpu **twd_evt; @@ -89,6 +93,52 @@ void twd_timer_stop(struct clock_event_device *clk) disable_percpu_irq(clk->irq); } +#ifdef CONFIG_CPU_FREQ + +/* + * Updates clockevent frequency when the cpu frequency changes. + * Called on the cpu that is changing frequency with interrupts disabled. + */ +static void twd_update_frequency(void *data) +{ + twd_timer_rate = clk_get_rate(twd_clk); + + clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate); +} + +static int twd_cpufreq_transition(struct notifier_block *nb, + unsigned long state, void *data) +{ + struct cpufreq_freqs *freqs = data; + + /* + * The twd clock events must be reprogrammed to account for the new + * frequency. The timer is local to a cpu, so cross-call to the + * changing cpu. + */ + if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE) + smp_call_function_single(freqs->cpu, twd_update_frequency, + NULL, 1); + + return NOTIFY_OK; +} + +static struct notifier_block twd_cpufreq_nb = { + .notifier_call = twd_cpufreq_transition, +}; + +static int twd_cpufreq_init(void) +{ + if (!IS_ERR(twd_clk)) + return cpufreq_register_notifier(&twd_cpufreq_nb, + CPUFREQ_TRANSITION_NOTIFIER); + + return 0; +} +core_initcall(twd_cpufreq_init); + +#endif + static void __cpuinit twd_calibrate_rate(void) { unsigned long count; @@ -140,6 +190,35 @@ static irqreturn_t twd_handler(int irq, void *dev_id) return IRQ_NONE; } +static struct clk *twd_get_clock(void) +{ + struct clk *clk; + int err; + + clk = clk_get_sys("smp_twd", NULL); + if (IS_ERR(clk)) { + pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk)); + return clk; + } + + err = clk_prepare(clk); + if (err) { + pr_err("smp_twd: clock failed to prepare: %d\n", err); + clk_put(clk); + return ERR_PTR(err); + } + + err = clk_enable(clk); + if (err) { + pr_err("smp_twd: clock failed to enable: %d\n", err); + clk_unprepare(clk); + clk_put(clk); + return ERR_PTR(err); + } + + return clk; +} + /* * Setup the local clock events for a CPU. */ @@ -165,7 +244,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) } } - twd_calibrate_rate(); + if (!twd_clk) + twd_clk = twd_get_clock(); + + if (!IS_ERR_OR_NULL(twd_clk)) + twd_timer_rate = clk_get_rate(twd_clk); + else + twd_calibrate_rate(); clk->name = "local_timer"; clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | @@ -173,15 +258,11 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) clk->rating = 350; clk->set_mode = twd_set_mode; clk->set_next_event = twd_set_next_event; - clk->shift = 20; - clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift); - clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); - clk->min_delta_ns = clockevent_delta2ns(0xf, clk); this_cpu_clk = __this_cpu_ptr(twd_evt); *this_cpu_clk = clk; - clockevents_register_device(clk); - + clockevents_config_and_register(clk, twd_timer_rate, + 0xf, 0xffffffff); enable_percpu_irq(clk->irq, 0); } diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c index 93a22d2..1794cc3 100644 --- a/arch/arm/kernel/suspend.c +++ b/arch/arm/kernel/suspend.c @@ -1,13 +1,12 @@ #include <linux/init.h> +#include <asm/idmap.h> #include <asm/pgalloc.h> #include <asm/pgtable.h> #include <asm/memory.h> #include <asm/suspend.h> #include <asm/tlbflush.h> -static pgd_t *suspend_pgd; - extern int __cpu_suspend(unsigned long, int (*)(unsigned long)); extern void cpu_resume_mmu(void); @@ -21,7 +20,7 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) *save_ptr = virt_to_phys(ptr); /* This must correspond to the LDM in cpu_resume() assembly */ - *ptr++ = virt_to_phys(suspend_pgd); + *ptr++ = virt_to_phys(idmap_pgd); *ptr++ = sp; *ptr++ = virt_to_phys(cpu_do_resume); @@ -42,7 +41,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) struct mm_struct *mm = current->active_mm; int ret; - if (!suspend_pgd) + if (!idmap_pgd) return -EINVAL; /* @@ -59,14 +58,3 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) return ret; } - -static int __init cpu_suspend_init(void) -{ - suspend_pgd = pgd_alloc(&init_mm); - if (suspend_pgd) { - unsigned long addr = virt_to_phys(cpu_resume_mmu); - identity_mapping_add(suspend_pgd, addr, addr + SECTION_SIZE); - } - return suspend_pgd ? 0 : -ENOMEM; -} -core_initcall(cpu_suspend_init); diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c index 5f452f8..df74518 100644 --- a/arch/arm/kernel/swp_emulate.c +++ b/arch/arm/kernel/swp_emulate.c @@ -25,6 +25,7 @@ #include <linux/syscalls.h> #include <linux/perf_event.h> +#include <asm/opcodes.h> #include <asm/traps.h> #include <asm/uaccess.h> @@ -185,6 +186,21 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr) perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); + res = arm_check_condition(instr, regs->ARM_cpsr); + switch (res) { + case ARM_OPCODE_CONDTEST_PASS: + break; + case ARM_OPCODE_CONDTEST_FAIL: + /* Condition failed - return to next instruction */ + regs->ARM_pc += 4; + return 0; + case ARM_OPCODE_CONDTEST_UNCOND: + /* If unconditional encoding - not a SWP, undef */ + return -EFAULT; + default: + return -EINVAL; + } + if (current->pid != previous_pid) { pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", current->comm, (unsigned long)current->pid); diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c index 30e302d..01ec453 100644 --- a/arch/arm/kernel/tcm.c +++ b/arch/arm/kernel/tcm.c @@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, */ void __init tcm_init(void) { - u32 tcm_status = read_cpuid_tcmstatus(); - u8 dtcm_banks = (tcm_status >> 16) & 0x03; - u8 itcm_banks = (tcm_status & 0x03); + u32 tcm_status; + u8 dtcm_banks; + u8 itcm_banks; size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; char *start; @@ -191,6 +191,22 @@ void __init tcm_init(void) int ret; int i; + /* + * Prior to ARMv5 there is no TCM, and trying to read the status + * register will hang the processor. + */ + if (cpu_architecture() < CPU_ARCH_ARMv5) { + if (dtcm_code_sz || itcm_code_sz) + pr_info("CPU TCM: %u bytes of DTCM and %u bytes of " + "ITCM code compiled in, but no TCM present " + "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz); + return; + } + + tcm_status = read_cpuid_tcmstatus(); + dtcm_banks = (tcm_status >> 16) & 0x03; + itcm_banks = (tcm_status & 0x03); + /* Values greater than 2 for D/ITCM banks are "reserved" */ if (dtcm_banks > 2) dtcm_banks = 0; diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 20b3041..f76e755 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -13,6 +13,12 @@ *(.proc.info.init) \ VMLINUX_SYMBOL(__proc_info_end) = .; +#define IDMAP_TEXT \ + ALIGN_FUNCTION(); \ + VMLINUX_SYMBOL(__idmap_text_start) = .; \ + *(.idmap.text) \ + VMLINUX_SYMBOL(__idmap_text_end) = .; + #ifdef CONFIG_HOTPLUG_CPU #define ARM_CPU_DISCARD(x) #define ARM_CPU_KEEP(x) x @@ -92,6 +98,7 @@ SECTIONS SCHED_TEXT LOCK_TEXT KPROBES_TEXT + IDMAP_TEXT #ifdef CONFIG_MMU *(.fixup) #endif diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index cf73a7f..0ade0ac 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -13,7 +13,8 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ testchangebit.o testclearbit.o testsetbit.o \ ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ ucmpdi2.o lib1funcs.o div64.o \ - io-readsb.o io-writesb.o io-readsl.o io-writesl.o + io-readsb.o io-writesb.o io-readsl.o io-writesl.o \ + call_with_stack.o mmu-y := clear_user.o copy_page.o getuser.o putuser.o diff --git a/arch/arm/lib/call_with_stack.S b/arch/arm/lib/call_with_stack.S new file mode 100644 index 0000000..916c80f --- /dev/null +++ b/arch/arm/lib/call_with_stack.S @@ -0,0 +1,44 @@ +/* + * arch/arm/lib/call_with_stack.S + * + * Copyright (C) 2011 ARM Ltd. + * Written by Will Deacon <will.deacon@arm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/linkage.h> +#include <asm/assembler.h> + +/* + * void call_with_stack(void (*fn)(void *), void *arg, void *sp) + * + * Change the stack to that pointed at by sp, then invoke fn(arg) with + * the new stack. + */ +ENTRY(call_with_stack) + str sp, [r2, #-4]! + str lr, [r2, #-4]! + + mov sp, r2 + mov r2, r0 + mov r0, r1 + + adr lr, BSYM(1f) + mov pc, r2 + +1: ldr lr, [sp] + ldr sp, [sp, #4] + mov pc, lr +ENDPROC(call_with_stack) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index d111c3e9..4f991f2 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -3,6 +3,12 @@ if ARCH_AT91 config HAVE_AT91_DATAFLASH_CARD bool +config HAVE_AT91_DBGU0 + bool + +config HAVE_AT91_DBGU1 + bool + config HAVE_AT91_USART3 bool @@ -21,12 +27,14 @@ config ARCH_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 select HAVE_AT91_USART3 config ARCH_AT91SAM9260 bool "AT91SAM9260 or AT91SAM9XE" select CPU_ARM926T select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 select HAVE_AT91_USART3 select HAVE_AT91_USART4 select HAVE_AT91_USART5 @@ -37,11 +45,13 @@ config ARCH_AT91SAM9261 select CPU_ARM926T select GENERIC_CLOCKEVENTS select HAVE_FB_ATMEL + select HAVE_AT91_DBGU0 config ARCH_AT91SAM9G10 bool "AT91SAM9G10" select CPU_ARM926T select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL config ARCH_AT91SAM9263 @@ -50,6 +60,7 @@ config ARCH_AT91SAM9263 select GENERIC_CLOCKEVENTS select HAVE_FB_ATMEL select HAVE_NET_MACB + select HAVE_AT91_DBGU1 config ARCH_AT91SAM9RL bool "AT91SAM9RL" @@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL select GENERIC_CLOCKEVENTS select HAVE_AT91_USART3 select HAVE_FB_ATMEL + select HAVE_AT91_DBGU0 config ARCH_AT91SAM9G20 bool "AT91SAM9G20" select CPU_ARM926T select GENERIC_CLOCKEVENTS + select HAVE_AT91_DBGU0 select HAVE_AT91_USART3 select HAVE_AT91_USART4 select HAVE_AT91_USART5 @@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45 select HAVE_AT91_USART3 select HAVE_FB_ATMEL select HAVE_NET_MACB + select HAVE_AT91_DBGU1 config ARCH_AT91CAP9 bool "AT91CAP9" @@ -81,6 +95,7 @@ config ARCH_AT91CAP9 select GENERIC_CLOCKEVENTS select HAVE_FB_ATMEL select HAVE_NET_MACB + select HAVE_AT91_DBGU1 config ARCH_AT91X40 bool "AT91x40" @@ -510,8 +525,13 @@ config AT91_TIMER_HZ choice prompt "Select a UART for early kernel messages" -config AT91_EARLY_DBGU - bool "DBGU" +config AT91_EARLY_DBGU0 + bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl" + depends on HAVE_AT91_DBGU0 + +config AT91_EARLY_DBGU1 + bool "DBGU on 9263, 9g45 and cap9" + depends on HAVE_AT91_DBGU1 config AT91_EARLY_USART0 bool "USART0" diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index 17632b8..edb879a 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c @@ -13,7 +13,6 @@ */ #include <linux/module.h> -#include <linux/pm.h> #include <asm/irq.h> #include <asm/mach/arch.h> @@ -23,11 +22,11 @@ #include <mach/at91cap9.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" /* -------------------------------------------------------------------- * Clocks @@ -223,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), + CLKDEV_CON_ID("pioA", &pioABCD_clk), + CLKDEV_CON_ID("pioB", &pioABCD_clk), + CLKDEV_CON_ID("pioC", &pioABCD_clk), + CLKDEV_CON_ID("pioD", &pioABCD_clk), }; static struct clk_lookup usart_clocks_lookups[] = { @@ -295,37 +298,27 @@ void __init at91cap9_set_console_clock(int id) * GPIO * -------------------------------------------------------------------- */ -static struct at91_gpio_bank at91cap9_gpio[] = { +static struct at91_gpio_bank at91cap9_gpio[] __initdata = { { .id = AT91CAP9_ID_PIOABCD, - .offset = AT91_PIOA, - .clock = &pioABCD_clk, + .regbase = AT91CAP9_BASE_PIOA, }, { .id = AT91CAP9_ID_PIOABCD, - .offset = AT91_PIOB, - .clock = &pioABCD_clk, + .regbase = AT91CAP9_BASE_PIOB, }, { .id = AT91CAP9_ID_PIOABCD, - .offset = AT91_PIOC, - .clock = &pioABCD_clk, + .regbase = AT91CAP9_BASE_PIOC, }, { .id = AT91CAP9_ID_PIOABCD, - .offset = AT91_PIOD, - .clock = &pioABCD_clk, + .regbase = AT91CAP9_BASE_PIOD, } }; -static void at91cap9_reset(void) +static void at91cap9_restart(char mode, const char *cmd) { at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); } -static void at91cap9_poweroff(void) -{ - at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); -} - - /* -------------------------------------------------------------------- * AT91CAP9 processor initialization * -------------------------------------------------------------------- */ @@ -335,10 +328,16 @@ static void __init at91cap9_map_io(void) at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); } +static void __init at91cap9_ioremap_registers(void) +{ + at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); + at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); + at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); +} + static void __init at91cap9_initialize(void) { - at91_arch_reset = at91cap9_reset; - pm_power_off = at91cap9_poweroff; + arm_pm_restart = at91cap9_restart; at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); /* Register GPIO subsystem */ @@ -396,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91cap9_soc = { .map_io = at91cap9_map_io, .default_irq_priority = at91cap9_default_irq_priority, + .ioremap_registers = at91cap9_ioremap_registers, .register_clocks = at91cap9_register_clocks, .init = at91cap9_initialize, }; diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index 695aeca..d298fb7 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c @@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) /* Enable VBus control for UHP ports */ for (i = 0; i < data->ports; i++) { - if (data->vbus_pin[i]) + if (gpio_is_valid(data->vbus_pin[i])) at91_set_gpio_output(data->vbus_pin[i], 0); } @@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); - if (data && data->vbus_pin > 0) { + if (data && gpio_is_valid(data->vbus_pin)) { at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); usba_udc_data.pdata.vbus_pin = data->vbus_pin; @@ -232,7 +232,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data) if (!data) return; - if (data->phy_irq_pin) { + if (gpio_is_valid(data->phy_irq_pin)) { at91_set_gpio_input(data->phy_irq_pin, 0); at91_set_deglitch(data->phy_irq_pin, 1); } @@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) return; /* input/irq */ - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } - if (data->wp_pin) + if (gpio_is_valid(data->wp_pin)) at91_set_gpio_input(data->wp_pin, 1); - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) at91_set_gpio_output(data->vcc_pin, 0); if (mmc_id == 0) { /* MCI0 */ @@ -398,8 +398,8 @@ static struct resource nand_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_BASE_SYS + AT91_ECC, - .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, + .start = AT91CAP9_BASE_ECC, + .end = AT91CAP9_BASE_ECC + SZ_512 - 1, .flags = IORESOURCE_MEM, } }; @@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); /* enable pin */ - if (data->enable_pin) + if (gpio_is_valid(data->enable_pin)) at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ - if (data->rdy_pin) + if (gpio_is_valid(data->rdy_pin)) at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ - if (data->det_pin) + if (gpio_is_valid(data->det_pin)) at91_set_gpio_input(data->det_pin, 1); nand_data = *data; @@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { } static struct resource rtt_resources[] = { { - .start = AT91_BASE_SYS + AT91_RTT, - .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .start = AT91CAP9_BASE_RTT, + .end = AT91CAP9_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; @@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void) * -------------------------------------------------------------------- */ #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = AT91CAP9_BASE_WDT, + .end = AT91CAP9_BASE_WDT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + static struct platform_device at91cap9_wdt_device = { .name = "at91_wdt", .id = -1, - .num_resources = 0, + .resource = wdt_resources, + .num_resources = ARRAY_SIZE(wdt_resources), }; static void __init at91_add_device_watchdog(void) @@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ /* reset */ - if (data->reset_pin) + if (gpio_is_valid(data->reset_pin)) at91_set_gpio_output(data->reset_pin, 0); ac97_data = *data; @@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #if defined(CONFIG_SERIAL_ATMEL) static struct resource dbgu_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DBGU, - .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .start = AT91CAP9_BASE_DBGU, + .end = AT91CAP9_BASE_DBGU + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 713d3bd..99c3174 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -23,6 +23,7 @@ #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" static struct map_desc at91rm9200_io_desc[] __initdata = { { @@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), + CLKDEV_CON_ID("pioA", &pioA_clk), + CLKDEV_CON_ID("pioB", &pioB_clk), + CLKDEV_CON_ID("pioC", &pioC_clk), + CLKDEV_CON_ID("pioD", &pioD_clk), }; static struct clk_lookup usart_clocks_lookups[] = { @@ -268,27 +273,23 @@ void __init at91rm9200_set_console_clock(int id) * GPIO * -------------------------------------------------------------------- */ -static struct at91_gpio_bank at91rm9200_gpio[] = { +static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { { .id = AT91RM9200_ID_PIOA, - .offset = AT91_PIOA, - .clock = &pioA_clk, + .regbase = AT91RM9200_BASE_PIOA, }, { .id = AT91RM9200_ID_PIOB, - .offset = AT91_PIOB, - .clock = &pioB_clk, + .regbase = AT91RM9200_BASE_PIOB, }, { .id = AT91RM9200_ID_PIOC, - .offset = AT91_PIOC, - .clock = &pioC_clk, + .regbase = AT91RM9200_BASE_PIOC, }, { .id = AT91RM9200_ID_PIOD, - .offset = AT91_PIOD, - .clock = &pioD_clk, + .regbase = AT91RM9200_BASE_PIOD, } }; -static void at91rm9200_reset(void) +static void at91rm9200_restart(char mode, const char *cmd) { /* * Perform a hardware reset with the use of the Watchdog timer. @@ -307,9 +308,13 @@ static void __init at91rm9200_map_io(void) iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); } +static void __init at91rm9200_ioremap_registers(void) +{ +} + static void __init at91rm9200_initialize(void) { - at91_arch_reset = at91rm9200_reset; + arm_pm_restart = at91rm9200_restart; at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) @@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91rm9200_soc = { .map_io = at91rm9200_map_io, .default_irq_priority = at91rm9200_default_irq_priority, + .ioremap_registers = at91rm9200_ioremap_registers, .register_clocks = at91rm9200_register_clocks, .init = at91rm9200_initialize, }; diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 55d2291..18bacec 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data) if (!data) return; - if (data->vbus_pin) { + if (gpio_is_valid(data->vbus_pin)) { at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); } - if (data->pullup_pin) + if (gpio_is_valid(data->pullup_pin)) at91_set_gpio_output(data->pullup_pin, 0); udc_data = *data; @@ -167,7 +167,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data) if (!data) return; - if (data->phy_irq_pin) { + if (gpio_is_valid(data->phy_irq_pin)) { at91_set_gpio_input(data->phy_irq_pin, 0); at91_set_deglitch(data->phy_irq_pin, 1); } @@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) ); /* input/irq */ - if (data->irq_pin) { + if (gpio_is_valid(data->irq_pin)) { at91_set_gpio_input(data->irq_pin, 1); at91_set_deglitch(data->irq_pin, 1); } @@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) at91_set_deglitch(data->det_pin, 1); /* outputs, initially off */ - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) at91_set_gpio_output(data->vcc_pin, 0); at91_set_gpio_output(data->rst_pin, 0); @@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) return; /* input/irq */ - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } - if (data->wp_pin) + if (gpio_is_valid(data->wp_pin)) at91_set_gpio_input(data->wp_pin, 1); - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) at91_set_gpio_output(data->vcc_pin, 0); /* CLK */ @@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) ); /* enable pin */ - if (data->enable_pin) + if (gpio_is_valid(data->enable_pin)) at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ - if (data->rdy_pin) + if (gpio_is_valid(data->rdy_pin)) at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ - if (data->det_pin) + if (gpio_is_valid(data->det_pin)) at91_set_gpio_input(data->det_pin, 1); at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ @@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { } * -------------------------------------------------------------------- */ #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) +static struct resource rtc_resources[] = { + [0] = { + .start = AT91RM9200_BASE_RTC, + .end = AT91RM9200_BASE_RTC + SZ_256 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, +}; + static struct platform_device at91rm9200_rtc_device = { .name = "at91_rtc", .id = -1, - .num_resources = 0, + .resource = rtc_resources, + .num_resources = ARRAY_SIZE(rtc_resources), }; static void __init at91_add_device_rtc(void) @@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #if defined(CONFIG_SERIAL_ATMEL) static struct resource dbgu_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DBGU, - .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .start = AT91RM9200_BASE_DBGU, + .end = AT91RM9200_BASE_DBGU + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 1dd69c8..a028cdf 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c @@ -32,6 +32,8 @@ static unsigned long last_crtr; static u32 irqmask; static struct clock_event_device clkevt; +#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ) + /* * The ST_CRTR is updated asynchronously to the master clock ... but * the updates as seen by the CPU don't seem to be strictly monotonic. @@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) if (sr & AT91_ST_PITS) { u32 crtr = read_CRTR(); - while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { - last_crtr += LATCH; + while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) { + last_crtr += RM9200_TIMER_LATCH; clkevt.event_handler(&clkevt); } return IRQ_HANDLED; @@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) case CLOCK_EVT_MODE_PERIODIC: /* PIT for periodic irqs; fixed rate of 1/HZ */ irqmask = AT91_ST_PITS; - at91_sys_write(AT91_ST_PIMR, LATCH); + at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); break; case CLOCK_EVT_MODE_ONESHOT: /* ALM for oneshot irqs, set by next_event() diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 1c945e3..5e46e4a 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -11,7 +11,6 @@ */ #include <linux/module.h> -#include <linux/pm.h> #include <asm/irq.h> #include <asm/mach/arch.h> @@ -21,11 +20,11 @@ #include <mach/at91sam9260.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" /* -------------------------------------------------------------------- * Clocks @@ -211,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), + CLKDEV_CON_ID("pioA", &pioA_clk), + CLKDEV_CON_ID("pioB", &pioB_clk), + CLKDEV_CON_ID("pioC", &pioC_clk), }; static struct clk_lookup usart_clocks_lookups[] = { @@ -272,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id) * GPIO * -------------------------------------------------------------------- */ -static struct at91_gpio_bank at91sam9260_gpio[] = { +static struct at91_gpio_bank at91sam9260_gpio[] __initdata = { { .id = AT91SAM9260_ID_PIOA, - .offset = AT91_PIOA, - .clock = &pioA_clk, + .regbase = AT91SAM9260_BASE_PIOA, }, { .id = AT91SAM9260_ID_PIOB, - .offset = AT91_PIOB, - .clock = &pioB_clk, + .regbase = AT91SAM9260_BASE_PIOB, }, { .id = AT91SAM9260_ID_PIOC, - .offset = AT91_PIOC, - .clock = &pioC_clk, + .regbase = AT91SAM9260_BASE_PIOC, } }; -static void at91sam9260_poweroff(void) -{ - at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); -} - - /* -------------------------------------------------------------------- * AT91SAM9260 processor initialization * -------------------------------------------------------------------- */ @@ -327,10 +320,16 @@ static void __init at91sam9260_map_io(void) } } +static void __init at91sam9260_ioremap_registers(void) +{ + at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC); + at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); + at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); +} + static void __init at91sam9260_initialize(void) { - at91_arch_reset = at91sam9_alt_reset; - pm_power_off = at91sam9260_poweroff; + arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | (1 << AT91SAM9260_ID_IRQ2); @@ -383,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9260_soc = { .map_io = at91sam9260_map_io, .default_irq_priority = at91sam9260_default_irq_priority, + .ioremap_registers = at91sam9260_ioremap_registers, .register_clocks = at91sam9260_register_clocks, .init = at91sam9260_initialize, }; diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index b1a4812..642ccb6 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) if (!data) return; - if (data->vbus_pin) { + if (gpio_is_valid(data->vbus_pin)) { at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); } @@ -168,7 +168,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data) if (!data) return; - if (data->phy_irq_pin) { + if (gpio_is_valid(data->phy_irq_pin)) { at91_set_gpio_input(data->phy_irq_pin, 0); at91_set_deglitch(data->phy_irq_pin, 1); } @@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) return; /* input/irq */ - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } - if (data->wp_pin) + if (gpio_is_valid(data->wp_pin)) at91_set_gpio_input(data->wp_pin, 1); - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) at91_set_gpio_output(data->vcc_pin, 0); /* CLK */ @@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { if (data->slot[i].bus_width) { /* input/irq */ - if (data->slot[i].detect_pin) { + if (gpio_is_valid(data->slot[i].detect_pin)) { at91_set_gpio_input(data->slot[i].detect_pin, 1); at91_set_deglitch(data->slot[i].detect_pin, 1); } - if (data->slot[i].wp_pin) + if (gpio_is_valid(data->slot[i].wp_pin)) at91_set_gpio_input(data->slot[i].wp_pin, 1); switch (i) { @@ -399,8 +399,8 @@ static struct resource nand_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_BASE_SYS + AT91_ECC, - .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, + .start = AT91SAM9260_BASE_ECC, + .end = AT91SAM9260_BASE_ECC + SZ_512 - 1, .flags = IORESOURCE_MEM, } }; @@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* enable pin */ - if (data->enable_pin) + if (gpio_is_valid(data->enable_pin)) at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ - if (data->rdy_pin) + if (gpio_is_valid(data->rdy_pin)) at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ - if (data->det_pin) + if (gpio_is_valid(data->det_pin)) at91_set_gpio_input(data->det_pin, 1); nand_data = *data; @@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { } static struct resource rtt_resources[] = { { - .start = AT91_BASE_SYS + AT91_RTT, - .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .start = AT91SAM9260_BASE_RTT, + .end = AT91SAM9260_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; @@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void) * -------------------------------------------------------------------- */ #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = AT91SAM9260_BASE_WDT, + .end = AT91SAM9260_BASE_WDT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + static struct platform_device at91sam9260_wdt_device = { .name = "at91_wdt", .id = -1, - .num_resources = 0, + .resource = wdt_resources, + .num_resources = ARRAY_SIZE(wdt_resources), }; static void __init at91_add_device_watchdog(void) @@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #if defined(CONFIG_SERIAL_ATMEL) static struct resource dbgu_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DBGU, - .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .start = AT91SAM9260_BASE_DBGU, + .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa); - if (data->rst_pin) { + if (gpio_is_valid(data->rst_pin)) { at91_set_multi_drive(data->rst_pin, 0); at91_set_gpio_output(data->rst_pin, 1); } - if (data->irq_pin) { + if (gpio_is_valid(data->irq_pin)) { at91_set_gpio_input(data->irq_pin, 0); at91_set_deglitch(data->irq_pin, 1); } - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 0); at91_set_deglitch(data->det_pin, 1); } diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 658a518..b85b9ea 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -11,7 +11,6 @@ */ #include <linux/module.h> -#include <linux/pm.h> #include <asm/irq.h> #include <asm/mach/arch.h> @@ -20,11 +19,11 @@ #include <mach/at91sam9261.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" /* -------------------------------------------------------------------- * Clocks @@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), + CLKDEV_CON_ID("pioA", &pioA_clk), + CLKDEV_CON_ID("pioB", &pioB_clk), + CLKDEV_CON_ID("pioC", &pioC_clk), }; static struct clk_lookup usart_clocks_lookups[] = { @@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id) * GPIO * -------------------------------------------------------------------- */ -static struct at91_gpio_bank at91sam9261_gpio[] = { +static struct at91_gpio_bank at91sam9261_gpio[] __initdata = { { .id = AT91SAM9261_ID_PIOA, - .offset = AT91_PIOA, - .clock = &pioA_clk, + .regbase = AT91SAM9261_BASE_PIOA, }, { .id = AT91SAM9261_ID_PIOB, - .offset = AT91_PIOB, - .clock = &pioB_clk, + .regbase = AT91SAM9261_BASE_PIOB, }, { .id = AT91SAM9261_ID_PIOC, - .offset = AT91_PIOC, - .clock = &pioC_clk, + .regbase = AT91SAM9261_BASE_PIOC, } }; -static void at91sam9261_poweroff(void) -{ - at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); -} - - /* -------------------------------------------------------------------- * AT91SAM9261 processor initialization * -------------------------------------------------------------------- */ @@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void) at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); } +static void __init at91sam9261_ioremap_registers(void) +{ + at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC); + at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); + at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); +} + static void __init at91sam9261_initialize(void) { - at91_arch_reset = at91sam9_alt_reset; - pm_power_off = at91sam9261_poweroff; + arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | (1 << AT91SAM9261_ID_IRQ2); @@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9261_soc = { .map_io = at91sam9261_map_io, .default_irq_priority = at91sam9261_default_irq_priority, + .ioremap_registers = at91sam9261_ioremap_registers, .register_clocks = at91sam9261_register_clocks, .init = at91sam9261_initialize, }; diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index a178b58..fc59cbd 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) if (!data) return; - if (data->vbus_pin) { + if (gpio_is_valid(data->vbus_pin)) { at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); } @@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) return; /* input/irq */ - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } - if (data->wp_pin) + if (gpio_is_valid(data->wp_pin)) at91_set_gpio_input(data->wp_pin, 1); - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) at91_set_gpio_output(data->vcc_pin, 0); /* CLK */ @@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* enable pin */ - if (data->enable_pin) + if (gpio_is_valid(data->enable_pin)) at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ - if (data->rdy_pin) + if (gpio_is_valid(data->rdy_pin)) at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ - if (data->det_pin) + if (gpio_is_valid(data->det_pin)) at91_set_gpio_input(data->det_pin, 1); at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ @@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { } static struct resource rtt_resources[] = { { - .start = AT91_BASE_SYS + AT91_RTT, - .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .start = AT91SAM9261_BASE_RTT, + .end = AT91SAM9261_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; @@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void) * -------------------------------------------------------------------- */ #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = AT91SAM9261_BASE_WDT, + .end = AT91SAM9261_BASE_WDT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + static struct platform_device at91sam9261_wdt_device = { .name = "at91_wdt", .id = -1, - .num_resources = 0, + .resource = wdt_resources, + .num_resources = ARRAY_SIZE(wdt_resources), }; static void __init at91_add_device_watchdog(void) @@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #if defined(CONFIG_SERIAL_ATMEL) static struct resource dbgu_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DBGU, - .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .start = AT91SAM9261_BASE_DBGU, + .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 182d112..79e3669 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -11,7 +11,6 @@ */ #include <linux/module.h> -#include <linux/pm.h> #include <asm/irq.h> #include <asm/mach/arch.h> @@ -19,11 +18,11 @@ #include <mach/at91sam9263.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" /* -------------------------------------------------------------------- * Clocks @@ -193,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), + CLKDEV_CON_ID("pioA", &pioA_clk), + CLKDEV_CON_ID("pioB", &pioB_clk), + CLKDEV_CON_ID("pioC", &pioCDE_clk), + CLKDEV_CON_ID("pioD", &pioCDE_clk), + CLKDEV_CON_ID("pioE", &pioCDE_clk), }; static struct clk_lookup usart_clocks_lookups[] = { @@ -265,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id) * GPIO * -------------------------------------------------------------------- */ -static struct at91_gpio_bank at91sam9263_gpio[] = { +static struct at91_gpio_bank at91sam9263_gpio[] __initdata = { { .id = AT91SAM9263_ID_PIOA, - .offset = AT91_PIOA, - .clock = &pioA_clk, + .regbase = AT91SAM9263_BASE_PIOA, }, { .id = AT91SAM9263_ID_PIOB, - .offset = AT91_PIOB, - .clock = &pioB_clk, + .regbase = AT91SAM9263_BASE_PIOB, }, { .id = AT91SAM9263_ID_PIOCDE, - .offset = AT91_PIOC, - .clock = &pioCDE_clk, + .regbase = AT91SAM9263_BASE_PIOC, }, { .id = AT91SAM9263_ID_PIOCDE, - .offset = AT91_PIOD, - .clock = &pioCDE_clk, + .regbase = AT91SAM9263_BASE_PIOD, }, { .id = AT91SAM9263_ID_PIOCDE, - .offset = AT91_PIOE, - .clock = &pioCDE_clk, + .regbase = AT91SAM9263_BASE_PIOE, } }; -static void at91sam9263_poweroff(void) -{ - at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); -} - - /* -------------------------------------------------------------------- * AT91SAM9263 processor initialization * -------------------------------------------------------------------- */ @@ -305,10 +298,17 @@ static void __init at91sam9263_map_io(void) at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); } +static void __init at91sam9263_ioremap_registers(void) +{ + at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); + at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); + at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); + at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); +} + static void __init at91sam9263_initialize(void) { - at91_arch_reset = at91sam9_alt_reset; - pm_power_off = at91sam9263_poweroff; + arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); /* Register GPIO subsystem */ @@ -360,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9263_soc = { .map_io = at91sam9263_map_io, .default_irq_priority = at91sam9263_default_irq_priority, + .ioremap_registers = at91sam9263_ioremap_registers, .register_clocks = at91sam9263_register_clocks, .init = at91sam9263_initialize, }; diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 183b5f1..7b46b27 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) /* Enable VBus control for UHP ports */ for (i = 0; i < data->ports; i++) { - if (data->vbus_pin[i]) + if (gpio_is_valid(data->vbus_pin[i])) at91_set_gpio_output(data->vbus_pin[i], 0); } @@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) if (!data) return; - if (data->vbus_pin) { + if (gpio_is_valid(data->vbus_pin)) { at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); } @@ -176,7 +176,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data) if (!data) return; - if (data->phy_irq_pin) { + if (gpio_is_valid(data->phy_irq_pin)) { at91_set_gpio_input(data->phy_irq_pin, 0); at91_set_deglitch(data->phy_irq_pin, 1); } @@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) return; /* input/irq */ - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } - if (data->wp_pin) + if (gpio_is_valid(data->wp_pin)) at91_set_gpio_input(data->wp_pin, 1); - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) at91_set_gpio_output(data->vcc_pin, 0); if (mmc_id == 0) { /* MCI0 */ @@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) } at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } - if (data->irq_pin) { + if (gpio_is_valid(data->irq_pin)) { at91_set_gpio_input(data->irq_pin, 1); at91_set_deglitch(data->irq_pin, 1); } - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) /* initially off */ at91_set_gpio_output(data->vcc_pin, 0); @@ -473,8 +473,8 @@ static struct resource nand_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_BASE_SYS + AT91_ECC0, - .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1, + .start = AT91SAM9263_BASE_ECC0, + .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1, .flags = IORESOURCE_MEM, } }; @@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); /* enable pin */ - if (data->enable_pin) + if (gpio_is_valid(data->enable_pin)) at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ - if (data->rdy_pin) + if (gpio_is_valid(data->rdy_pin)) at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ - if (data->det_pin) + if (gpio_is_valid(data->det_pin)) at91_set_gpio_input(data->det_pin, 1); nand_data = *data; @@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ /* reset */ - if (data->reset_pin) + if (gpio_is_valid(data->reset_pin)) at91_set_gpio_output(data->reset_pin, 0); ac97_data = *data; @@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { } static struct resource rtt0_resources[] = { { - .start = AT91_BASE_SYS + AT91_RTT0, - .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, + .start = AT91SAM9263_BASE_RTT0, + .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; @@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = { static struct resource rtt1_resources[] = { { - .start = AT91_BASE_SYS + AT91_RTT1, - .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, + .start = AT91SAM9263_BASE_RTT1, + .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; @@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void) * -------------------------------------------------------------------- */ #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = AT91SAM9263_BASE_WDT, + .end = AT91SAM9263_BASE_WDT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + static struct platform_device at91sam9263_wdt_device = { .name = "at91_wdt", .id = -1, - .num_resources = 0, + .resource = wdt_resources, + .num_resources = ARRAY_SIZE(wdt_resources), }; static void __init at91_add_device_watchdog(void) @@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} static struct resource dbgu_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DBGU, - .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .start = AT91SAM9263_BASE_DBGU, + .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index 4ba8549..d89ead7 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c @@ -25,7 +25,17 @@ static u32 pit_cycle; /* write-once */ static u32 pit_cnt; /* access only w/system irq blocked */ +static void __iomem *pit_base_addr __read_mostly; +static inline unsigned int pit_read(unsigned int reg_offset) +{ + return __raw_readl(pit_base_addr + reg_offset); +} + +static inline void pit_write(unsigned int reg_offset, unsigned long value) +{ + __raw_writel(value, pit_base_addr + reg_offset); +} /* * Clocksource: just a monotonic counter of MCK/16 cycles. @@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs) raw_local_irq_save(flags); elapsed = pit_cnt; - t = at91_sys_read(AT91_PIT_PIIR); + t = pit_read(AT91_PIT_PIIR); raw_local_irq_restore(flags); elapsed += PIT_PICNT(t) * pit_cycle; @@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) switch (mode) { case CLOCK_EVT_MODE_PERIODIC: /* update clocksource counter */ - pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); - at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN + pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR)); + pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN); break; case CLOCK_EVT_MODE_ONESHOT: @@ -74,7 +84,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) case CLOCK_EVT_MODE_SHUTDOWN: case CLOCK_EVT_MODE_UNUSED: /* disable irq, leaving the clocksource active */ - at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); + pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); break; case CLOCK_EVT_MODE_RESUME: break; @@ -103,11 +113,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) /* The PIT interrupt may be disabled, and is shared */ if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) - && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) { + && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) { unsigned nr_ticks; /* Get number of ticks performed before irq, and ack it */ - nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); + nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR)); do { pit_cnt += pit_cycle; pit_clkevt.event_handler(&pit_clkevt); @@ -129,14 +139,14 @@ static struct irqaction at91sam926x_pit_irq = { static void at91sam926x_pit_reset(void) { /* Disable timer and irqs */ - at91_sys_write(AT91_PIT_MR, 0); + pit_write(AT91_PIT_MR, 0); /* Clear any pending interrupts, wait for PIT to stop counting */ - while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0) + while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0) cpu_relax(); /* Start PIT but don't enable IRQ */ - at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); + pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); } /* @@ -178,7 +188,15 @@ static void __init at91sam926x_pit_init(void) static void at91sam926x_pit_suspend(void) { /* Disable timer */ - at91_sys_write(AT91_PIT_MR, 0); + pit_write(AT91_PIT_MR, 0); +} + +void __init at91sam926x_ioremap_pit(u32 addr) +{ + pit_base_addr = ioremap(addr, 16); + + if (!pit_base_addr) + panic("Impossible to ioremap PIT\n"); } struct sys_timer at91sam926x_timer = { diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S index e0256de..d3f931c 100644 --- a/arch/arm/mach-at91/at91sam9_alt_reset.S +++ b/arch/arm/mach-at91/at91sam9_alt_reset.S @@ -14,20 +14,15 @@ */ #include <linux/linkage.h> -#include <asm/system.h> #include <mach/hardware.h> #include <mach/at91sam9_sdramc.h> #include <mach/at91_rstc.h> .arm - .globl at91sam9_alt_reset + .globl at91sam9_alt_restart -at91sam9_alt_reset: mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #CR_I - mcr p15, 0, r0, c1, c0, 0 @ enable I-cache - - ldr r0, .at91_va_base_sdramc @ preload constants +at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants ldr r1, .at91_va_base_rstc_cr mov r2, #1 diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 5a0e522..7032dd3 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -11,7 +11,6 @@ */ #include <linux/module.h> -#include <linux/pm.h> #include <linux/dma-mapping.h> #include <asm/irq.h> @@ -20,12 +19,12 @@ #include <mach/at91sam9g45.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> #include <mach/cpu.h> #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" /* -------------------------------------------------------------------- * Clocks @@ -233,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), + CLKDEV_CON_ID("pioA", &pioA_clk), + CLKDEV_CON_ID("pioB", &pioB_clk), + CLKDEV_CON_ID("pioC", &pioC_clk), + CLKDEV_CON_ID("pioD", &pioDE_clk), + CLKDEV_CON_ID("pioE", &pioDE_clk), }; static struct clk_lookup usart_clocks_lookups[] = { @@ -295,41 +299,30 @@ void __init at91sam9g45_set_console_clock(int id) * GPIO * -------------------------------------------------------------------- */ -static struct at91_gpio_bank at91sam9g45_gpio[] = { +static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { { .id = AT91SAM9G45_ID_PIOA, - .offset = AT91_PIOA, - .clock = &pioA_clk, + .regbase = AT91SAM9G45_BASE_PIOA, }, { .id = AT91SAM9G45_ID_PIOB, - .offset = AT91_PIOB, - .clock = &pioB_clk, + .regbase = AT91SAM9G45_BASE_PIOB, }, { .id = AT91SAM9G45_ID_PIOC, - .offset = AT91_PIOC, - .clock = &pioC_clk, + .regbase = AT91SAM9G45_BASE_PIOC, }, { .id = AT91SAM9G45_ID_PIODE, - .offset = AT91_PIOD, - .clock = &pioDE_clk, + .regbase = AT91SAM9G45_BASE_PIOD, }, { .id = AT91SAM9G45_ID_PIODE, - .offset = AT91_PIOE, - .clock = &pioDE_clk, + .regbase = AT91SAM9G45_BASE_PIOE, } }; -static void at91sam9g45_reset(void) +static void at91sam9g45_restart(char mode, const char *cmd) { at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); } -static void at91sam9g45_poweroff(void) -{ - at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); -} - - /* -------------------------------------------------------------------- * AT91SAM9G45 processor initialization * -------------------------------------------------------------------- */ @@ -340,10 +333,16 @@ static void __init at91sam9g45_map_io(void) init_consistent_dma_size(SZ_4M); } +static void __init at91sam9g45_ioremap_registers(void) +{ + at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); + at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); + at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); +} + static void __init at91sam9g45_initialize(void) { - at91_arch_reset = at91sam9g45_reset; - pm_power_off = at91sam9g45_poweroff; + arm_pm_restart = at91sam9g45_restart; at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); /* Register GPIO subsystem */ @@ -395,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9g45_soc = { .map_io = at91sam9g45_map_io, .default_irq_priority = at91sam9g45_default_irq_priority, + .ioremap_registers = at91sam9g45_ioremap_registers, .register_clocks = at91sam9g45_register_clocks, .init = at91sam9g45_initialize, }; diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index e2cb835..b7582dd 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = { static struct resource hdmac_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DMA, - .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, + .start = AT91SAM9G45_BASE_DMA, + .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -120,7 +120,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) /* Enable VBus control for UHP ports */ for (i = 0; i < data->ports; i++) { - if (data->vbus_pin[i]) + if (gpio_is_valid(data->vbus_pin[i])) at91_set_gpio_output(data->vbus_pin[i], 0); } @@ -181,7 +181,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) /* Enable VBus control for UHP ports */ for (i = 0; i < data->ports; i++) { - if (data->vbus_pin[i]) + if (gpio_is_valid(data->vbus_pin[i])) at91_set_gpio_output(data->vbus_pin[i], 0); } @@ -263,7 +263,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); - if (data && data->vbus_pin > 0) { + if (data && gpio_is_valid(data->vbus_pin)) { at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); usba_udc_data.pdata.vbus_pin = data->vbus_pin; @@ -316,7 +316,7 @@ void __init at91_add_device_eth(struct macb_platform_data *data) if (!data) return; - if (data->phy_irq_pin) { + if (gpio_is_valid(data->phy_irq_pin)) { at91_set_gpio_input(data->phy_irq_pin, 0); at91_set_deglitch(data->phy_irq_pin, 1); } @@ -449,11 +449,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) /* input/irq */ - if (data->slot[0].detect_pin) { + if (gpio_is_valid(data->slot[0].detect_pin)) { at91_set_gpio_input(data->slot[0].detect_pin, 1); at91_set_deglitch(data->slot[0].detect_pin, 1); } - if (data->slot[0].wp_pin) + if (gpio_is_valid(data->slot[0].wp_pin)) at91_set_gpio_input(data->slot[0].wp_pin, 1); if (mmc_id == 0) { /* MCI0 */ @@ -529,8 +529,8 @@ static struct resource nand_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_BASE_SYS + AT91_ECC, - .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, + .start = AT91SAM9G45_BASE_ECC, + .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1, .flags = IORESOURCE_MEM, } }; @@ -556,15 +556,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); /* enable pin */ - if (data->enable_pin) + if (gpio_is_valid(data->enable_pin)) at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ - if (data->rdy_pin) + if (gpio_is_valid(data->rdy_pin)) at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ - if (data->det_pin) + if (gpio_is_valid(data->det_pin)) at91_set_gpio_input(data->det_pin, 1); nand_data = *data; @@ -859,7 +859,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ /* reset */ - if (data->reset_pin) + if (gpio_is_valid(data->reset_pin)) at91_set_gpio_output(data->reset_pin, 0); ac97_data = *data; @@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { } * -------------------------------------------------------------------- */ #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) +static struct resource rtc_resources[] = { + [0] = { + .start = AT91SAM9G45_BASE_RTC, + .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, + .flags = IORESOURCE_IRQ, + }, +}; + static struct platform_device at91sam9g45_rtc_device = { .name = "at91_rtc", .id = -1, - .num_resources = 0, + .resource = rtc_resources, + .num_resources = ARRAY_SIZE(rtc_resources), }; static void __init at91_add_device_rtc(void) @@ -1081,8 +1095,8 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {} static struct resource rtt_resources[] = { { - .start = AT91_BASE_SYS + AT91_RTT, - .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .start = AT91SAM9G45_BASE_RTT, + .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; @@ -1133,10 +1147,19 @@ static void __init at91_add_device_trng(void) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = AT91SAM9G45_BASE_WDT, + .end = AT91SAM9G45_BASE_WDT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + static struct platform_device at91sam9g45_wdt_device = { .name = "at91_wdt", .id = -1, - .num_resources = 0, + .resource = wdt_resources, + .num_resources = ARRAY_SIZE(wdt_resources), }; static void __init at91_add_device_watchdog(void) @@ -1332,8 +1355,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #if defined(CONFIG_SERIAL_ATMEL) static struct resource dbgu_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DBGU, - .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .start = AT91SAM9G45_BASE_DBGU, + .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index a238105..d6bcb1d 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -10,7 +10,6 @@ */ #include <linux/module.h> -#include <linux/pm.h> #include <asm/irq.h> #include <asm/mach/arch.h> @@ -20,11 +19,11 @@ #include <mach/at91sam9rl.h> #include <mach/at91_pmc.h> #include <mach/at91_rstc.h> -#include <mach/at91_shdwc.h> #include "soc.h" #include "generic.h" #include "clock.h" +#include "sam9_smc.h" /* -------------------------------------------------------------------- * Clocks @@ -184,6 +183,10 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), + CLKDEV_CON_ID("pioA", &pioA_clk), + CLKDEV_CON_ID("pioB", &pioB_clk), + CLKDEV_CON_ID("pioC", &pioC_clk), + CLKDEV_CON_ID("pioD", &pioD_clk), }; static struct clk_lookup usart_clocks_lookups[] = { @@ -243,32 +246,22 @@ void __init at91sam9rl_set_console_clock(int id) * GPIO * -------------------------------------------------------------------- */ -static struct at91_gpio_bank at91sam9rl_gpio[] = { +static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = { { .id = AT91SAM9RL_ID_PIOA, - .offset = AT91_PIOA, - .clock = &pioA_clk, + .regbase = AT91SAM9RL_BASE_PIOA, }, { .id = AT91SAM9RL_ID_PIOB, - .offset = AT91_PIOB, - .clock = &pioB_clk, + .regbase = AT91SAM9RL_BASE_PIOB, }, { .id = AT91SAM9RL_ID_PIOC, - .offset = AT91_PIOC, - .clock = &pioC_clk, + .regbase = AT91SAM9RL_BASE_PIOC, }, { .id = AT91SAM9RL_ID_PIOD, - .offset = AT91_PIOD, - .clock = &pioD_clk, + .regbase = AT91SAM9RL_BASE_PIOD, } }; -static void at91sam9rl_poweroff(void) -{ - at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); -} - - /* -------------------------------------------------------------------- * AT91SAM9RL processor initialization * -------------------------------------------------------------------- */ @@ -290,10 +283,16 @@ static void __init at91sam9rl_map_io(void) at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); } +static void __init at91sam9rl_ioremap_registers(void) +{ + at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC); + at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); + at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); +} + static void __init at91sam9rl_initialize(void) { - at91_arch_reset = at91sam9_alt_reset; - pm_power_off = at91sam9rl_poweroff; + arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); /* Register GPIO subsystem */ @@ -345,6 +344,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9rl_soc = { .map_io = at91sam9rl_map_io, .default_irq_priority = at91sam9rl_default_irq_priority, + .ioremap_registers = at91sam9rl_ioremap_registers, .register_clocks = at91sam9rl_register_clocks, .init = at91sam9rl_initialize, }; diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 628eb56..61908dc 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = { static struct resource hdmac_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DMA, - .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, + .start = AT91SAM9RL_BASE_DMA, + .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [2] = { @@ -147,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); - if (data && data->vbus_pin > 0) { + if (data && gpio_is_valid(data->vbus_pin)) { at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); usba_udc_data.pdata.vbus_pin = data->vbus_pin; @@ -201,13 +201,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) return; /* input/irq */ - if (data->det_pin) { + if (gpio_is_valid(data->det_pin)) { at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } - if (data->wp_pin) + if (gpio_is_valid(data->wp_pin)) at91_set_gpio_input(data->wp_pin, 1); - if (data->vcc_pin) + if (gpio_is_valid(data->vcc_pin)) at91_set_gpio_output(data->vcc_pin, 0); /* CLK */ @@ -248,8 +248,8 @@ static struct resource nand_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = AT91_BASE_SYS + AT91_ECC, - .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, + .start = AT91SAM9RL_BASE_ECC, + .end = AT91SAM9RL_BASE_ECC + SZ_512 - 1, .flags = IORESOURCE_MEM, } }; @@ -275,15 +275,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* enable pin */ - if (data->enable_pin) + if (gpio_is_valid(data->enable_pin)) at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ - if (data->rdy_pin) + if (gpio_is_valid(data->rdy_pin)) at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ - if (data->det_pin) + if (gpio_is_valid(data->det_pin)) at91_set_gpio_input(data->det_pin, 1); at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ @@ -483,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ /* reset */ - if (data->reset_pin) + if (gpio_is_valid(data->reset_pin)) at91_set_gpio_output(data->reset_pin, 0); ac97_data = *data; @@ -685,8 +685,8 @@ static void __init at91_add_device_rtc(void) {} static struct resource rtt_resources[] = { { - .start = AT91_BASE_SYS + AT91_RTT, - .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, + .start = AT91SAM9RL_BASE_RTT, + .end = AT91SAM9RL_BASE_RTT + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; @@ -709,10 +709,19 @@ static void __init at91_add_device_rtt(void) * -------------------------------------------------------------------- */ #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +static struct resource wdt_resources[] = { + { + .start = AT91SAM9RL_BASE_WDT, + .end = AT91SAM9RL_BASE_WDT + SZ_16 - 1, + .flags = IORESOURCE_MEM, + } +}; + static struct platform_device at91sam9rl_wdt_device = { .name = "at91_wdt", .id = -1, - .num_resources = 0, + .resource = wdt_resources, + .num_resources = ARRAY_SIZE(wdt_resources), }; static void __init at91_add_device_watchdog(void) @@ -908,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #if defined(CONFIG_SERIAL_ATMEL) static struct resource dbgu_resources[] = { [0] = { - .start = AT91_BASE_SYS + AT91_DBGU, - .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, + .start = AT91SAM9RL_BASE_DBGU, + .end = AT91SAM9RL_BASE_DBGU + SZ_512 - 1, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index a60d98d..2628384 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c @@ -70,6 +70,8 @@ static struct macb_platform_data __initdata onearm_eth_data = { static struct at91_usbh_data __initdata onearm_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata onearm_udc_data = { diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 17fc779..3bb4069 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c @@ -75,6 +75,8 @@ static void __init afeb9260_init_early(void) */ static struct at91_usbh_data __initdata afeb9260_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = { */ static struct at91_udc_data __initdata afeb9260_udc_data = { .vbus_pin = AT91_PIN_PC5, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -138,6 +140,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = { .bus_width_16 = 0, .parts = afeb9260_nand_partition, .num_parts = ARRAY_SIZE(afeb9260_nand_partition), + .det_pin = -EINVAL, }; @@ -149,6 +152,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = { .wp_pin = AT91_PIN_PC4, .slot_b = 1, .wire4 = 1, + .vcc_pin = -EINVAL, }; @@ -169,6 +173,8 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { static struct at91_cf_data afeb9260_cf_data = { .chipselect = 4, .irq_pin = AT91_PIN_PA6, + .det_pin = -EINVAL, + .vcc_pin = -EINVAL, .rst_pin = AT91_PIN_PA7, .flags = AT91_CF_TRUE_IDE, }; diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 2037d2c4..8510e9e 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c @@ -62,6 +62,8 @@ static void __init cam60_init_early(void) */ static struct at91_usbh_data __initdata cam60_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; @@ -135,7 +137,7 @@ static struct mtd_partition __initdata cam60_nand_partition[] = { static struct atmel_nand_data __initdata cam60_nand_data = { .ale = 21, .cle = 22, - // .det_pin = ... not there + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PA9, .enable_pin = AT91_PIN_PA7, .parts = cam60_nand_partition, @@ -163,7 +165,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = { static void __init cam60_add_device_nand(void) { /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &cam60_nand_smc_config); + sam9_smc_configure(0, 3, &cam60_nand_smc_config); at91_add_device_nand(&cam60_nand_data); } diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index af5520c..ac3de4f 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c @@ -70,6 +70,8 @@ static void __init cap9adk_init_early(void) */ static struct at91_usbh_data __initdata cap9adk_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -144,9 +146,9 @@ static struct spi_board_info cap9adk_spi_devices[] = { */ static struct at91_mmc_data __initdata cap9adk_mmc_data = { .wire4 = 1, -// .det_pin = ... not connected -// .wp_pin = ... not connected -// .vcc_pin = ... not connected + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; @@ -154,6 +156,7 @@ static struct at91_mmc_data __initdata cap9adk_mmc_data = { * MACB Ethernet device */ static struct macb_platform_data __initdata cap9adk_macb_data = { + .phy_irq_pin = -EINVAL, .is_rmii = 1, }; @@ -172,8 +175,8 @@ static struct mtd_partition __initdata cap9adk_nand_partitions[] = { static struct atmel_nand_data __initdata cap9adk_nand_data = { .ale = 21, .cle = 22, -// .det_pin = ... not connected -// .rdy_pin = ... not connected + .det_pin = -EINVAL, + .rdy_pin = -EINVAL, .enable_pin = AT91_PIN_PD15, .parts = cap9adk_nand_partitions, .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), @@ -212,7 +215,7 @@ static void __init cap9adk_add_device_nand(void) cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &cap9adk_nand_smc_config); + sam9_smc_configure(0, 3, &cap9adk_nand_smc_config); at91_add_device_nand(&cap9adk_nand_data); } @@ -282,7 +285,7 @@ static __init void cap9adk_add_device_nor(void) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); /* configure chip-select 0 (NOR) */ - sam9_smc_configure(0, &cap9adk_nor_smc_config); + sam9_smc_configure(0, 0, &cap9adk_nor_smc_config); platform_device_register(&cap9adk_nor_flash); } @@ -351,7 +354,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data; * AC97 */ static struct ac97c_platform_data cap9adk_ac97_data = { -// .reset_pin = ... not connected + .reset_pin = -EINVAL, }; diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 529b356..59d9cf9 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c @@ -64,6 +64,8 @@ static struct macb_platform_data __initdata carmeva_eth_data = { static struct at91_usbh_data __initdata carmeva_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata carmeva_udc_data = { @@ -75,8 +77,8 @@ static struct at91_udc_data __initdata carmeva_udc_data = { // static struct at91_cf_data __initdata carmeva_cf_data = { // .det_pin = AT91_PIN_PB0, // .rst_pin = AT91_PIN_PC5, - // .irq_pin = ... not connected - // .vcc_pin = ... always powered + // .irq_pin = -EINVAL, + // .vcc_pin = -EINVAL, // }; static struct at91_mmc_data __initdata carmeva_mmc_data = { @@ -84,6 +86,7 @@ static struct at91_mmc_data __initdata carmeva_mmc_data = { .wire4 = 1, .det_pin = AT91_PIN_PB10, .wp_pin = AT91_PIN_PC14, + .vcc_pin = -EINVAL, }; static struct spi_board_info carmeva_spi_devices[] = { diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 04d2b9b..9ab3d1e 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c @@ -86,6 +86,8 @@ static void __init cpu9krea_init_early(void) */ static struct at91_usbh_data __initdata cpu9krea_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -93,13 +95,14 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = { */ static struct at91_udc_data __initdata cpu9krea_udc_data = { .vbus_pin = AT91_PIN_PC8, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; /* * MACB Ethernet device */ static struct macb_platform_data __initdata cpu9krea_macb_data = { + .phy_irq_pin = -EINVAL, .is_rmii = 1, }; @@ -112,6 +115,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = { .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, .bus_width_16 = 0, + .det_pin = -EINVAL, }; #ifdef CONFIG_MACH_CPU9260 @@ -156,7 +160,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = { static void __init cpu9krea_add_device_nand(void) { - sam9_smc_configure(3, &cpu9krea_nand_smc_config); + sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config); at91_add_device_nand(&cpu9krea_nand_data); } @@ -238,7 +242,7 @@ static __init void cpu9krea_add_device_nor(void) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); /* configure chip-select 0 (NOR) */ - sam9_smc_configure(0, &cpu9krea_nor_smc_config); + sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config); platform_device_register(&cpu9krea_nor_flash); } @@ -337,6 +341,8 @@ static struct at91_mmc_data __initdata cpu9krea_mmc_data = { .slot_b = 0, .wire4 = 1, .det_pin = AT91_PIN_PA29, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; static void __init cpu9krea_board_init(void) diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index 7a4c82e..368e142 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c @@ -83,11 +83,14 @@ static void __init cpuat91_init_early(void) } static struct macb_platform_data __initdata cpuat91_eth_data = { + .phy_irq_pin = -EINVAL, .is_rmii = 1, }; static struct at91_usbh_data __initdata cpuat91_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata cpuat91_udc_data = { @@ -98,6 +101,8 @@ static struct at91_udc_data __initdata cpuat91_udc_data = { static struct at91_mmc_data __initdata cpuat91_mmc_data = { .det_pin = AT91_PIN_PC2, .wire4 = 1, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; static struct physmap_flash_data cpuat91_flash_data = { diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index b004b20..1a1547b 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c @@ -65,11 +65,13 @@ static struct macb_platform_data __initdata csb337_eth_data = { static struct at91_usbh_data __initdata csb337_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata csb337_udc_data = { - // this has no VBUS sensing pin .pullup_pin = AT91_PIN_PA24, + .vbus_pin = -EINVAL, }; static struct i2c_board_info __initdata csb337_i2c_devices[] = { @@ -98,6 +100,7 @@ static struct at91_mmc_data __initdata csb337_mmc_data = { .slot_b = 0, .wire4 = 1, .wp_pin = AT91_PIN_PD6, + .vcc_pin = -EINVAL, }; static struct spi_board_info csb337_spi_devices[] = { diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index e966de5..f650bf3 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c @@ -59,6 +59,8 @@ static struct macb_platform_data __initdata csb637_eth_data = { static struct at91_usbh_data __initdata csb637_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata csb637_udc_data = { diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index 0b7d327..bb6b434 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c @@ -50,6 +50,7 @@ static void __init ek_init_early(void) static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC8, .enable_pin = AT91_PIN_PC14, }; @@ -82,7 +83,7 @@ static void __init ek_add_device_nand(void) ek_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index 3788fa5..d302ca3 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c @@ -67,6 +67,8 @@ static struct macb_platform_data __initdata eb9200_eth_data = { static struct at91_usbh_data __initdata eb9200_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata eb9200_udc_data = { @@ -75,15 +77,18 @@ static struct at91_udc_data __initdata eb9200_udc_data = { }; static struct at91_cf_data __initdata eb9200_cf_data = { + .irq_pin = -EINVAL, .det_pin = AT91_PIN_PB0, + .vcc_pin = -EINVAL, .rst_pin = AT91_PIN_PC5, - // .irq_pin = ... not connected - // .vcc_pin = ... always powered }; static struct at91_mmc_data __initdata eb9200_mmc_data = { .slot_b = 0, .wire4 = 1, + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; static struct i2c_board_info __initdata eb9200_i2c_devices[] = { diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index af7622e..69966ce 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c @@ -71,11 +71,16 @@ static struct macb_platform_data __initdata ecb_at91eth_data = { static struct at91_usbh_data __initdata ecb_at91usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_mmc_data __initdata ecb_at91mmc_data = { .slot_b = 0, .wire4 = 1, + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 8e75867..07ef35b 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c @@ -54,6 +54,8 @@ static struct macb_platform_data __initdata eco920_eth_data = { static struct at91_usbh_data __initdata eco920_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata eco920_udc_data = { @@ -64,6 +66,9 @@ static struct at91_udc_data __initdata eco920_udc_data = { static struct at91_mmc_data __initdata eco920_mmc_data = { .slot_b = 0, .wire4 = 0, + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; static struct physmap_flash_data eco920_flash_data = { diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index 4c3f65d..eec02cd 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c @@ -52,12 +52,14 @@ static void __init flexibity_init_early(void) /* USB Host port */ static struct at91_usbh_data __initdata flexibity_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* USB Device port */ static struct at91_udc_data __initdata flexibity_udc_data = { .vbus_pin = AT91_PIN_PC5, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; /* SPI devices */ @@ -76,6 +78,7 @@ static struct at91_mmc_data __initdata flexibity_mmc_data = { .wire4 = 1, .det_pin = AT91_PIN_PC9, .wp_pin = AT91_PIN_PC4, + .vcc_pin = -EINVAL, }; /* LEDs */ diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index de8e096..caf017f 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c @@ -106,6 +106,8 @@ static void __init foxg20_init_early(void) */ static struct at91_usbh_data __initdata foxg20_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -113,7 +115,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = { */ static struct at91_udc_data __initdata foxg20_udc_data = { .vbus_pin = AT91_PIN_PC6, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -147,6 +149,9 @@ static struct macb_platform_data __initdata foxg20_macb_data = { static struct at91_mmc_data __initdata foxg20_mmc_data = { .slot_b = 1, .wire4 = 1, + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index 51c82f1..230e719 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c @@ -80,6 +80,8 @@ static void __init gsia18s_init_early(void) */ static struct at91_usbh_data __initdata usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -87,7 +89,7 @@ static struct at91_usbh_data __initdata usbh_data = { */ static struct at91_udc_data __initdata udc_data = { .vbus_pin = AT91_PIN_PA22, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; /* @@ -530,6 +532,7 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = { static struct at91_cf_data __initdata gsia18s_cf1_data = { .irq_pin = AT91_PIN_PA27, .det_pin = AT91_PIN_PB30, + .vcc_pin = -EINVAL, .rst_pin = AT91_PIN_PB31, .chipselect = 5, .flags = AT91_CF_TRUE_IDE, diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index 9628a3d..efde1b2 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c @@ -68,6 +68,8 @@ static struct macb_platform_data __initdata kafa_eth_data = { static struct at91_usbh_data __initdata kafa_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata kafa_udc_data = { diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index 5ba5244..d75a4a2 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c @@ -76,6 +76,8 @@ static struct macb_platform_data __initdata kb9202_eth_data = { static struct at91_usbh_data __initdata kb9202_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata kb9202_udc_data = { @@ -87,6 +89,8 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = { .det_pin = AT91_PIN_PB2, .slot_b = 0, .wire4 = 1, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; static struct mtd_partition __initdata kb9202_nand_partition[] = { @@ -100,7 +104,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = { static struct atmel_nand_data __initdata kb9202_nand_data = { .ale = 22, .cle = 21, - // .det_pin = ... not there + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC29, .enable_pin = AT91_PIN_PC28, .parts = kb9202_nand_partition, diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index 56e7aee..3f8617c 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c @@ -72,6 +72,7 @@ static void __init neocore926_init_early(void) static struct at91_usbh_data __initdata neocore926_usbh_data = { .ports = 2, .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -79,7 +80,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = { */ static struct at91_udc_data __initdata neocore926_udc_data = { .vbus_pin = AT91_PIN_PA25, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -149,6 +150,7 @@ static struct at91_mmc_data __initdata neocore926_mmc_data = { .wire4 = 1, .det_pin = AT91_PIN_PE18, .wp_pin = AT91_PIN_PE19, + .vcc_pin = -EINVAL, }; @@ -190,6 +192,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = { .enable_pin = AT91_PIN_PD15, .parts = neocore926_nand_partition, .num_parts = ARRAY_SIZE(neocore926_nand_partition), + .det_pin = -EINVAL, }; static struct sam9_smc_config __initdata neocore926_nand_smc_config = { @@ -213,7 +216,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = { static void __init neocore926_add_device_nand(void) { /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &neocore926_nand_smc_config); + sam9_smc_configure(0, 3, &neocore926_nand_smc_config); at91_add_device_nand(&neocore926_nand_data); } diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index c545a3e..b4a12fc 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c @@ -96,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { static void __init add_device_pcontrol(void) { /* configure chip-select 4 (IO compatible to 8051 X4 ) */ - sam9_smc_configure(4, &pcontrol_smc_config[0]); + sam9_smc_configure(0, 4, &pcontrol_smc_config[0]); /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ - sam9_smc_configure(7, &pcontrol_smc_config[1]); + sam9_smc_configure(0, 7, &pcontrol_smc_config[1]); } @@ -107,6 +107,8 @@ static void __init add_device_pcontrol(void) */ static struct at91_usbh_data __initdata usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index dc18759..ab024fa 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c @@ -67,6 +67,8 @@ static struct macb_platform_data __initdata picotux200_eth_data = { static struct at91_usbh_data __initdata picotux200_usbh_data = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_mmc_data __initdata picotux200_mmc_data = { @@ -74,6 +76,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = { .slot_b = 0, .wire4 = 1, .wp_pin = AT91_PIN_PA17, + .vcc_pin = -EINVAL, }; #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 5444d6a..e029d22 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c @@ -77,6 +77,8 @@ static void __init ek_init_early(void) */ static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -84,7 +86,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { */ static struct at91_udc_data __initdata ek_udc_data = { .vbus_pin = AT91_PIN_PC5, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; /* @@ -133,7 +135,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, -// .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, .parts = ek_nand_partition, @@ -161,7 +163,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { static void __init ek_add_device_nand(void) { /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -172,9 +174,9 @@ static void __init ek_add_device_nand(void) static struct at91_mmc_data __initdata ek_mmc_data = { .slot_b = 0, .wire4 = 1, -// .det_pin = ... not connected -// .wp_pin = ... not connected -// .vcc_pin = ... not connected + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; /* @@ -251,7 +253,7 @@ static void __init ek_board_init(void) /* LEDs */ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); /* shutdown controller, wakeup button (5 msec low) */ - at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW + at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW | AT91_SHDW_RTTWKEN); } diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index 022d0ce..782f379 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c @@ -72,6 +72,8 @@ static struct macb_platform_data __initdata dk_eth_data = { static struct at91_usbh_data __initdata dk_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata dk_udc_data = { @@ -80,16 +82,19 @@ static struct at91_udc_data __initdata dk_udc_data = { }; static struct at91_cf_data __initdata dk_cf_data = { + .irq_pin = -EINVAL, .det_pin = AT91_PIN_PB0, + .vcc_pin = -EINVAL, .rst_pin = AT91_PIN_PC5, - // .irq_pin = ... not connected - // .vcc_pin = ... always powered }; #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD static struct at91_mmc_data __initdata dk_mmc_data = { .slot_b = 0, .wire4 = 1, + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; #endif @@ -143,7 +148,7 @@ static struct atmel_nand_data __initdata dk_nand_data = { .cle = 21, .det_pin = AT91_PIN_PB1, .rdy_pin = AT91_PIN_PC2, - // .enable_pin = ... not there + .enable_pin = -EINVAL, .parts = dk_nand_partition, .num_parts = ARRAY_SIZE(dk_nand_partition), }; diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index ed27586..ef7c12a 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c @@ -72,6 +72,8 @@ static struct macb_platform_data __initdata ek_eth_data = { static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata ek_udc_data = { @@ -85,6 +87,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { .slot_b = 0, .wire4 = 1, .wp_pin = AT91_PIN_PA17, + .vcc_pin = -EINVAL, }; #endif diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c index ed3b21f..af0750f 100644 --- a/arch/arm/mach-at91/board-rsi-ews.c +++ b/arch/arm/mach-at91/board-rsi-ews.c @@ -70,6 +70,8 @@ static struct macb_platform_data rsi_ews_eth_data __initdata = { */ static struct at91_usbh_data rsi_ews_usbh_data __initdata = { .ports = 1, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index 3e4b50e..84bce58 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c @@ -72,6 +72,8 @@ static void __init ek_init_early(void) */ static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -79,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { */ static struct at91_udc_data __initdata ek_udc_data = { .vbus_pin = AT91_PIN_PC5, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -134,7 +136,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, -// .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, .parts = ek_nand_partition, @@ -162,7 +164,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { static void __init ek_add_device_nand(void) { /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -176,7 +178,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { .wire4 = 1, .det_pin = AT91_PIN_PC8, .wp_pin = AT91_PIN_PC4, -// .vcc_pin = ... not connected + .vcc_pin = -EINVAL, }; static void __init ek_board_init(void) diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 13478e1..be8233b 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c @@ -75,6 +75,8 @@ static void __init ek_init_early(void) */ static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { */ static struct at91_udc_data __initdata ek_udc_data = { .vbus_pin = AT91_PIN_PC5, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -176,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, -// .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, .parts = ek_nand_partition, @@ -211,7 +213,7 @@ static void __init ek_add_device_nand(void) ek_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -223,9 +225,9 @@ static void __init ek_add_device_nand(void) static struct at91_mmc_data __initdata ek_mmc_data = { .slot_b = 1, .wire4 = 1, -// .det_pin = ... not connected -// .wp_pin = ... not connected -// .vcc_pin = ... not connected + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index b005b73..4089507 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -131,7 +131,7 @@ static struct sam9_smc_config __initdata dm9000_smc_config = { static void __init ek_add_device_dm9000(void) { /* Configure chip-select 2 (DM9000) */ - sam9_smc_configure(2, &dm9000_smc_config); + sam9_smc_configure(0, 2, &dm9000_smc_config); /* Configure Reset signal as output */ at91_set_gpio_output(AT91_PIN_PC10, 0); @@ -151,6 +151,8 @@ static void __init ek_add_device_dm9000(void) {} */ static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; @@ -159,7 +161,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { */ static struct at91_udc_data __initdata ek_udc_data = { .vbus_pin = AT91_PIN_PB29, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -182,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { static struct atmel_nand_data __initdata ek_nand_data = { .ale = 22, .cle = 21, -// .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC15, .enable_pin = AT91_PIN_PC14, .parts = ek_nand_partition, @@ -217,7 +219,7 @@ static void __init ek_add_device_nand(void) ek_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -345,6 +347,9 @@ static struct spi_board_info ek_spi_devices[] = { */ static struct at91_mmc_data __initdata ek_mmc_data = { .wire4 = 1, + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; #endif /* CONFIG_SPI_ATMEL_* */ diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index fcf194e..29f6605 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -74,6 +74,7 @@ static void __init ek_init_early(void) static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -81,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { */ static struct at91_udc_data __initdata ek_udc_data = { .vbus_pin = AT91_PIN_PA25, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -151,7 +152,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { .wire4 = 1, .det_pin = AT91_PIN_PE18, .wp_pin = AT91_PIN_PE19, -// .vcc_pin = ... not connected + .vcc_pin = -EINVAL, }; @@ -183,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, -// .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PA22, .enable_pin = AT91_PIN_PD15, .parts = ek_nand_partition, @@ -218,7 +219,7 @@ static void __init ek_add_device_nand(void) ek_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -353,6 +354,7 @@ static void __init ek_add_device_buttons(void) {} * reset_pin is not connected: NRST */ static struct ac97c_platform_data ek_ac97_data = { + .reset_pin = -EINVAL, }; diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 78d27cc..843d628 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -86,6 +86,8 @@ static void __init ek_init_early(void) */ static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -93,7 +95,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { */ static struct at91_udc_data __initdata ek_udc_data = { .vbus_pin = AT91_PIN_PC5, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; @@ -163,6 +165,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { .cle = 22, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, + .det_pin = -EINVAL, .parts = ek_nand_partition, .num_parts = ARRAY_SIZE(ek_nand_partition), }; @@ -195,7 +198,7 @@ static void __init ek_add_device_nand(void) ek_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -210,6 +213,7 @@ static struct mci_platform_data __initdata ek_mmc_data = { .slot[1] = { .bus_width = 4, .detect_pin = AT91_PIN_PC9, + .wp_pin = -EINVAL, }, }; @@ -218,6 +222,8 @@ static struct at91_mmc_data __initdata ek_mmc_data = { .slot_b = 1, /* Only one slot so use slot B */ .wire4 = 1, .det_pin = AT91_PIN_PC9, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; #endif @@ -227,6 +233,7 @@ static void __init ek_add_device_mmc(void) if (ek_have_2mmc()) { ek_mmc_data.slot[0].bus_width = 4; ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; + ek_mmc_data.slot[0].wp_pin = -1; } at91_add_device_mci(0, &ek_mmc_data); #else diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 4e1ee9d..ea0d1b9 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -69,6 +69,7 @@ static void __init ek_init_early(void) static struct at91_usbh_data __initdata ek_usbh_hs_data = { .ports = 2, .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; @@ -100,6 +101,7 @@ static struct mci_platform_data __initdata mci0_data = { .slot[0] = { .bus_width = 4, .detect_pin = AT91_PIN_PD10, + .wp_pin = -EINVAL, }, }; @@ -143,6 +145,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { .cle = 22, .rdy_pin = AT91_PIN_PC8, .enable_pin = AT91_PIN_PC14, + .det_pin = -EINVAL, .parts = ek_nand_partition, .num_parts = ARRAY_SIZE(ek_nand_partition), }; @@ -175,7 +178,7 @@ static void __init ek_add_device_nand(void) ek_nand_smc_config.mode |= AT91_SMC_DBW_8; /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -330,6 +333,7 @@ static void __init ek_add_device_buttons(void) {} * reset_pin is not connected: NRST */ static struct ac97c_platform_data ek_ac97_data = { + .reset_pin = -EINVAL, }; diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index b2b7482..c1366d0 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -67,8 +67,8 @@ static struct usba_platform_data __initdata ek_usba_udc_data = { static struct at91_mmc_data __initdata ek_mmc_data = { .wire4 = 1, .det_pin = AT91_PIN_PA15, -// .wp_pin = ... not connected -// .vcc_pin = ... not connected + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; @@ -91,7 +91,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, -// .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PD17, .enable_pin = AT91_PIN_PB6, .parts = ek_nand_partition, @@ -119,7 +119,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { static void __init ek_add_device_nand(void) { /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &ek_nand_smc_config); + sam9_smc_configure(0, 3, &ek_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -204,6 +204,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data; * reset_pin is not connected: NRST */ static struct ac97c_platform_data ek_ac97_data = { + .reset_pin = -EINVAL, }; diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index fbec934..4770db0 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c @@ -57,15 +57,19 @@ static void __init snapper9260_init_early(void) static struct at91_usbh_data __initdata snapper9260_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; static struct at91_udc_data __initdata snapper9260_udc_data = { .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), .vbus_active_low = 1, .vbus_polled = 1, + .pullup_pin = -EINVAL, }; static struct macb_platform_data snapper9260_macb_data = { + .phy_irq_pin = -EINVAL, .is_rmii = 1, }; @@ -104,6 +108,8 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = { .parts = snapper9260_nand_partitions, .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), .bus_width_16 = 0, + .enable_pin = -EINVAL, + .det_pin = -EINVAL, }; static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { @@ -149,7 +155,7 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = { static void __init snapper9260_add_device_nand(void) { at91_set_A_periph(AT91_PIN_PC14, 0); - sam9_smc_configure(3, &snapper9260_nand_smc_config); + sam9_smc_configure(0, 3, &snapper9260_nand_smc_config); at91_add_device_nand(&snapper9260_nand_data); } diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index 7c06c07..72eb3b4 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c @@ -85,6 +85,7 @@ static struct atmel_nand_data __initdata nand_data = { .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, .bus_width_16 = 0, + .det_pin = -EINVAL, }; static struct sam9_smc_config __initdata nand_smc_config = { @@ -108,7 +109,7 @@ static struct sam9_smc_config __initdata nand_smc_config = { static void __init add_device_nand(void) { /* configure chip-select 3 (NAND) */ - sam9_smc_configure(3, &nand_smc_config); + sam9_smc_configure(0, 3, &nand_smc_config); at91_add_device_nand(&nand_data); } @@ -122,12 +123,17 @@ static void __init add_device_nand(void) static struct mci_platform_data __initdata mmc_data = { .slot[0] = { .bus_width = 4, + .detect_pin = -1, + .wp_pin = -1, }, }; #else static struct at91_mmc_data __initdata mmc_data = { .slot_b = 0, .wire4 = 1, + .det_pin = -EINVAL, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; #endif @@ -137,6 +143,8 @@ static struct at91_mmc_data __initdata mmc_data = { */ static struct at91_usbh_data __initdata usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; @@ -145,12 +153,12 @@ static struct at91_usbh_data __initdata usbh_data = { */ static struct at91_udc_data __initdata portuxg20_udc_data = { .vbus_pin = AT91_PIN_PC7, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; static struct at91_udc_data __initdata stamp9g20evb_udc_data = { .vbus_pin = AT91_PIN_PA22, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 3d84233..26c36fc 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c @@ -66,6 +66,8 @@ static void __init ek_init_early(void) */ static struct at91_usbh_data __initdata ek_usbh_data = { .ports = 2, + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -73,7 +75,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { */ static struct at91_udc_data __initdata ek_udc_data = { .vbus_pin = AT91_PIN_PB11, - .pullup_pin = 0, /* pull-up driven by UDC */ + .pullup_pin = -EINVAL, /* pull-up driven by UDC */ }; static void __init ek_add_device_udc(void) @@ -193,7 +195,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, -// .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PA22, .enable_pin = AT91_PIN_PD15, .parts = ek_nand_partition, @@ -245,9 +247,9 @@ static void __init ek_add_device_nand(void) /* configure chip-select 3 (NAND) */ if (machine_is_usb_a9g20()) - sam9_smc_configure(3, &usb_a9g20_nand_smc_config); + sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config); else - sam9_smc_configure(3, &usb_a9260_nand_smc_config); + sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config); at91_add_device_nand(&ek_nand_data); } @@ -344,7 +346,7 @@ static void __init ek_board_init(void) /* I2C */ at91_add_device_i2c(NULL, 0); /* shutdown controller, wakeup button (5 msec low) */ - at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) + at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW | AT91_SHDW_RTTWKEN); } diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index 2c40a21..bbd553e 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -120,6 +120,8 @@ static struct macb_platform_data __initdata yl9200_eth_data = { */ static struct at91_usbh_data __initdata yl9200_usbh_data = { .ports = 1, /* PQFP version of AT91RM9200 */ + .vbus_pin = {-EINVAL, -EINVAL}, + .overcurrent_pin= {-EINVAL, -EINVAL}, }; /* @@ -137,8 +139,9 @@ static struct at91_udc_data __initdata yl9200_udc_data = { */ static struct at91_mmc_data __initdata yl9200_mmc_data = { .det_pin = AT91_PIN_PB9, - // .wp_pin = ... not connected .wire4 = 1, + .wp_pin = -EINVAL, + .vcc_pin = -EINVAL, }; /* @@ -175,7 +178,7 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = { static struct atmel_nand_data __initdata yl9200_nand_data = { .ale = 6, .cle = 7, - // .det_pin = ... not connected + .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ .parts = yl9200_nand_partition, diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 938b34f..4866b81 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -29,6 +29,7 @@ extern void __init at91_aic_init(unsigned int priority[]); /* Timer */ struct sys_timer; extern struct sys_timer at91rm9200_timer; +extern void at91sam926x_ioremap_pit(u32 addr); extern struct sys_timer at91sam926x_timer; extern struct sys_timer at91x40_timer; @@ -57,7 +58,10 @@ extern void at91_irq_suspend(void); extern void at91_irq_resume(void); /* reset */ -extern void at91sam9_alt_reset(void); +extern void at91sam9_alt_restart(char, const char *); + +/* shutdown */ +extern void at91_ioremap_shdwc(u32 base_addr); /* GPIO */ #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ @@ -65,11 +69,9 @@ extern void at91sam9_alt_reset(void); struct at91_gpio_bank { unsigned short id; /* peripheral ID */ - unsigned long offset; /* offset from system peripheral base */ - struct clk *clock; /* associated clock */ + unsigned long regbase; /* offset from system peripheral base */ }; extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); extern void __init at91_gpio_irq_setup(void); -extern void (*at91_arch_reset)(void); extern int at91_extern_irq; diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 224e9e2..74d6783 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -29,8 +29,9 @@ struct at91_gpio_chip { struct gpio_chip chip; struct at91_gpio_chip *next; /* Bank sharing same clock */ - struct at91_gpio_bank *bank; /* Bank definition */ + int id; /* ID of register bank */ void __iomem *regbase; /* Base of register bank */ + struct clk *clock; /* associated clock */ }; #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) @@ -58,18 +59,17 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip, } static struct at91_gpio_chip gpio_chip[] = { - AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), - AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), - AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), - AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), - AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), + AT91_GPIO_CHIP("pioA", 0x00, 32), + AT91_GPIO_CHIP("pioB", 0x20, 32), + AT91_GPIO_CHIP("pioC", 0x40, 32), + AT91_GPIO_CHIP("pioD", 0x60, 32), + AT91_GPIO_CHIP("pioE", 0x80, 32), }; static int gpio_banks; static inline void __iomem *pin_to_controller(unsigned pin) { - pin -= PIN_BASE; pin /= 32; if (likely(pin < gpio_banks)) return gpio_chip[pin].regbase; @@ -79,7 +79,6 @@ static inline void __iomem *pin_to_controller(unsigned pin) static inline unsigned pin_to_mask(unsigned pin) { - pin -= PIN_BASE; return 1 << (pin % 32); } @@ -274,8 +273,9 @@ static u32 backups[MAX_GPIO_BANKS]; static int gpio_irq_set_wake(struct irq_data *d, unsigned state) { - unsigned mask = pin_to_mask(d->irq); - unsigned bank = (d->irq - PIN_BASE) / 32; + unsigned pin = irq_to_gpio(d->irq); + unsigned mask = pin_to_mask(pin); + unsigned bank = pin / 32; if (unlikely(bank >= MAX_GPIO_BANKS)) return -EINVAL; @@ -285,7 +285,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state) else wakeups[bank] &= ~mask; - irq_set_irq_wake(gpio_chip[bank].bank->id, state); + irq_set_irq_wake(gpio_chip[bank].id, state); return 0; } @@ -302,7 +302,7 @@ void at91_gpio_suspend(void) __raw_writel(wakeups[i], pio + PIO_IER); if (!wakeups[i]) - clk_disable(gpio_chip[i].bank->clock); + clk_disable(gpio_chip[i].clock); else { #ifdef CONFIG_PM_DEBUG printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); @@ -319,7 +319,7 @@ void at91_gpio_resume(void) void __iomem *pio = gpio_chip[i].regbase; if (!wakeups[i]) - clk_enable(gpio_chip[i].bank->clock); + clk_enable(gpio_chip[i].clock); __raw_writel(wakeups[i], pio + PIO_IDR); __raw_writel(backups[i], pio + PIO_IER); @@ -344,8 +344,9 @@ void at91_gpio_resume(void) static void gpio_irq_mask(struct irq_data *d) { - void __iomem *pio = pin_to_controller(d->irq); - unsigned mask = pin_to_mask(d->irq); + unsigned pin = irq_to_gpio(d->irq); + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); if (pio) __raw_writel(mask, pio + PIO_IDR); @@ -353,8 +354,9 @@ static void gpio_irq_mask(struct irq_data *d) static void gpio_irq_unmask(struct irq_data *d) { - void __iomem *pio = pin_to_controller(d->irq); - unsigned mask = pin_to_mask(d->irq); + unsigned pin = irq_to_gpio(d->irq); + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); if (pio) __raw_writel(mask, pio + PIO_IER); @@ -382,7 +384,7 @@ static struct irq_chip gpio_irqchip = { static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) { - unsigned pin; + unsigned irq_pin; struct irq_data *idata = irq_desc_get_irq_data(desc); struct irq_chip *chip = irq_data_get_irq_chip(idata); struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); @@ -405,12 +407,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) continue; } - pin = at91_gpio->chip.base; + irq_pin = gpio_to_irq(at91_gpio->chip.base); while (isr) { if (isr & 1) - generic_handle_irq(pin); - pin++; + generic_handle_irq(irq_pin); + irq_pin++; isr >>= 1; } } @@ -438,7 +440,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused) seq_printf(s, "%i:\t", j); for (bank = 0; bank < gpio_banks; bank++) { - unsigned pin = PIN_BASE + (32 * bank) + j; + unsigned pin = (32 * bank) + j; void __iomem *pio = pin_to_controller(pin); unsigned mask = pin_to_mask(pin); @@ -491,27 +493,28 @@ static struct lock_class_key gpio_lock_class; */ void __init at91_gpio_irq_setup(void) { - unsigned pioc, pin; + unsigned pioc, irq = gpio_to_irq(0); struct at91_gpio_chip *this, *prev; - for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; + for (pioc = 0, this = gpio_chip, prev = NULL; pioc++ < gpio_banks; prev = this, this++) { - unsigned id = this->bank->id; + unsigned id = this->id; unsigned i; __raw_writel(~0, this->regbase + PIO_IDR); - for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { - irq_set_lockdep_class(pin, &gpio_lock_class); + for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32; + i++, irq++) { + irq_set_lockdep_class(irq, &gpio_lock_class); /* * Can use the "simple" and not "edge" handler since it's * shorter, and the AIC handles interrupts sanely. */ - irq_set_chip_and_handler(pin, &gpio_irqchip, + irq_set_chip_and_handler(irq, &gpio_irqchip, handle_simple_irq); - set_irq_flags(pin, IRQF_VALID); + set_irq_flags(irq, IRQF_VALID); } /* The toplevel handler handles one bank of GPIOs, except @@ -524,7 +527,7 @@ void __init at91_gpio_irq_setup(void) irq_set_chip_data(id, this); irq_set_chained_handler(id, gpio_irq_handler); } - pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); + pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks); } /* gpiolib support */ @@ -612,16 +615,26 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) for (i = 0; i < nr_banks; i++) { at91_gpio = &gpio_chip[i]; - at91_gpio->bank = &data[i]; - at91_gpio->chip.base = PIN_BASE + i * 32; - at91_gpio->regbase = at91_gpio->bank->offset + - (void __iomem *)AT91_VA_BASE_SYS; + at91_gpio->id = data[i].id; + at91_gpio->chip.base = i * 32; + + at91_gpio->regbase = ioremap(data[i].regbase, 512); + if (!at91_gpio->regbase) { + pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i); + continue; + } + + at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label); + if (!at91_gpio->clock) { + pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i); + continue; + } /* enable PIO controller's clock */ - clk_enable(at91_gpio->bank->clock); + clk_enable(at91_gpio->clock); /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ - if (last && last->bank->id == at91_gpio->bank->id) + if (last && last->id == at91_gpio->id) last->next = at91_gpio; last = at91_gpio; diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h index 0356679..3045781 100644 --- a/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/arch/arm/mach-at91/include/mach/at91_aic.h @@ -16,7 +16,19 @@ #ifndef AT91_AIC_H #define AT91_AIC_H -#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ +#ifndef __ASSEMBLY__ +extern void __iomem *at91_aic_base; + +#define at91_aic_read(field) \ + __raw_readl(at91_aic_base + field) + +#define at91_aic_write(field, value) \ + __raw_writel(value, at91_aic_base + field); +#else +.extern at91_aic_base +#endif + +#define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ #define AT91_AIC_SRCTYPE_LOW (0 << 5) @@ -24,30 +36,30 @@ #define AT91_AIC_SRCTYPE_HIGH (2 << 5) #define AT91_AIC_SRCTYPE_RISING (3 << 5) -#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ -#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ -#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ -#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ +#define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ +#define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ +#define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ +#define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ -#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ -#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ -#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ +#define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ +#define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ +#define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ -#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ -#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ -#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ -#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ -#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ -#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ -#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ +#define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ +#define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ +#define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ +#define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ +#define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ +#define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ +#define AT91_AIC_DCR 0x138 /* Debug Control Register */ #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ -#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ -#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ -#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ +#define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ +#define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ +#define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ #endif diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h index dbfe455a..2aa0c5e 100644 --- a/arch/arm/mach-at91/include/mach/at91_dbgu.h +++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h @@ -19,7 +19,7 @@ #define dbgu_readl(dbgu, field) \ __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) -#ifdef AT91_DBGU +#if !defined(CONFIG_ARCH_AT91X40) #define AT91_DBGU_CR (0x00) /* Control Register */ #define AT91_DBGU_MR (0x04) /* Mode Register */ #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h index 974d0bd..d1f80ad 100644 --- a/arch/arm/mach-at91/include/mach/at91_pit.h +++ b/arch/arm/mach-at91/include/mach/at91_pit.h @@ -16,16 +16,16 @@ #ifndef AT91_PIT_H #define AT91_PIT_H -#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ +#define AT91_PIT_MR 0x00 /* Mode Register */ #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ #define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ #define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ -#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ +#define AT91_PIT_SR 0x04 /* Status Register */ #define AT91_PIT_PITS (1 << 0) /* Timer Status */ -#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ -#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ +#define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */ +#define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */ #define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ #define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h index e56f470..da1945e 100644 --- a/arch/arm/mach-at91/include/mach/at91_rtc.h +++ b/arch/arm/mach-at91/include/mach/at91_rtc.h @@ -16,7 +16,7 @@ #ifndef AT91_RTC_H #define AT91_RTC_H -#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ +#define AT91_RTC_CR 0x00 /* Control Register */ #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ @@ -29,44 +29,44 @@ #define AT91_RTC_CALEVSEL_MONTH (1 << 16) #define AT91_RTC_CALEVSEL_YEAR (2 << 16) -#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ +#define AT91_RTC_MR 0x04 /* Mode Register */ #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ -#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ +#define AT91_RTC_TIMR 0x08 /* Time Register */ #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ -#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ +#define AT91_RTC_CALR 0x0c /* Calendar Register */ #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ #define AT91_RTC_DAY (7 << 21) /* Current Day */ #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ -#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ +#define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */ #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ -#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ +#define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */ #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ -#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ +#define AT91_RTC_SR 0x18 /* Status Register */ #define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ #define AT91_RTC_SECEV (1 << 2) /* Second Event */ #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ -#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ -#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ -#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ -#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ +#define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */ +#define AT91_RTC_IER 0x20 /* Interrupt Enable Register */ +#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ +#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ -#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ +#define AT91_RTC_VER 0x2c /* Valid Entry Register */ #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ #define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ #define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h index c4ce07e..1d4fe82 100644 --- a/arch/arm/mach-at91/include/mach/at91_shdwc.h +++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h @@ -16,11 +16,21 @@ #ifndef AT91_SHDWC_H #define AT91_SHDWC_H -#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ +#ifndef __ASSEMBLY__ +extern void __iomem *at91_shdwc_base; + +#define at91_shdwc_read(field) \ + __raw_readl(at91_shdwc_base + field) + +#define at91_shdwc_write(field, value) \ + __raw_writel(value, at91_shdwc_base + field); +#endif + +#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */ #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ -#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ +#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */ #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ #define AT91_SHDW_WKMODE0_NONE 0 #define AT91_SHDW_WKMODE0_HIGH 1 @@ -30,7 +40,7 @@ #define AT91_SHDW_CPTWK0_(x) ((x) << 4) #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ -#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ +#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */ #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h index c5df1e8..4c0e2f6 100644 --- a/arch/arm/mach-at91/include/mach/at91cap9.h +++ b/arch/arm/mach-at91/include/mach/at91cap9.h @@ -79,29 +79,28 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_ECC (0xffffe200 - AT91_BASE_SYS) #define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) -#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) -#define AT91_DMA (0xffffec00 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ (0xfffffd50 - AT91_BASE_SYS) : \ (0xfffffd60 - AT91_BASE_SYS)) +#define AT91CAP9_BASE_ECC 0xffffe200 +#define AT91CAP9_BASE_DMA 0xffffec00 +#define AT91CAP9_BASE_SMC 0xffffe800 +#define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1 +#define AT91CAP9_BASE_PIOA 0xfffff200 +#define AT91CAP9_BASE_PIOB 0xfffff400 +#define AT91CAP9_BASE_PIOC 0xfffff600 +#define AT91CAP9_BASE_PIOD 0xfffff800 +#define AT91CAP9_BASE_SHDWC 0xfffffd10 +#define AT91CAP9_BASE_RTT 0xfffffd20 +#define AT91CAP9_BASE_PIT 0xfffffd30 +#define AT91CAP9_BASE_WDT 0xfffffd40 + #define AT91_USART0 AT91CAP9_BASE_US0 #define AT91_USART1 AT91CAP9_BASE_US1 #define AT91_USART2 AT91CAP9_BASE_US2 diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h index e4037b5..bacb511 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h @@ -79,17 +79,17 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */ -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */ -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */ -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */ #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ +#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */ +#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */ +#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ +#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ +#define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */ +#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ + #define AT91_USART0 AT91RM9200_BASE_US0 #define AT91_USART1 AT91RM9200_BASE_US1 #define AT91_USART2 AT91RM9200_BASE_US2 diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index 9a79116..f937c47 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h @@ -80,24 +80,23 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) +#define AT91SAM9260_BASE_ECC 0xffffe800 +#define AT91SAM9260_BASE_SMC 0xffffec00 +#define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0 +#define AT91SAM9260_BASE_PIOA 0xfffff400 +#define AT91SAM9260_BASE_PIOB 0xfffff600 +#define AT91SAM9260_BASE_PIOC 0xfffff800 +#define AT91SAM9260_BASE_SHDWC 0xfffffd10 +#define AT91SAM9260_BASE_RTT 0xfffffd20 +#define AT91SAM9260_BASE_PIT 0xfffffd30 +#define AT91SAM9260_BASE_WDT 0xfffffd40 + #define AT91_USART0 AT91SAM9260_BASE_US0 #define AT91_USART1 AT91SAM9260_BASE_US1 #define AT91_USART2 AT91SAM9260_BASE_US2 diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h index ce59620..175604e 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h @@ -66,21 +66,21 @@ * System Peripherals (offset from AT91_BASE_SYS) */ #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) +#define AT91SAM9261_BASE_SMC 0xffffec00 +#define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0 +#define AT91SAM9261_BASE_PIOA 0xfffff400 +#define AT91SAM9261_BASE_PIOB 0xfffff600 +#define AT91SAM9261_BASE_PIOC 0xfffff800 +#define AT91SAM9261_BASE_SHDWC 0xfffffd10 +#define AT91SAM9261_BASE_RTT 0xfffffd20 +#define AT91SAM9261_BASE_PIT 0xfffffd30 +#define AT91SAM9261_BASE_WDT 0xfffffd40 + #define AT91_USART0 AT91SAM9261_BASE_US0 #define AT91_USART1 AT91SAM9261_BASE_US1 #define AT91_USART2 AT91SAM9261_BASE_US2 diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h index f1b9296..80c9150 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9263.h +++ b/arch/arm/mach-at91/include/mach/at91sam9263.h @@ -74,30 +74,29 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS) #define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) -#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS) -#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS) #define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) -#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) +#define AT91SAM9263_BASE_ECC0 0xffffe000 +#define AT91SAM9263_BASE_SMC0 0xffffe400 +#define AT91SAM9263_BASE_ECC1 0xffffe600 +#define AT91SAM9263_BASE_SMC1 0xffffea00 +#define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1 +#define AT91SAM9263_BASE_PIOA 0xfffff200 +#define AT91SAM9263_BASE_PIOB 0xfffff400 +#define AT91SAM9263_BASE_PIOC 0xfffff600 +#define AT91SAM9263_BASE_PIOD 0xfffff800 +#define AT91SAM9263_BASE_PIOE 0xfffffa00 +#define AT91SAM9263_BASE_SHDWC 0xfffffd10 +#define AT91SAM9263_BASE_RTT0 0xfffffd20 +#define AT91SAM9263_BASE_PIT 0xfffffd30 +#define AT91SAM9263_BASE_WDT 0xfffffd40 +#define AT91SAM9263_BASE_RTT1 0xfffffd50 + #define AT91_USART0 AT91SAM9263_BASE_US0 #define AT91_USART1 AT91SAM9263_BASE_US1 #define AT91_USART2 AT91SAM9263_BASE_US2 diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h index 57de620..eb18a70 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h @@ -16,7 +16,9 @@ #ifndef AT91SAM9_SMC_H #define AT91SAM9_SMC_H -#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ +#include <mach/cpu.h> + +#define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */ #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ #define AT91_SMC_NWESETUP_(x) ((x) << 0) #define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ @@ -26,7 +28,7 @@ #define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ #define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) -#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ +#define AT91_SMC_PULSE 0x04 /* Pulse Register for CS n */ #define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ #define AT91_SMC_NWEPULSE_(x) ((x) << 0) #define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ @@ -36,13 +38,13 @@ #define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ #define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) -#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ +#define AT91_SMC_CYCLE 0x08 /* Cycle Register for CS n */ #define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ #define AT91_SMC_NWECYCLE_(x) ((x) << 0) #define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ #define AT91_SMC_NRDCYCLE_(x) ((x) << 16) -#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ +#define AT91_SMC_MODE 0x0c /* Mode Register for CS n */ #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ #define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ @@ -66,11 +68,4 @@ #define AT91_SMC_PS_16 (2 << 28) #define AT91_SMC_PS_32 (3 << 28) -#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ -#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#endif - #endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index 406bb64..f0c23c9 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h @@ -86,27 +86,27 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_ECC (0xffffe200 - AT91_BASE_SYS) #define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) -#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_DMA (0xffffec00 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) + +#define AT91SAM9G45_BASE_ECC 0xffffe200 +#define AT91SAM9G45_BASE_DMA 0xffffec00 +#define AT91SAM9G45_BASE_SMC 0xffffe800 +#define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1 +#define AT91SAM9G45_BASE_PIOA 0xfffff200 +#define AT91SAM9G45_BASE_PIOB 0xfffff400 +#define AT91SAM9G45_BASE_PIOC 0xfffff600 +#define AT91SAM9G45_BASE_PIOD 0xfffff800 +#define AT91SAM9G45_BASE_PIOE 0xfffffa00 +#define AT91SAM9G45_BASE_SHDWC 0xfffffd10 +#define AT91SAM9G45_BASE_RTT 0xfffffd20 +#define AT91SAM9G45_BASE_PIT 0xfffffd30 +#define AT91SAM9G45_BASE_WDT 0xfffffd40 +#define AT91SAM9G45_BASE_RTC 0xfffffdb0 #define AT91_USART0 AT91SAM9G45_BASE_US0 #define AT91_USART1 AT91SAM9G45_BASE_US1 diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index 1aabacd..2bb359e 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h @@ -69,27 +69,26 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) + +#define AT91SAM9RL_BASE_DMA 0xffffe600 +#define AT91SAM9RL_BASE_ECC 0xffffe800 +#define AT91SAM9RL_BASE_SMC 0xffffec00 +#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 +#define AT91SAM9RL_BASE_PIOA 0xfffff400 +#define AT91SAM9RL_BASE_PIOB 0xfffff600 +#define AT91SAM9RL_BASE_PIOC 0xfffff800 +#define AT91SAM9RL_BASE_PIOD 0xfffffa00 +#define AT91SAM9RL_BASE_SHDWC 0xfffffd10 +#define AT91SAM9RL_BASE_RTT 0xfffffd20 +#define AT91SAM9RL_BASE_PIT 0xfffffd30 +#define AT91SAM9RL_BASE_WDT 0xfffffd40 +#define AT91SAM9RL_BASE_RTC 0xfffffe00 #define AT91_USART0 AT91SAM9RL_BASE_US0 #define AT91_USART1 AT91SAM9RL_BASE_US1 diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h index a152ff8..a57829f 100644 --- a/arch/arm/mach-at91/include/mach/at91x40.h +++ b/arch/arm/mach-at91/include/mach/at91x40.h @@ -40,7 +40,6 @@ #define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ #define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ #define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ /* * The AT91x40 series doesn't have a debug unit like the other AT91 parts. diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index e209a299..d0b377b 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -44,10 +44,10 @@ /* USB Device */ struct at91_udc_data { - u8 vbus_pin; /* high == host powering us */ + int vbus_pin; /* high == host powering us */ u8 vbus_active_low; /* vbus polarity */ u8 vbus_polled; /* Use polling, not interrupt */ - u8 pullup_pin; /* active == D+ pulled up */ + int pullup_pin; /* active == D+ pulled up */ u8 pullup_active_low; /* true == pullup_pin is active low */ }; extern void __init at91_add_device_udc(struct at91_udc_data *data); @@ -57,10 +57,10 @@ extern void __init at91_add_device_usba(struct usba_platform_data *data); /* Compact Flash */ struct at91_cf_data { - u8 irq_pin; /* I/O IRQ */ - u8 det_pin; /* Card detect */ - u8 vcc_pin; /* power switching */ - u8 rst_pin; /* card reset */ + int irq_pin; /* I/O IRQ */ + int det_pin; /* Card detect */ + int vcc_pin; /* power switching */ + int rst_pin; /* card reset */ u8 chipselect; /* EBI Chip Select number */ u8 flags; #define AT91_CF_TRUE_IDE 0x01 @@ -71,11 +71,11 @@ extern void __init at91_add_device_cf(struct at91_cf_data *data); /* MMC / SD */ /* at91_mci platform config */ struct at91_mmc_data { - u8 det_pin; /* card detect IRQ */ + int det_pin; /* card detect IRQ */ unsigned slot_b:1; /* uses Slot B */ unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ - u8 wp_pin; /* (SD) writeprotect detect */ - u8 vcc_pin; /* power switching (high == on) */ + int wp_pin; /* (SD) writeprotect detect */ + int vcc_pin; /* power switching (high == on) */ }; extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); @@ -87,10 +87,10 @@ extern void __init at91_add_device_eth(struct macb_platform_data *data); /* USB Host */ struct at91_usbh_data { u8 ports; /* number of ports on root hub */ - u8 vbus_pin[2]; /* port power-control pin */ + int vbus_pin[2]; /* port power-control pin */ u8 vbus_pin_inverted; u8 overcurrent_supported; - u8 overcurrent_pin[2]; + int overcurrent_pin[2]; u8 overcurrent_status[2]; u8 overcurrent_changed[2]; }; @@ -100,9 +100,9 @@ extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); /* NAND / SmartMedia */ struct atmel_nand_data { - u8 enable_pin; /* chip enable */ - u8 det_pin; /* card detect */ - u8 rdy_pin; /* ready/busy */ + int enable_pin; /* chip enable */ + int det_pin; /* card detect */ + int rdy_pin; /* ready/busy */ u8 rdy_pin_active_low; /* rdy_pin value is inverted */ u8 ale; /* address line number connected to ALE */ u8 cle; /* address line number connected to CLE */ diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S index 0ed8648..c6bb9e2 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/mach-at91/include/mach/debug-macro.S @@ -14,9 +14,15 @@ #include <mach/hardware.h> #include <mach/at91_dbgu.h> +#if defined(CONFIG_AT91_DEBUG_LL_DBGU0) +#define AT91_DBGU AT91_BASE_DBGU0 +#else +#define AT91_DBGU AT91_BASE_DBGU1 +#endif + .macro addruart, rp, rv, tmp - ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) - ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) + ldr \rp, =AT91_DBGU @ System peripherals (phys address) + ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S index 7ab68f9..423eea0 100644 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/arch/arm/mach-at91/include/mach/entry-macro.S @@ -17,16 +17,17 @@ .endm .macro get_irqnr_preamble, base, tmp - ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral + ldr \base, =at91_aic_base @ base virtual address of AIC peripheral + ldr \base, [\base] .endm .macro arch_ret_to_user, tmp1, tmp2 .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) - ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number - teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt - streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. + ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) + ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number + teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt + streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. .endm diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 2b9a1f5..e3fd225 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h @@ -16,177 +16,175 @@ #include <linux/kernel.h> #include <asm/irq.h> -#define PIN_BASE NR_AIC_IRQS - #define MAX_GPIO_BANKS 5 -#define NR_BUILTIN_GPIO (PIN_BASE + (MAX_GPIO_BANKS * 32)) +#define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32) /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ -#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) -#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) -#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) -#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) -#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) -#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) -#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) -#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) -#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) -#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) -#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) -#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) -#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) -#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) -#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) -#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) -#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) -#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) -#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) -#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) -#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) -#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) -#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) -#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) -#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) -#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) -#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) -#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) -#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) -#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) -#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) -#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) - -#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) -#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) -#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) -#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) -#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) -#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) -#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) -#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) -#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) -#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) -#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) -#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) -#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) -#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) -#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) -#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) -#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) -#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) -#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) -#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) -#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) -#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) -#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) -#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) -#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) -#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) -#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) -#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) -#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) -#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) -#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) -#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) - -#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) -#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) -#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) -#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) -#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) -#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) -#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) -#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) -#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) -#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) -#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) -#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) -#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) -#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) -#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) -#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) -#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) -#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) -#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) -#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) -#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) -#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) -#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) -#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) -#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) -#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) -#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) -#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) -#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) -#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) -#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) -#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) - -#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) -#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) -#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) -#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) -#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) -#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) -#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) -#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) -#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) -#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) -#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) -#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) -#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) -#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) -#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) -#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) -#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) -#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) -#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) -#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) -#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) -#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) -#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) -#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) -#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) -#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) -#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) -#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) -#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) -#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) -#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) -#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) - -#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) -#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) -#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) -#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) -#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) -#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) -#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) -#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) -#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) -#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) -#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) -#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) -#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) -#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) -#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) -#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) -#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) -#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) -#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) -#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) -#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) -#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) -#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) -#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) -#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) -#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) -#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) -#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) -#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) -#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) -#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) -#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) +#define AT91_PIN_PA0 (0x00 + 0) +#define AT91_PIN_PA1 (0x00 + 1) +#define AT91_PIN_PA2 (0x00 + 2) +#define AT91_PIN_PA3 (0x00 + 3) +#define AT91_PIN_PA4 (0x00 + 4) +#define AT91_PIN_PA5 (0x00 + 5) +#define AT91_PIN_PA6 (0x00 + 6) +#define AT91_PIN_PA7 (0x00 + 7) +#define AT91_PIN_PA8 (0x00 + 8) +#define AT91_PIN_PA9 (0x00 + 9) +#define AT91_PIN_PA10 (0x00 + 10) +#define AT91_PIN_PA11 (0x00 + 11) +#define AT91_PIN_PA12 (0x00 + 12) +#define AT91_PIN_PA13 (0x00 + 13) +#define AT91_PIN_PA14 (0x00 + 14) +#define AT91_PIN_PA15 (0x00 + 15) +#define AT91_PIN_PA16 (0x00 + 16) +#define AT91_PIN_PA17 (0x00 + 17) +#define AT91_PIN_PA18 (0x00 + 18) +#define AT91_PIN_PA19 (0x00 + 19) +#define AT91_PIN_PA20 (0x00 + 20) +#define AT91_PIN_PA21 (0x00 + 21) +#define AT91_PIN_PA22 (0x00 + 22) +#define AT91_PIN_PA23 (0x00 + 23) +#define AT91_PIN_PA24 (0x00 + 24) +#define AT91_PIN_PA25 (0x00 + 25) +#define AT91_PIN_PA26 (0x00 + 26) +#define AT91_PIN_PA27 (0x00 + 27) +#define AT91_PIN_PA28 (0x00 + 28) +#define AT91_PIN_PA29 (0x00 + 29) +#define AT91_PIN_PA30 (0x00 + 30) +#define AT91_PIN_PA31 (0x00 + 31) + +#define AT91_PIN_PB0 (0x20 + 0) +#define AT91_PIN_PB1 (0x20 + 1) +#define AT91_PIN_PB2 (0x20 + 2) +#define AT91_PIN_PB3 (0x20 + 3) +#define AT91_PIN_PB4 (0x20 + 4) +#define AT91_PIN_PB5 (0x20 + 5) +#define AT91_PIN_PB6 (0x20 + 6) +#define AT91_PIN_PB7 (0x20 + 7) +#define AT91_PIN_PB8 (0x20 + 8) +#define AT91_PIN_PB9 (0x20 + 9) +#define AT91_PIN_PB10 (0x20 + 10) +#define AT91_PIN_PB11 (0x20 + 11) +#define AT91_PIN_PB12 (0x20 + 12) +#define AT91_PIN_PB13 (0x20 + 13) +#define AT91_PIN_PB14 (0x20 + 14) +#define AT91_PIN_PB15 (0x20 + 15) +#define AT91_PIN_PB16 (0x20 + 16) +#define AT91_PIN_PB17 (0x20 + 17) +#define AT91_PIN_PB18 (0x20 + 18) +#define AT91_PIN_PB19 (0x20 + 19) +#define AT91_PIN_PB20 (0x20 + 20) +#define AT91_PIN_PB21 (0x20 + 21) +#define AT91_PIN_PB22 (0x20 + 22) +#define AT91_PIN_PB23 (0x20 + 23) +#define AT91_PIN_PB24 (0x20 + 24) +#define AT91_PIN_PB25 (0x20 + 25) +#define AT91_PIN_PB26 (0x20 + 26) +#define AT91_PIN_PB27 (0x20 + 27) +#define AT91_PIN_PB28 (0x20 + 28) +#define AT91_PIN_PB29 (0x20 + 29) +#define AT91_PIN_PB30 (0x20 + 30) +#define AT91_PIN_PB31 (0x20 + 31) + +#define AT91_PIN_PC0 (0x40 + 0) +#define AT91_PIN_PC1 (0x40 + 1) +#define AT91_PIN_PC2 (0x40 + 2) +#define AT91_PIN_PC3 (0x40 + 3) +#define AT91_PIN_PC4 (0x40 + 4) +#define AT91_PIN_PC5 (0x40 + 5) +#define AT91_PIN_PC6 (0x40 + 6) +#define AT91_PIN_PC7 (0x40 + 7) +#define AT91_PIN_PC8 (0x40 + 8) +#define AT91_PIN_PC9 (0x40 + 9) +#define AT91_PIN_PC10 (0x40 + 10) +#define AT91_PIN_PC11 (0x40 + 11) +#define AT91_PIN_PC12 (0x40 + 12) +#define AT91_PIN_PC13 (0x40 + 13) +#define AT91_PIN_PC14 (0x40 + 14) +#define AT91_PIN_PC15 (0x40 + 15) +#define AT91_PIN_PC16 (0x40 + 16) +#define AT91_PIN_PC17 (0x40 + 17) +#define AT91_PIN_PC18 (0x40 + 18) +#define AT91_PIN_PC19 (0x40 + 19) +#define AT91_PIN_PC20 (0x40 + 20) +#define AT91_PIN_PC21 (0x40 + 21) +#define AT91_PIN_PC22 (0x40 + 22) +#define AT91_PIN_PC23 (0x40 + 23) +#define AT91_PIN_PC24 (0x40 + 24) +#define AT91_PIN_PC25 (0x40 + 25) +#define AT91_PIN_PC26 (0x40 + 26) +#define AT91_PIN_PC27 (0x40 + 27) +#define AT91_PIN_PC28 (0x40 + 28) +#define AT91_PIN_PC29 (0x40 + 29) +#define AT91_PIN_PC30 (0x40 + 30) +#define AT91_PIN_PC31 (0x40 + 31) + +#define AT91_PIN_PD0 (0x60 + 0) +#define AT91_PIN_PD1 (0x60 + 1) +#define AT91_PIN_PD2 (0x60 + 2) +#define AT91_PIN_PD3 (0x60 + 3) +#define AT91_PIN_PD4 (0x60 + 4) +#define AT91_PIN_PD5 (0x60 + 5) +#define AT91_PIN_PD6 (0x60 + 6) +#define AT91_PIN_PD7 (0x60 + 7) +#define AT91_PIN_PD8 (0x60 + 8) +#define AT91_PIN_PD9 (0x60 + 9) +#define AT91_PIN_PD10 (0x60 + 10) +#define AT91_PIN_PD11 (0x60 + 11) +#define AT91_PIN_PD12 (0x60 + 12) +#define AT91_PIN_PD13 (0x60 + 13) +#define AT91_PIN_PD14 (0x60 + 14) +#define AT91_PIN_PD15 (0x60 + 15) +#define AT91_PIN_PD16 (0x60 + 16) +#define AT91_PIN_PD17 (0x60 + 17) +#define AT91_PIN_PD18 (0x60 + 18) +#define AT91_PIN_PD19 (0x60 + 19) +#define AT91_PIN_PD20 (0x60 + 20) +#define AT91_PIN_PD21 (0x60 + 21) +#define AT91_PIN_PD22 (0x60 + 22) +#define AT91_PIN_PD23 (0x60 + 23) +#define AT91_PIN_PD24 (0x60 + 24) +#define AT91_PIN_PD25 (0x60 + 25) +#define AT91_PIN_PD26 (0x60 + 26) +#define AT91_PIN_PD27 (0x60 + 27) +#define AT91_PIN_PD28 (0x60 + 28) +#define AT91_PIN_PD29 (0x60 + 29) +#define AT91_PIN_PD30 (0x60 + 30) +#define AT91_PIN_PD31 (0x60 + 31) + +#define AT91_PIN_PE0 (0x80 + 0) +#define AT91_PIN_PE1 (0x80 + 1) +#define AT91_PIN_PE2 (0x80 + 2) +#define AT91_PIN_PE3 (0x80 + 3) +#define AT91_PIN_PE4 (0x80 + 4) +#define AT91_PIN_PE5 (0x80 + 5) +#define AT91_PIN_PE6 (0x80 + 6) +#define AT91_PIN_PE7 (0x80 + 7) +#define AT91_PIN_PE8 (0x80 + 8) +#define AT91_PIN_PE9 (0x80 + 9) +#define AT91_PIN_PE10 (0x80 + 10) +#define AT91_PIN_PE11 (0x80 + 11) +#define AT91_PIN_PE12 (0x80 + 12) +#define AT91_PIN_PE13 (0x80 + 13) +#define AT91_PIN_PE14 (0x80 + 14) +#define AT91_PIN_PE15 (0x80 + 15) +#define AT91_PIN_PE16 (0x80 + 16) +#define AT91_PIN_PE17 (0x80 + 17) +#define AT91_PIN_PE18 (0x80 + 18) +#define AT91_PIN_PE19 (0x80 + 19) +#define AT91_PIN_PE20 (0x80 + 20) +#define AT91_PIN_PE21 (0x80 + 21) +#define AT91_PIN_PE22 (0x80 + 22) +#define AT91_PIN_PE23 (0x80 + 23) +#define AT91_PIN_PE24 (0x80 + 24) +#define AT91_PIN_PE25 (0x80 + 25) +#define AT91_PIN_PE26 (0x80 + 26) +#define AT91_PIN_PE27 (0x80 + 27) +#define AT91_PIN_PE28 (0x80 + 28) +#define AT91_PIN_PE29 (0x80 + 29) +#define AT91_PIN_PE30 (0x80 + 30) +#define AT91_PIN_PE31 (0x80 + 31) #ifndef __ASSEMBLY__ /* setup setup routines, called from board init or driver probe() */ @@ -215,8 +213,8 @@ extern void at91_gpio_resume(void); #include <asm/errno.h> -#define gpio_to_irq(gpio) (gpio) -#define irq_to_gpio(irq) (irq) +#define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS) +#define irq_to_gpio(irq) (irq - NR_AIC_IRQS) #endif /* __ASSEMBLY__ */ diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 483478d..2d0e4e9 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -16,6 +16,12 @@ #include <asm/sizes.h> +/* DBGU base */ +/* rm9200, 9260/9g20, 9261/9g10, 9rl */ +#define AT91_BASE_DBGU0 0xfffff200 +/* 9263, 9g45, cap9 */ +#define AT91_BASE_DBGU1 0xffffee00 + #if defined(CONFIG_ARCH_AT91RM9200) #include <mach/at91rm9200.h> #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) @@ -52,6 +58,12 @@ #endif /* + * On all at91 have the Advanced Interrupt Controller starts at address + * 0xfffff000 + */ +#define AT91_AIC 0xfffff000 + +/* * Peripheral identifiers/interrupts. */ #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h index 4298e78..4ca09ef 100644 --- a/arch/arm/mach-at91/include/mach/io.h +++ b/arch/arm/mach-at91/include/mach/io.h @@ -30,14 +30,6 @@ #ifndef __ASSEMBLY__ -#ifndef CONFIG_ARCH_AT91X40 -#define __arch_ioremap at91_ioremap -#define __arch_iounmap at91_iounmap -#endif - -void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type); -void at91_iounmap(volatile void __iomem *addr); - static inline unsigned int at91_sys_read(unsigned int reg_offset) { void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h index 36bd55f..ac8b7df 100644 --- a/arch/arm/mach-at91/include/mach/irqs.h +++ b/arch/arm/mach-at91/include/mach/irqs.h @@ -31,7 +31,7 @@ * Acknowledge interrupt with AIC after interrupt has been handled. * (by kernel/irq.c) */ -#define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0) +#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) /* diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h index 36af14b..cbd64f3 100644 --- a/arch/arm/mach-at91/include/mach/system.h +++ b/arch/arm/mach-at91/include/mach/system.h @@ -47,13 +47,4 @@ static inline void arch_idle(void) #endif } -void (*at91_arch_reset)(void); - -static inline void arch_reset(char mode, const char *cmd) -{ - /* call the CPU-specific reset function */ - if (at91_arch_reset) - (at91_arch_reset)(); -} - #endif diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h index 85820ad..5e917a6 100644 --- a/arch/arm/mach-at91/include/mach/timex.h +++ b/arch/arm/mach-at91/include/mach/timex.h @@ -23,70 +23,15 @@ #include <mach/hardware.h> -#if defined(CONFIG_ARCH_AT91RM9200) +#ifdef CONFIG_ARCH_AT91X40 -#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) - -#elif defined(CONFIG_ARCH_AT91SAM9260) - -#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260) -#define AT91SAM9_MASTER_CLOCK 90000000 -#else -#define AT91SAM9_MASTER_CLOCK 99300000 -#endif - -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9261) - -#define AT91SAM9_MASTER_CLOCK 99300000 -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9G10) - -#define AT91SAM9_MASTER_CLOCK 133000000 -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9263) - -#if defined(CONFIG_MACH_USB_A9263) -#define AT91SAM9_MASTER_CLOCK 90000000 -#else -#define AT91SAM9_MASTER_CLOCK 99959500 -#endif - -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9RL) - -#define AT91SAM9_MASTER_CLOCK 100000000 -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9G20) +#define AT91X40_MASTER_CLOCK 40000000 +#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) -#if defined(CONFIG_MACH_USB_A9G20) -#define AT91SAM9_MASTER_CLOCK 133000000 #else -#define AT91SAM9_MASTER_CLOCK 132096000 -#endif - -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9G45) -#define AT91SAM9_MASTER_CLOCK 133333333 -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91CAP9) - -#define AT91CAP9_MASTER_CLOCK 100000000 -#define CLOCK_TICK_RATE (AT91CAP9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91X40) - -#define AT91X40_MASTER_CLOCK 40000000 -#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) +#define CLOCK_TICK_RATE 12345678 #endif -#endif +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h index 18bdcde..0234fd9 100644 --- a/arch/arm/mach-at91/include/mach/uncompress.h +++ b/arch/arm/mach-at91/include/mach/uncompress.h @@ -24,8 +24,10 @@ #include <linux/io.h> #include <linux/atmel_serial.h> -#if defined(CONFIG_AT91_EARLY_DBGU) -#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) +#if defined(CONFIG_AT91_EARLY_DBGU0) +#define UART_OFFSET AT91_BASE_DBGU0 +#elif defined(CONFIG_AT91_EARLY_DBGU1) +#define UART_OFFSET AT91_BASE_DBGU1 #elif defined(CONFIG_AT91_EARLY_USART0) #define UART_OFFSET AT91_USART0 #elif defined(CONFIG_AT91_EARLY_USART1) diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h deleted file mode 100644 index 8e4a1bd..0000000 --- a/arch/arm/mach-at91/include/mach/vmalloc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/vmalloc.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#include <mach/hardware.h> - -#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) - -#endif diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 9665265e..be6b639 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -33,17 +33,18 @@ #include <asm/mach/irq.h> #include <asm/mach/map.h> +void __iomem *at91_aic_base; static void at91_aic_mask_irq(struct irq_data *d) { /* Disable interrupt on AIC */ - at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); + at91_aic_write(AT91_AIC_IDCR, 1 << d->irq); } static void at91_aic_unmask_irq(struct irq_data *d) { /* Enable interrupt on AIC */ - at91_sys_write(AT91_AIC_IECR, 1 << d->irq); + at91_aic_write(AT91_AIC_IECR, 1 << d->irq); } unsigned int at91_extern_irq; @@ -77,8 +78,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) return -EINVAL; } - smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; - at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); + smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; + at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype); return 0; } @@ -102,15 +103,15 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value) void at91_irq_suspend(void) { - backups = at91_sys_read(AT91_AIC_IMR); - at91_sys_write(AT91_AIC_IDCR, backups); - at91_sys_write(AT91_AIC_IECR, wakeups); + backups = at91_aic_read(AT91_AIC_IMR); + at91_aic_write(AT91_AIC_IDCR, backups); + at91_aic_write(AT91_AIC_IECR, wakeups); } void at91_irq_resume(void) { - at91_sys_write(AT91_AIC_IDCR, wakeups); - at91_sys_write(AT91_AIC_IECR, backups); + at91_aic_write(AT91_AIC_IDCR, wakeups); + at91_aic_write(AT91_AIC_IECR, backups); } #else @@ -133,34 +134,39 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) { unsigned int i; + at91_aic_base = ioremap(AT91_AIC, 512); + + if (!at91_aic_base) + panic("Impossible to ioremap AT91_AIC\n"); + /* * The IVR is used by macro get_irqnr_and_base to read and verify. * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. */ for (i = 0; i < NR_AIC_IRQS; i++) { /* Put irq number in Source Vector Register: */ - at91_sys_write(AT91_AIC_SVR(i), i); + at91_aic_write(AT91_AIC_SVR(i), i); /* Active Low interrupt, with the specified priority */ - at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); + at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ if (i < 8) - at91_sys_write(AT91_AIC_EOICR, 0); + at91_aic_write(AT91_AIC_EOICR, 0); } /* * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU */ - at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS); + at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS); /* No debugging in AIC: Debug (Protect) Control Register */ - at91_sys_write(AT91_AIC_DCR, 0); + at91_aic_write(AT91_AIC_DCR, 0); /* Disable and clear all interrupts initially */ - at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF); - at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF); + at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF); + at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); } diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 7046158..62ad955 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -34,7 +34,7 @@ /* * Show the reason for the previous system reset. */ -#if defined(AT91_SHDWC) +#if defined(AT91_RSTC) #include <mach/at91_rstc.h> #include <mach/at91_shdwc.h> @@ -58,8 +58,11 @@ static void __init show_reset_status(void) char *reason, *r2 = reset; u32 reset_type, wake_type; + if (!at91_shdwc_base) + return; + reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; - wake_type = at91_sys_read(AT91_SHDW_SR); + wake_type = at91_shdwc_read(AT91_SHDW_SR); switch (reset_type) { case AT91_RSTC_RSTTYP_GENERAL: @@ -215,7 +218,7 @@ static int at91_pm_enter(suspend_state_t state) | (1 << AT91_ID_FIQ) | (1 << AT91_ID_SYS) | (at91_extern_irq)) - & at91_sys_read(AT91_AIC_IMR), + & at91_aic_read(AT91_AIC_IMR), state); switch (state) { @@ -283,7 +286,7 @@ static int at91_pm_enter(suspend_state_t state) } pr_debug("AT91: PM - wakeup %08x\n", - at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); + at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR)); error: target_state = PM_SUSPEND_ON; diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index 5eab6aa6..8294783 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -10,38 +10,58 @@ #include <linux/module.h> #include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> #include <mach/at91sam9_smc.h> #include "sam9_smc.h" -void __init sam9_smc_configure(int cs, struct sam9_smc_config* config) + +#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10)) + +static void __iomem *smc_base_addr[2]; + +static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config) { + /* Setup register */ - at91_sys_write(AT91_SMC_SETUP(cs), - AT91_SMC_NWESETUP_(config->nwe_setup) - | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) - | AT91_SMC_NRDSETUP_(config->nrd_setup) - | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup) - ); + __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup) + | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) + | AT91_SMC_NRDSETUP_(config->nrd_setup) + | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup), + base + AT91_SMC_SETUP); /* Pulse register */ - at91_sys_write(AT91_SMC_PULSE(cs), - AT91_SMC_NWEPULSE_(config->nwe_pulse) - | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) - | AT91_SMC_NRDPULSE_(config->nrd_pulse) - | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse) - ); + __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse) + | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) + | AT91_SMC_NRDPULSE_(config->nrd_pulse) + | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse), + base + AT91_SMC_PULSE); /* Cycle register */ - at91_sys_write(AT91_SMC_CYCLE(cs), - AT91_SMC_NWECYCLE_(config->write_cycle) - | AT91_SMC_NRDCYCLE_(config->read_cycle) - ); + __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle) + | AT91_SMC_NRDCYCLE_(config->read_cycle), + base + AT91_SMC_CYCLE); /* Mode register */ - at91_sys_write(AT91_SMC_MODE(cs), - config->mode - | AT91_SMC_TDF_(config->tdf_cycles) - ); + __raw_writel(config->mode + | AT91_SMC_TDF_(config->tdf_cycles), + base + AT91_SMC_MODE); +} + +void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config) +{ + sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); +} + +void __init at91sam9_ioremap_smc(int id, u32 addr) +{ + if (id > 1) { + pr_warn("%s: id > 2\n", __func__); + return; + } + smc_base_addr[id] = ioremap(addr, 512); + if (!smc_base_addr[id]) + pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr); } diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h index bf72cfb..039c5ce 100644 --- a/arch/arm/mach-at91/sam9_smc.h +++ b/arch/arm/mach-at91/sam9_smc.h @@ -30,4 +30,5 @@ struct sam9_smc_config { u8 tdf_cycles:4; }; -extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config); +extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config); +extern void __init at91sam9_ioremap_smc(int id, u32 addr); diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index aa64294..8bdcc3c 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -8,6 +8,7 @@ #include <linux/module.h> #include <linux/io.h> #include <linux/mm.h> +#include <linux/pm.h> #include <asm/mach/map.h> @@ -15,6 +16,7 @@ #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/at91_pmc.h> +#include <mach/at91_shdwc.h> #include "soc.h" #include "generic.h" @@ -73,27 +75,6 @@ static struct map_desc at91_io_desc __initdata = { .type = MT_DEVICE, }; -void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type) -{ - if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1)) - return (void __iomem *)AT91_IO_P2V(p); - - return __arm_ioremap_caller(p, size, type, __builtin_return_address(0)); -} -EXPORT_SYMBOL(at91_ioremap); - -void at91_iounmap(volatile void __iomem *addr) -{ - unsigned long virt = (unsigned long)addr; - - if (virt >= VMALLOC_START && virt < VMALLOC_END) - __iounmap(addr); -} -EXPORT_SYMBOL(at91_iounmap); - -#define AT91_DBGU0 0xfffff200 -#define AT91_DBGU1 0xffffee00 - static void __init soc_detect(u32 dbgu_base) { u32 cidr, socid; @@ -266,9 +247,9 @@ void __init at91_map_io(void) at91_soc_initdata.type = AT91_SOC_NONE; at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - soc_detect(AT91_DBGU0); + soc_detect(AT91_BASE_DBGU0); if (!at91_soc_is_detected()) - soc_detect(AT91_DBGU1); + soc_detect(AT91_BASE_DBGU1); if (!at91_soc_is_detected()) panic("AT91: Impossible to detect the SOC type"); @@ -285,8 +266,25 @@ void __init at91_map_io(void) at91_boot_soc.map_io(); } +void __iomem *at91_shdwc_base = NULL; + +static void at91sam9_poweroff(void) +{ + at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); +} + +void __init at91_ioremap_shdwc(u32 base_addr) +{ + at91_shdwc_base = ioremap(base_addr, 16); + if (!at91_shdwc_base) + panic("Impossible to ioremap at91_shdwc_base\n"); + pm_power_off = at91sam9_poweroff; +} + void __init at91_initialize(unsigned long main_clock) { + at91_boot_soc.ioremap_registers(); + /* Init clock subsystem */ at91_clock_init(main_clock); diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 21ed881..4588ae6 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h @@ -7,6 +7,7 @@ struct at91_init_soc { unsigned int *default_irq_priority; void (*map_io)(void); + void (*ioremap_registers)(void); void (*register_clocks)(void); void (*init)(void); }; diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c index 31a1435..9e5e755 100644 --- a/arch/arm/mach-bcmring/arch.c +++ b/arch/arm/mach-bcmring/arch.c @@ -49,7 +49,29 @@ HW_DECLARE_SPINLOCK(gpio) #endif /* sysctl */ -int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ +static int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ + +static void bcmring_restart(char mode, const char *cmd) +{ + printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); + + if (mode == 'h') { + /* Reboot configured in proc entry */ + if (bcmring_arch_warm_reboot) { + printk("warm reset\n"); + /* Issue Warm reset (do not reset ethernet switch, keep alive) */ + chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM); + } else { + /* Force reset of everything */ + printk("force reset\n"); + chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); + } + } else { + /* Force reset of everything */ + printk("force reset\n"); + chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); + } +} static struct ctl_table_header *bcmring_sysctl_header; @@ -173,4 +195,5 @@ MACHINE_START(BCMRING, "BCMRING") .init_irq = bcmring_init_irq, .timer = &bcmring_timer, .init_machine = bcmring_init_machine + .restart = bcmring_restart, MACHINE_END diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c index f4d4d6d..1a1a27d 100644 --- a/arch/arm/mach-bcmring/dma.c +++ b/arch/arm/mach-bcmring/dma.c @@ -1615,7 +1615,7 @@ DMA_MemType_t dma_mem_type(void *addr) { unsigned long addrVal = (unsigned long)addr; - if (addrVal >= VMALLOC_END) { + if (addrVal >= CONSISTENT_BASE) { /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */ /* dma_alloc_xxx pages are physically and virtually contiguous */ diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h index 38b3706..cb78250 100644 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ b/arch/arm/mach-bcmring/include/mach/system.h @@ -20,35 +20,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/csp/chipcHw_inline.h> - -extern int bcmring_arch_warm_reboot; - static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); - - if (mode == 'h') { - /* Reboot configured in proc entry */ - if (bcmring_arch_warm_reboot) { - printk("warm reset\n"); - /* Issue Warm reset (do not reset ethernet switch, keep alive) */ - chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM); - } else { - /* Force reset of everything */ - printk("force reset\n"); - chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); - } - } else { - /* Force reset of everything */ - printk("force reset\n"); - chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT); - } -} - #endif diff --git a/arch/arm/mach-bcmring/include/mach/vmalloc.h b/arch/arm/mach-bcmring/include/mach/vmalloc.h deleted file mode 100644 index 7397bd7..0000000 --- a/arch/arm/mach-bcmring/include/mach/vmalloc.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * Move VMALLOC_END to 0xf0000000 so that the vm space can range from - * 0xe0000000 to 0xefffffff. This gives us 256 MB of vm space and handles - * larger physical memory designs better. - */ -#define VMALLOC_END 0xf0000000UL diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile index 4a19731..f2f0256 100644 --- a/arch/arm/mach-clps711x/Makefile +++ b/arch/arm/mach-clps711x/Makefile @@ -4,7 +4,7 @@ # Object file lists. -obj-y := irq.o mm.o time.o +obj-y := common.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c index 0276091..3fb79a1 100644 --- a/arch/arm/mach-clps711x/autcpu12.c +++ b/arch/arm/mach-clps711x/autcpu12.c @@ -68,5 +68,6 @@ MACHINE_START(AUTCPU12, "autronix autcpu12") .map_io = autcpu12_map_io, .init_irq = clps711x_init_irq, .timer = &clps711x_timer, + .restart = clps711x_restart, MACHINE_END diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c index 25b3bfd..c314f49 100644 --- a/arch/arm/mach-clps711x/cdb89712.c +++ b/arch/arm/mach-clps711x/cdb89712.c @@ -59,4 +59,5 @@ MACHINE_START(CDB89712, "Cirrus-CDB89712") .map_io = cdb89712_map_io, .init_irq = clps711x_init_irq, .timer = &clps711x_timer, + .restart = clps711x_restart, MACHINE_END diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c index 1df9ec6..a70147e 100644 --- a/arch/arm/mach-clps711x/ceiva.c +++ b/arch/arm/mach-clps711x/ceiva.c @@ -60,4 +60,5 @@ MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame") .map_io = ceiva_map_io, .init_irq = clps711x_init_irq, .timer = &clps711x_timer, + .restart = clps711x_restart, MACHINE_END diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c index 80496c0..dbc7842 100644 --- a/arch/arm/mach-clps711x/clep7312.c +++ b/arch/arm/mach-clps711x/clep7312.c @@ -41,5 +41,6 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312") .map_io = clps711x_map_io, .init_irq = clps711x_init_irq, .timer = &clps711x_timer, + .restart = clps711x_restart, MACHINE_END diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/common.c index c2eceee..ab1711b 100644 --- a/arch/arm/mach-clps711x/irq.c +++ b/arch/arm/mach-clps711x/common.c @@ -1,7 +1,9 @@ /* - * linux/arch/arm/mach-clps711x/irq.c + * linux/arch/arm/mach-clps711x/core.c * - * Copyright (C) 2000 Deep Blue Solutions Ltd. + * Core support for the CLPS711x-based machines. + * + * Copyright (C) 2001,2011 Deep Blue Solutions Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,16 +19,42 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include <linux/kernel.h> +#include <linux/mm.h> #include <linux/init.h> -#include <linux/list.h> +#include <linux/interrupt.h> #include <linux/io.h> +#include <linux/irq.h> +#include <linux/sched.h> +#include <linux/timex.h> -#include <asm/mach/irq.h> +#include <asm/sizes.h> #include <mach/hardware.h> #include <asm/irq.h> - +#include <asm/leds.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/mach/map.h> +#include <asm/mach/time.h> #include <asm/hardware/clps7111.h> +/* + * This maps the generic CLPS711x registers + */ +static struct map_desc clps711x_io_desc[] __initdata = { + { + .virtual = CLPS7111_VIRT_BASE, + .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE), + .length = SZ_1M, + .type = MT_DEVICE + } +}; + +void __init clps711x_map_io(void) +{ + iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc)); +} + static void int1_mask(struct irq_data *d) { u32 intmr1; @@ -112,15 +140,15 @@ void __init clps711x_init_irq(void) for (i = 0; i < NR_IRQS; i++) { if (INT1_IRQS & (1 << i)) { - irq_set_chip_and_handler(i, &int1_chip, + irq_set_chip_and_handler(i, &int1_chip, handle_level_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } if (INT2_IRQS & (1 << i)) { irq_set_chip_and_handler(i, &int2_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } + } } /* @@ -141,3 +169,59 @@ void __init clps711x_init_irq(void) clps_writel(0, SYNCIO); clps_writel(0, KBDEOI); } + +/* + * gettimeoffset() returns time since last timer tick, in usecs. + * + * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. + * 'tick' is usecs per jiffy. + */ +static unsigned long clps711x_gettimeoffset(void) +{ + unsigned long hwticks; + hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */ + return (hwticks * (tick_nsec / 1000)) / LATCH; +} + +/* + * IRQ handler for the timer + */ +static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id) +{ + timer_tick(); + return IRQ_HANDLED; +} + +static struct irqaction clps711x_timer_irq = { + .name = "CLPS711x Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = p720t_timer_interrupt, +}; + +static void __init clps711x_timer_init(void) +{ + struct timespec tv; + unsigned int syscon; + + syscon = clps_readl(SYSCON1); + syscon |= SYSCON1_TC2S | SYSCON1_TC2M; + clps_writel(syscon, SYSCON1); + + clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */ + + setup_irq(IRQ_TC2OI, &clps711x_timer_irq); + + tv.tv_nsec = 0; + tv.tv_sec = clps_readl(RTCDR); + do_settimeofday(&tv); +} + +struct sys_timer clps711x_timer = { + .init = clps711x_timer_init, + .offset = clps711x_gettimeoffset, +}; + +void clps711x_restart(char mode, const char *cmd) +{ + soft_restart(0); +} diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h index 2b8b801..fc0f065 100644 --- a/arch/arm/mach-clps711x/common.h +++ b/arch/arm/mach-clps711x/common.h @@ -9,3 +9,4 @@ struct sys_timer; extern void clps711x_map_io(void); extern void clps711x_init_irq(void); extern struct sys_timer clps711x_timer; +extern void clps711x_restart(char mode, const char *cmd); diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c index 9721f61..5fad0b4 100644 --- a/arch/arm/mach-clps711x/edb7211-arch.c +++ b/arch/arm/mach-clps711x/edb7211-arch.c @@ -62,4 +62,5 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)") .reserve = edb7211_reserve, .init_irq = clps711x_init_irq, .timer = &clps711x_timer, + .restart = clps711x_restart, MACHINE_END diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c index d992566..3a3f0b7 100644 --- a/arch/arm/mach-clps711x/fortunet.c +++ b/arch/arm/mach-clps711x/fortunet.c @@ -78,4 +78,5 @@ MACHINE_START(FORTUNET, "ARM-FortuNet") .map_io = clps711x_map_io, .init_irq = clps711x_init_irq, .timer = &clps711x_timer, + .restart = clps711x_restart, MACHINE_END diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h index f916cd7..23d6ef8 100644 --- a/arch/arm/mach-clps711x/include/mach/system.h +++ b/arch/arm/mach-clps711x/include/mach/system.h @@ -32,9 +32,4 @@ static inline void arch_idle(void) mov r0, r0"); } -static inline void arch_reset(char mode, const char *cmd) -{ - cpu_reset(0); -} - #endif diff --git a/arch/arm/mach-clps711x/include/mach/vmalloc.h b/arch/arm/mach-clps711x/include/mach/vmalloc.h deleted file mode 100644 index 467b961..0000000 --- a/arch/arm/mach-clps711x/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-clps711x/include/mach/vmalloc.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xd0000000UL diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c deleted file mode 100644 index 9865921..0000000 --- a/arch/arm/mach-clps711x/mm.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/arch/arm/mach-clps711x/mm.c - * - * Generic MM setup for the CLPS711x-based machines. - * - * Copyright (C) 2001 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/init.h> - -#include <asm/sizes.h> -#include <mach/hardware.h> -#include <asm/pgtable.h> -#include <asm/page.h> -#include <asm/mach/map.h> -#include <asm/hardware/clps7111.h> - -/* - * This maps the generic CLPS711x registers - */ -static struct map_desc clps711x_io_desc[] __initdata = { - { - .virtual = CLPS7111_VIRT_BASE, - .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE), - .length = SZ_1M, - .type = MT_DEVICE - } -}; - -void __init clps711x_map_io(void) -{ - iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc)); -} diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index 6ecea95f..42ee8f3 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c @@ -93,6 +93,7 @@ MACHINE_START(P720T, "ARM-Prospector720T") .map_io = p720t_map_io, .init_irq = clps711x_init_irq, .timer = &clps711x_timer, + .restart = clps711x_restart, MACHINE_END static int p720t_hw_init(void) diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c deleted file mode 100644 index d581ef0..0000000 --- a/arch/arm/mach-clps711x/time.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * linux/arch/arm/mach-clps711x/time.c - * - * Copyright (C) 2001 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/timex.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/sched.h> -#include <linux/io.h> - -#include <mach/hardware.h> -#include <asm/irq.h> -#include <asm/leds.h> -#include <asm/hardware/clps7111.h> - -#include <asm/mach/time.h> - - -/* - * gettimeoffset() returns time since last timer tick, in usecs. - * - * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. - * 'tick' is usecs per jiffy. - */ -static unsigned long clps711x_gettimeoffset(void) -{ - unsigned long hwticks; - hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */ - return (hwticks * (tick_nsec / 1000)) / LATCH; -} - -/* - * IRQ handler for the timer - */ -static irqreturn_t -p720t_timer_interrupt(int irq, void *dev_id) -{ - timer_tick(); - return IRQ_HANDLED; -} - -static struct irqaction clps711x_timer_irq = { - .name = "CLPS711x Timer Tick", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = p720t_timer_interrupt, -}; - -static void __init clps711x_timer_init(void) -{ - struct timespec tv; - unsigned int syscon; - - syscon = clps_readl(SYSCON1); - syscon |= SYSCON1_TC2S | SYSCON1_TC2M; - clps_writel(syscon, SYSCON1); - - clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */ - - setup_irq(IRQ_TC2OI, &clps711x_timer_irq); - - tv.tv_nsec = 0; - tv.tv_sec = clps_readl(RTCDR); - do_settimeofday(&tv); -} - -struct sys_timer clps711x_timer = { - .init = clps711x_timer_init, - .offset = clps711x_gettimeoffset, -}; diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index 55f7b4b..2c5fb4c 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c @@ -26,6 +26,7 @@ #include <linux/mtd/partitions.h> #include <asm/setup.h> #include <asm/mach-types.h> +#include <asm/hardware/gic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -201,5 +202,7 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") .map_io = cns3420_map_io, .init_irq = cns3xxx_init_irq, .timer = &cns3xxx_timer, + .handle_irq = gic_handle_irq, .init_machine = cns3420_init, + .restart = cns3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index fcd2253..4894b8c 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h @@ -22,5 +22,6 @@ static inline void cns3xxx_l2x0_init(void) {} void __init cns3xxx_map_io(void); void __init cns3xxx_init_irq(void); void cns3xxx_power_off(void); +void cns3xxx_restart(char, const char *); #endif /* __CNS3XXX_CORE_H */ diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S index d87bfc3..01c57df 100644 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S @@ -8,8 +8,6 @@ * published by the Free Software Foundation. */ -#include <asm/hardware/entry-macro-gic.S> - .macro disable_fiq .endm diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h index 4f16c9b..9e56b7d 100644 --- a/arch/arm/mach-cns3xxx/include/mach/system.h +++ b/arch/arm/mach-cns3xxx/include/mach/system.h @@ -11,7 +11,6 @@ #ifndef __MACH_SYSTEM_H #define __MACH_SYSTEM_H -#include <linux/io.h> #include <asm/proc-fns.h> static inline void arch_idle(void) @@ -23,6 +22,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -void arch_reset(char mode, const char *cmd); - #endif diff --git a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h deleted file mode 100644 index 1dd231d..0000000 --- a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * Copyright 2000 Russell King. - * Copyright 2003 ARM Limited - * Copyright 2008 Cavium Networks - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, Version 2, as - * published by the Free Software Foundation. - */ - -#define VMALLOC_END 0xd8000000UL diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c index 0c04678..3645808 100644 --- a/arch/arm/mach-cns3xxx/pm.c +++ b/arch/arm/mach-cns3xxx/pm.c @@ -11,9 +11,9 @@ #include <linux/io.h> #include <linux/delay.h> #include <linux/atomic.h> -#include <mach/system.h> #include <mach/cns3xxx.h> #include <mach/pm.h> +#include "core.h" void cns3xxx_pwr_clk_en(unsigned int block) { @@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block) } EXPORT_SYMBOL(cns3xxx_pwr_soft_rst); -void arch_reset(char mode, const char *cmd) +void cns3xxx_restart(char mode, const char *cmd) { /* * To reset, we hit the on-board reset register diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 495e313..2db78bd 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -4,7 +4,7 @@ # # Common objects -obj-y := time.o clock.o serial.o io.o psc.o \ +obj-y := time.o clock.o serial.o psc.o \ dma.o usb.o common.o sram.o aemif.o obj-$(CONFIG_DAVINCI_MUX) += mux.o diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 11c3db9..dc1afe5 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -682,4 +682,5 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") .timer = &davinci_timer, .init_machine = da830_evm_init, .dma_zone_size = SZ_128M, + .restart = da8xx_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 6659a90..f8a682f 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -1411,4 +1411,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") .timer = &davinci_timer, .init_machine = da850_evm_init, .dma_zone_size = SZ_128M, + .restart = da8xx_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index 4e0e707..275341f 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c @@ -357,4 +357,5 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM") .timer = &davinci_timer, .init_machine = dm355_evm_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index ff2d241..e99db28 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c @@ -276,4 +276,5 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard") .timer = &davinci_timer, .init_machine = dm355_leopard_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 46e1f41..346e1de 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -618,5 +618,6 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") .timer = &davinci_timer, .init_machine = dm365_evm_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 0cf8abf..a64b49c 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -719,4 +719,5 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") .timer = &davinci_timer, .init_machine = davinci_evm_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 635bf77..6401755 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -799,6 +799,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") .timer = &davinci_timer, .init_machine = evm_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") @@ -808,5 +809,6 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") .timer = &davinci_timer, .init_machine = evm_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index 3cfff55..672d820 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -573,4 +573,5 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808") .timer = &davinci_timer, .init_machine = mityomapl138_init, .dma_zone_size = SZ_128M, + .restart = da8xx_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index e5f231a..6c4a164 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c @@ -278,4 +278,5 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2") .timer = &davinci_timer, .init_machine = davinci_ntosd2_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index c6701e4..e7c0c7c 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -344,4 +344,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard") .timer = &davinci_timer, .init_machine = omapl138_hawk_init, .dma_zone_size = SZ_128M, + .restart = da8xx_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 5dd4da9..0b136a8 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c @@ -157,4 +157,5 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR") .timer = &davinci_timer, .init_machine = davinci_sffsdr_init, .dma_zone_size = SZ_128M, + .restart = davinci_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c index f69e40a..5f14e30 100644 --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c @@ -283,4 +283,5 @@ MACHINE_START(TNETV107X, "TNETV107X EVM") .timer = &davinci_timer, .init_machine = tnetv107x_evm_board_init, .dma_zone_size = SZ_128M, + .restart = tnetv107x_restart, MACHINE_END diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index 865ffe5..cb9b2e4 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c @@ -97,9 +97,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info) local_flush_tlb_all(); flush_cache_all(); - if (!davinci_soc_info.reset) - davinci_soc_info.reset = davinci_watchdog_reset; - /* * We want to check CPU revision early for cpu_is_xxxx() macros. * IO space mapping must be initialized before we can do that. diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index a6bf5dc..deee5c2 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1201,7 +1201,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = { .gpio_irq = IRQ_DA8XX_GPIO0, .serial_dev = &da8xx_serial_device, .emac_pdata = &da8xx_emac_pdata, - .reset_device = &da8xx_wdt_device, }; void __init da830_init(void) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index b047f87..0ed7fdb 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -1121,7 +1121,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .emac_pdata = &da8xx_emac_pdata, .sram_dma = DA8XX_ARM_RAM_BASE, .sram_len = SZ_8K, - .reset_device = &da8xx_wdt_device, }; void __init da850_init(void) diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 68def71..42dbf3d 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -363,6 +363,11 @@ struct platform_device da8xx_wdt_device = { .resource = da8xx_watchdog_resources, }; +void da8xx_restart(char mode, const char *cmd) +{ + davinci_watchdog_reset(&da8xx_wdt_device); +} + int __init da8xx_register_watchdog(void) { return platform_device_register(&da8xx_wdt_device); diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 806a2f0..50c0156 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c @@ -291,6 +291,11 @@ struct platform_device davinci_wdt_device = { .resource = wdt_resources, }; +void davinci_restart(char mode, const char *cmd) +{ + davinci_watchdog_reset(&davinci_wdt_device); +} + static void davinci_init_wdt(void) { platform_device_register(&davinci_wdt_device); diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index fe520d4..19667cf 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -853,7 +853,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { .serial_dev = &dm355_serial_device, .sram_dma = 0x00010000, .sram_len = SZ_32K, - .reset_device = &davinci_wdt_device, }; void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 679e168..f15b435 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1083,7 +1083,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .emac_pdata = &dm365_emac_pdata, .sram_dma = 0x00010000, .sram_len = SZ_32K, - .reset_device = &davinci_wdt_device, }; void __init dm365_init_asp(struct snd_platform_data *pdata) diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 3470983..0800f9c 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -767,7 +767,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { .emac_pdata = &dm644x_emac_pdata, .sram_dma = 0x00008000, .sram_len = SZ_16K, - .reset_device = &davinci_wdt_device, }; void __init dm644x_init_asp(struct snd_platform_data *pdata) diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index af27c13..00f7743 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -854,7 +854,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { .emac_pdata = &dm646x_emac_pdata, .sram_dma = 0x10010000, .sram_len = SZ_32K, - .reset_device = &davinci_wdt_device, }; void __init dm646x_init_mcasp0(struct snd_platform_data *pdata) diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index a57cba2..5cd39a4 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -77,14 +77,13 @@ struct davinci_soc_info { struct emac_platform_data *emac_pdata; dma_addr_t sram_dma; unsigned sram_len; - struct platform_device *reset_device; - void (*reset)(struct platform_device *); }; extern struct davinci_soc_info davinci_soc_info; extern void davinci_common_init(struct davinci_soc_info *soc_info); extern void davinci_init_ide(void); +void davinci_restart(char mode, const char *cmd); /* standard place to map on-chip SRAMs; they *may* support DMA */ #define SRAM_VIRT 0xfffe0000 diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index eaca7d8..ee3461d 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -91,6 +91,7 @@ int da8xx_register_cpuidle(void); void __iomem * __init da8xx_get_mem_ctlr(void); int da850_register_pm(struct platform_device *pdev); int __init da850_register_sata(unsigned long refclkpn); +void da8xx_restart(char mode, const char *cmd); extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata; diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index 2a00fe5..a8ee6c9 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h @@ -16,6 +16,7 @@ #include <linux/i2c.h> #include <linux/videodev2.h> #include <linux/davinci_emac.h> +#include <media/davinci/vpif_types.h> #define DM646X_EMAC_BASE (0x01C80000) #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) @@ -34,58 +35,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv); void dm646x_video_init(void); -enum vpif_if_type { - VPIF_IF_BT656, - VPIF_IF_BT1120, - VPIF_IF_RAW_BAYER -}; - -struct vpif_interface { - enum vpif_if_type if_type; - unsigned hd_pol:1; - unsigned vd_pol:1; - unsigned fid_pol:1; -}; - -struct vpif_subdev_info { - const char *name; - struct i2c_board_info board_info; - u32 input; - u32 output; - unsigned can_route:1; - struct vpif_interface vpif_if; -}; - -struct vpif_display_config { - int (*set_clock)(int, int); - struct vpif_subdev_info *subdevinfo; - int subdev_count; - const char **output; - int output_count; - const char *card_name; -}; - -struct vpif_input { - struct v4l2_input input; - const char *subdev_name; -}; - -#define VPIF_CAPTURE_MAX_CHANNELS 2 - -struct vpif_capture_chan_config { - const struct vpif_input *inputs; - int input_count; -}; - -struct vpif_capture_config { - int (*setup_input_channel_mode)(int); - int (*setup_input_path)(int, const char *); - struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS]; - struct vpif_subdev_info *subdev_info; - int subdev_count; - const char *card_name; -}; - void dm646x_setup_vpif(struct vpif_display_config *, struct vpif_capture_config *); diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h index d1b9549..b2267d1 100644 --- a/arch/arm/mach-davinci/include/mach/io.h +++ b/arch/arm/mach-davinci/include/mach/io.h @@ -21,12 +21,4 @@ #define __mem_pci(a) (a) #define __mem_isa(a) (a) -#ifndef __ASSEMBLER__ -#define __arch_ioremap davinci_ioremap -#define __arch_iounmap davinci_iounmap - -void __iomem *davinci_ioremap(unsigned long phys, size_t size, - unsigned int type); -void davinci_iounmap(volatile void __iomem *addr); -#endif #endif /* __ASM_ARCH_IO_H */ diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h index e65629c..fcb7a01 100644 --- a/arch/arm/mach-davinci/include/mach/system.h +++ b/arch/arm/mach-davinci/include/mach/system.h @@ -18,10 +18,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - if (davinci_soc_info.reset) - davinci_soc_info.reset(davinci_soc_info.reset_device); -} - #endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h index 89c1fdc..83e5926 100644 --- a/arch/arm/mach-davinci/include/mach/tnetv107x.h +++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h @@ -54,6 +54,7 @@ extern struct platform_device tnetv107x_serial_device; extern void __init tnetv107x_init(void); extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *); extern void __init tnetv107x_irq_init(void); +void tnetv107x_restart(char mode, const char *cmd); #endif diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h deleted file mode 100644 index d49646a..0000000 --- a/arch/arm/mach-davinci/include/mach/vmalloc.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * DaVinci vmalloc definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include <mach/hardware.h> - -/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */ -#define VMALLOC_END (IO_VIRT - (2<<20)) diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c deleted file mode 100644 index 8ea60a8b..0000000 --- a/arch/arm/mach-davinci/io.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * DaVinci I/O mapping code - * - * Copyright (C) 2005-2006 Texas Instruments - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/module.h> -#include <linux/io.h> - -#include <asm/tlb.h> -#include <asm/mach/map.h> - -#include <mach/common.h> - -/* - * Intercept ioremap() requests for addresses in our fixed mapping regions. - */ -void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type) -{ - struct map_desc *desc = davinci_soc_info.io_desc; - int desc_num = davinci_soc_info.io_desc_num; - int i; - - for (i = 0; i < desc_num; i++, desc++) { - unsigned long iophys = __pfn_to_phys(desc->pfn); - unsigned long iosize = desc->length; - - if (p >= iophys && (p + size) <= (iophys + iosize)) - return __io(desc->virtual + p - iophys); - } - - return __arm_ioremap_caller(p, size, type, - __builtin_return_address(0)); -} -EXPORT_SYMBOL(davinci_ioremap); - -void davinci_iounmap(volatile void __iomem *addr) -{ - unsigned long virt = (unsigned long)addr; - - if (virt >= VMALLOC_START && virt < VMALLOC_END) - __iounmap(addr); -} -EXPORT_SYMBOL(davinci_iounmap); diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c index 409bb86..dc1a209 100644 --- a/arch/arm/mach-davinci/tnetv107x.c +++ b/arch/arm/mach-davinci/tnetv107x.c @@ -730,6 +730,11 @@ static void tnetv107x_watchdog_reset(struct platform_device *pdev) __raw_writel(1, ®s->kick); } +void tnetv107x_restart(char mode, const char *cmd) +{ + tnetv107x_watchdog_reset(&tnetv107x_wdt_device); +} + static struct davinci_soc_info tnetv107x_soc_info = { .io_desc = io_desc, .io_desc_num = ARRAY_SIZE(io_desc), @@ -752,8 +757,6 @@ static struct davinci_soc_info tnetv107x_soc_info = { .gpio_num = TNETV107X_N_GPIO, .timer_info = &timer_info, .serial_dev = &tnetv107x_serial_device, - .reset = tnetv107x_watchdog_reset, - .reset_device = &tnetv107x_wdt_device, }; void __init tnetv107x_init(void) diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c index c8a406f..792b4e2 100644 --- a/arch/arm/mach-dove/cm-a510.c +++ b/arch/arm/mach-dove/cm-a510.c @@ -93,4 +93,5 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board") .init_early = dove_init_early, .init_irq = dove_init_irq, .timer = &dove_timer, + .restart = dove_restart, MACHINE_END diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index a9e0dae..13bb236 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -292,3 +292,19 @@ void __init dove_init(void) dove_xor0_init(); dove_xor1_init(); } + +void dove_restart(char mode, const char *cmd) +{ + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); + + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); + + while (1) + ; +} diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h index 6a2046e..4202730 100644 --- a/arch/arm/mach-dove/common.h +++ b/arch/arm/mach-dove/common.h @@ -39,5 +39,6 @@ void dove_spi1_init(void); void dove_i2c_init(void); void dove_sdio0_init(void); void dove_sdio1_init(void); +void dove_restart(char, const char *); #endif diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c index 11ea34e..ea77ae4 100644 --- a/arch/arm/mach-dove/dove-db-setup.c +++ b/arch/arm/mach-dove/dove-db-setup.c @@ -100,4 +100,5 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board") .init_early = dove_init_early, .init_irq = dove_init_irq, .timer = &dove_timer, + .restart = dove_restart, MACHINE_END diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h index b20ec9a..ad1165d 100644 --- a/arch/arm/mach-dove/include/mach/dove.h +++ b/arch/arm/mach-dove/include/mach/dove.h @@ -11,8 +11,6 @@ #ifndef __ASM_ARCH_DOVE_H #define __ASM_ARCH_DOVE_H -#include <mach/vmalloc.h> - /* * Marvell Dove address maps. * diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h index 356afda..3027954 100644 --- a/arch/arm/mach-dove/include/mach/system.h +++ b/arch/arm/mach-dove/include/mach/system.h @@ -9,28 +9,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/bridge-regs.h> - static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - - #endif diff --git a/arch/arm/mach-dove/include/mach/vmalloc.h b/arch/arm/mach-dove/include/mach/vmalloc.h deleted file mode 100644 index a28792c..0000000 --- a/arch/arm/mach-dove/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfd800000UL diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index d0ce8ab..294aad0 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -278,13 +278,19 @@ static int __init ebsa110_init(void) arch_initcall(ebsa110_init); +static void ebsa110_restart(char mode, const char *cmd) +{ + soft_restart(0x80000000); +} + MACHINE_START(EBSA110, "EBSA110") /* Maintainer: Russell King */ .atag_offset = 0x400, .reserve_lp0 = 1, .reserve_lp2 = 1, - .soft_reboot = 1, + .restart_mode = 's', .map_io = ebsa110_map_io, .init_irq = ebsa110_init_irq, .timer = &ebsa110_timer, + .restart = ebsa110_restart, MACHINE_END diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h index 9a26245..2e4af65 100644 --- a/arch/arm/mach-ebsa110/include/mach/system.h +++ b/arch/arm/mach-ebsa110/include/mach/system.h @@ -34,6 +34,4 @@ static inline void arch_idle(void) asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); } -#define arch_reset(mode, cmd) cpu_reset(0x80000000) - #endif diff --git a/arch/arm/mach-ebsa110/include/mach/vmalloc.h b/arch/arm/mach-ebsa110/include/mach/vmalloc.h deleted file mode 100644 index ea141b7a..0000000 --- a/arch/arm/mach-ebsa110/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-ebsa110/include/mach/vmalloc.h - * - * Copyright (C) 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VMALLOC_END 0xdf000000UL diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c index 0713448..681e939 100644 --- a/arch/arm/mach-ep93xx/adssphere.c +++ b/arch/arm/mach-ep93xx/adssphere.c @@ -16,6 +16,7 @@ #include <mach/hardware.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -36,6 +37,8 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = adssphere_init_machine, + .restart = ep93xx_restart, MACHINE_END diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 2432a6b..24203f9 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -906,3 +906,15 @@ void __init ep93xx_init_devices(void) platform_device_register(&ep93xx_ohci_device); platform_device_register(&ep93xx_leds); } + +void ep93xx_restart(char mode, const char *cmd) +{ + /* + * Set then clear the SWRST bit to initiate a software reset + */ + ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); + ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); + + while (1) + ; +} diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c index 70ef8c5..d115653 100644 --- a/arch/arm/mach-ep93xx/edb93xx.c +++ b/arch/arm/mach-ep93xx/edb93xx.c @@ -39,6 +39,7 @@ #include <mach/ep93xx_spi.h> #include <mach/gpio-ep93xx.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -250,8 +251,10 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -261,8 +264,10 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -272,8 +277,10 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -283,8 +290,10 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -294,8 +303,10 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -305,8 +316,10 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -316,8 +329,10 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -327,7 +342,9 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = edb93xx_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c index 45ee205..af46970 100644 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ b/arch/arm/mach-ep93xx/gesbc9312.c @@ -16,6 +16,7 @@ #include <mach/hardware.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -36,6 +37,8 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = gesbc9312_init_machine, + .restart = ep93xx_restart, MACHINE_END diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S index 96b85e2..9be6edc 100644 --- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S @@ -9,51 +9,9 @@ * the Free Software Foundation; either version 2 of the License, or (at * your option) any later version. */ -#include <mach/ep93xx-regs.h> .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =(EP93XX_AHB_VIRT_BASE) - orr \base, \base, #0x000b0000 - mov \irqnr, #0 - ldr \irqstat, [\base] @ lower 32 interrupts - cmp \irqstat, #0 - bne 1001f - - eor \base, \base, #0x00070000 - ldr \irqstat, [\base] @ upper 32 interrupts - cmp \irqstat, #0 - beq 1002f - mov \irqnr, #0x20 - -1001: - movs \tmp, \irqstat, lsl #16 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #16 - - movs \tmp, \irqstat, lsl #8 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #8 - - movs \tmp, \irqstat, lsl #4 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #4 - - movs \tmp, \irqstat, lsl #2 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #2 - - movs \tmp, \irqstat, lsl #1 - addeq \irqnr, \irqnr, #1 - orrs \base, \base, #1 - -1002: - .endm diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index 5066045..d4c9349 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h @@ -66,4 +66,6 @@ void ep93xx_register_ac97(void); void ep93xx_init_devices(void); extern struct sys_timer ep93xx_timer; +void ep93xx_restart(char, const char *); + #endif diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h index 6d661fe..b5bec7c 100644 --- a/arch/arm/mach-ep93xx/include/mach/system.h +++ b/arch/arm/mach-ep93xx/include/mach/system.h @@ -1,24 +1,7 @@ /* * arch/arm/mach-ep93xx/include/mach/system.h */ - -#include <mach/hardware.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - local_irq_disable(); - - /* - * Set then clear the SWRST bit to initiate a software reset - */ - ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); - ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); - - while (1) - ; -} diff --git a/arch/arm/mach-ep93xx/include/mach/vmalloc.h b/arch/arm/mach-ep93xx/include/mach/vmalloc.h deleted file mode 100644 index 1b3f25d..0000000 --- a/arch/arm/mach-ep93xx/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-ep93xx/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe800000UL diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index e72f736..7b98084 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c @@ -18,6 +18,7 @@ #include <mach/hardware.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -80,8 +81,10 @@ MACHINE_START(MICRO9, "Contec Micro9-High") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = micro9_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -91,8 +94,10 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = micro9_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -102,8 +107,10 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = micro9_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif @@ -113,7 +120,9 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = micro9_init_machine, + .restart = ep93xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c index 52e090d..f4e553e 100644 --- a/arch/arm/mach-ep93xx/simone.c +++ b/arch/arm/mach-ep93xx/simone.c @@ -25,6 +25,7 @@ #include <mach/fb.h> #include <mach/gpio-ep93xx.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -80,6 +81,8 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = simone_init_machine, + .restart = ep93xx_restart, MACHINE_END diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c index 8121e3a..fd84633 100644 --- a/arch/arm/mach-ep93xx/snappercl15.c +++ b/arch/arm/mach-ep93xx/snappercl15.c @@ -31,6 +31,7 @@ #include <mach/fb.h> #include <mach/gpio-ep93xx.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -177,6 +178,8 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15") .atag_offset = 0x100, .map_io = ep93xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = snappercl15_init_machine, + .restart = ep93xx_restart, MACHINE_END diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index 8b2f143..79f8ecf 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c @@ -23,6 +23,7 @@ #include <mach/hardware.h> #include <mach/ts72xx.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/map.h> #include <asm/mach/arch.h> @@ -247,6 +248,8 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") .atag_offset = 0x100, .map_io = ts72xx_map_io, .init_irq = ep93xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &ep93xx_timer, .init_machine = ts72xx_init_machine, + .restart = ep93xx_restart, MACHINE_END diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c index d96e4db..03dd401 100644 --- a/arch/arm/mach-ep93xx/vision_ep9307.c +++ b/arch/arm/mach-ep93xx/vision_ep9307.c @@ -361,4 +361,5 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") .init_irq = ep93xx_init_irq, .timer = &ep93xx_timer, .init_machine = vision_init_machine, + .restart = ep93xx_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 4e36e8f..5d602f68 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -17,6 +17,8 @@ choice config ARCH_EXYNOS4 bool "SAMSUNG EXYNOS4" + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 help Samsung EXYNOS4 SoCs based systems diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index db527ab..5fc202c 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -10,15 +10,17 @@ obj-m := obj-n := obj- := -# Core support for EXYNOS4 system +# Core -obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o -obj-$(CONFIG_ARCH_EXYNOS4) += irq-eint.o pmu.o +obj-$(CONFIG_ARCH_EXYNOS4) += common.o clock.o obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o + obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o +obj-$(CONFIG_ARCH_EXYNOS4) += pmu.o + obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_EXYNOS4_MCT) += mct.o @@ -49,6 +51,7 @@ obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o +obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c index b9d5ef6..a5823a7 100644 --- a/arch/arm/mach-exynos/clock-exynos4210.c +++ b/arch/arm/mach-exynos/clock-exynos4210.c @@ -23,7 +23,6 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/exynos4.h> #include <plat/pm.h> #include <mach/hardware.h> @@ -31,6 +30,8 @@ #include <mach/regs-clock.h> #include <mach/exynos4-clock.h> +#include "common.h" + static struct sleep_save exynos4210_clock_save[] = { SAVE_ITEM(S5P_CLKSRC_IMAGE), SAVE_ITEM(S5P_CLKSRC_LCD1), diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c index 77d5dec..26a668b 100644 --- a/arch/arm/mach-exynos/clock-exynos4212.c +++ b/arch/arm/mach-exynos/clock-exynos4212.c @@ -23,7 +23,6 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/exynos4.h> #include <plat/pm.h> #include <mach/hardware.h> @@ -31,6 +30,8 @@ #include <mach/regs-clock.h> #include <mach/exynos4-clock.h> +#include "common.h" + static struct sleep_save exynos4212_clock_save[] = { SAVE_ITEM(S5P_CLKSRC_IMAGE), SAVE_ITEM(S5P_CLKDIV_IMAGE), diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index da50b1a..5a8c42e 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c @@ -21,7 +21,6 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/exynos4.h> #include <plat/pm.h> #include <mach/map.h> @@ -29,6 +28,8 @@ #include <mach/sysmmu.h> #include <mach/exynos4-clock.h> +#include "common.h" + static struct sleep_save exynos4_clock_save[] = { SAVE_ITEM(S5P_CLKDIV_LEFTBUS), SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c new file mode 100644 index 0000000..b4beb7e --- /dev/null +++ b/arch/arm/mach-exynos/common.c @@ -0,0 +1,698 @@ +/* + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Codes for EXYNOS + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/io.h> +#include <linux/sysdev.h> +#include <linux/gpio.h> +#include <linux/sched.h> +#include <linux/serial_core.h> +#include <linux/of.h> +#include <linux/of_irq.h> + +#include <asm/proc-fns.h> +#include <asm/exception.h> +#include <asm/hardware/cache-l2x0.h> +#include <asm/hardware/gic.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <mach/regs-irq.h> +#include <mach/regs-pmu.h> +#include <mach/regs-gpio.h> + +#include <plat/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/pm.h> +#include <plat/sdhci.h> +#include <plat/gpio-cfg.h> +#include <plat/adc-core.h> +#include <plat/fb-core.h> +#include <plat/fimc-core.h> +#include <plat/iic-core.h> +#include <plat/tv-core.h> +#include <plat/regs-serial.h> + +#include "common.h" + +static const char name_exynos4210[] = "EXYNOS4210"; +static const char name_exynos4212[] = "EXYNOS4212"; +static const char name_exynos4412[] = "EXYNOS4412"; + +static struct cpu_table cpu_ids[] __initdata = { + { + .idcode = EXYNOS4210_CPU_ID, + .idmask = EXYNOS4_CPU_MASK, + .map_io = exynos4_map_io, + .init_clocks = exynos4_init_clocks, + .init_uarts = exynos4_init_uarts, + .init = exynos_init, + .name = name_exynos4210, + }, { + .idcode = EXYNOS4212_CPU_ID, + .idmask = EXYNOS4_CPU_MASK, + .map_io = exynos4_map_io, + .init_clocks = exynos4_init_clocks, + .init_uarts = exynos4_init_uarts, + .init = exynos_init, + .name = name_exynos4212, + }, { + .idcode = EXYNOS4412_CPU_ID, + .idmask = EXYNOS4_CPU_MASK, + .map_io = exynos4_map_io, + .init_clocks = exynos4_init_clocks, + .init_uarts = exynos4_init_uarts, + .init = exynos_init, + .name = name_exynos4412, + }, +}; + +/* Initial IO mappings */ + +static struct map_desc exynos_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_CHIPID, + .pfn = __phys_to_pfn(EXYNOS4_PA_CHIPID), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_SYS, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_TIMER, + .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_WATCHDOG, + .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SYSTIMER, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_PMU, + .pfn = __phys_to_pfn(EXYNOS4_PA_PMU), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_COMBINER_BASE, + .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GIC_CPU, + .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GIC_DIST, + .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_UART, + .pfn = __phys_to_pfn(EXYNOS4_PA_UART), + .length = SZ_512K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_CMU, + .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), + .length = SZ_128K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_COREPERI_BASE, + .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), + .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_L2CC, + .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GPIO1, + .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GPIO2, + .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GPIO3, + .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3), + .length = SZ_256, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_DMC0, + .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_USB_HSPHY, + .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4_iodesc0[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4_iodesc1[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static void exynos_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + +void exynos4_restart(char mode, const char *cmd) +{ + __raw_writel(0x1, S5P_SWRESET); +} + +/* + * exynos_map_io + * + * register the standard cpu IO areas + */ + +void __init exynos_init_io(struct map_desc *mach_desc, int size) +{ + /* initialize the io descriptors we need for initialization */ + iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); + if (mach_desc) + iotable_init(mach_desc, size); + + /* detect cpu id and rev. */ + s5p_init_cpu(S5P_VA_CHIPID); + + s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); +} + +void __init exynos4_map_io(void) +{ + iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); + + if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) + iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); + else + iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); + + /* initialize device information early */ + exynos4_default_sdhci0(); + exynos4_default_sdhci1(); + exynos4_default_sdhci2(); + exynos4_default_sdhci3(); + + s3c_adc_setname("samsung-adc-v3"); + + s3c_fimc_setname(0, "exynos4-fimc"); + s3c_fimc_setname(1, "exynos4-fimc"); + s3c_fimc_setname(2, "exynos4-fimc"); + s3c_fimc_setname(3, "exynos4-fimc"); + + /* The I2C bus controllers are directly compatible with s3c2440 */ + s3c_i2c0_setname("s3c2440-i2c"); + s3c_i2c1_setname("s3c2440-i2c"); + s3c_i2c2_setname("s3c2440-i2c"); + + s5p_fb_setname(0, "exynos4-fb"); + s5p_hdmi_setname("exynos4-hdmi"); +} + +void __init exynos4_init_clocks(int xtal) +{ + printk(KERN_DEBUG "%s: initializing clocks\n", __func__); + + s3c24xx_register_baseclocks(xtal); + s5p_register_clocks(xtal); + + if (soc_is_exynos4210()) + exynos4210_register_clocks(); + else if (soc_is_exynos4212() || soc_is_exynos4412()) + exynos4212_register_clocks(); + + exynos4_register_clocks(); + exynos4_setup_clocks(); +} + +#define COMBINER_ENABLE_SET 0x0 +#define COMBINER_ENABLE_CLEAR 0x4 +#define COMBINER_INT_STATUS 0xC + +static DEFINE_SPINLOCK(irq_controller_lock); + +struct combiner_chip_data { + unsigned int irq_offset; + unsigned int irq_mask; + void __iomem *base; +}; + +static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; + +static inline void __iomem *combiner_base(struct irq_data *data) +{ + struct combiner_chip_data *combiner_data = + irq_data_get_irq_chip_data(data); + + return combiner_data->base; +} + +static void combiner_mask_irq(struct irq_data *data) +{ + u32 mask = 1 << (data->irq % 32); + + __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); +} + +static void combiner_unmask_irq(struct irq_data *data) +{ + u32 mask = 1 << (data->irq % 32); + + __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); +} + +static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) +{ + struct combiner_chip_data *chip_data = irq_get_handler_data(irq); + struct irq_chip *chip = irq_get_chip(irq); + unsigned int cascade_irq, combiner_irq; + unsigned long status; + + chained_irq_enter(chip, desc); + + spin_lock(&irq_controller_lock); + status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); + spin_unlock(&irq_controller_lock); + status &= chip_data->irq_mask; + + if (status == 0) + goto out; + + combiner_irq = __ffs(status); + + cascade_irq = combiner_irq + (chip_data->irq_offset & ~31); + if (unlikely(cascade_irq >= NR_IRQS)) + do_bad_IRQ(cascade_irq, desc); + else + generic_handle_irq(cascade_irq); + + out: + chained_irq_exit(chip, desc); +} + +static struct irq_chip combiner_chip = { + .name = "COMBINER", + .irq_mask = combiner_mask_irq, + .irq_unmask = combiner_unmask_irq, +}; + +static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) +{ + if (combiner_nr >= MAX_COMBINER_NR) + BUG(); + if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) + BUG(); + irq_set_chained_handler(irq, combiner_handle_cascade_irq); +} + +static void __init combiner_init(unsigned int combiner_nr, void __iomem *base, + unsigned int irq_start) +{ + unsigned int i; + + if (combiner_nr >= MAX_COMBINER_NR) + BUG(); + + combiner_data[combiner_nr].base = base; + combiner_data[combiner_nr].irq_offset = irq_start; + combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3); + + /* Disable all interrupts */ + + __raw_writel(combiner_data[combiner_nr].irq_mask, + base + COMBINER_ENABLE_CLEAR); + + /* Setup the Linux IRQ subsystem */ + + for (i = irq_start; i < combiner_data[combiner_nr].irq_offset + + MAX_IRQ_IN_COMBINER; i++) { + irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq); + irq_set_chip_data(i, &combiner_data[combiner_nr]); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } +} + +#ifdef CONFIG_OF +static const struct of_device_id exynos4_dt_irq_match[] = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, + {}, +}; +#endif + +void __init exynos4_init_irq(void) +{ + int irq; + unsigned int gic_bank_offset; + + gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; + + if (!of_have_populated_dt()) + gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); +#ifdef CONFIG_OF + else + of_irq_init(exynos4_dt_irq_match); +#endif + + for (irq = 0; irq < MAX_COMBINER_NR; irq++) { + + combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), + COMBINER_IRQ(irq, 0)); + combiner_cascade_irq(irq, IRQ_SPI(irq)); + } + + /* + * The parameters of s5p_init_irq() are for VIC init. + * Theses parameters should be NULL and 0 because EXYNOS4 + * uses GIC instead of VIC. + */ + s5p_init_irq(NULL, 0); +} + +struct sysdev_class exynos4_sysclass = { + .name = "exynos4-core", +}; + +static struct sys_device exynos4_sysdev = { + .cls = &exynos4_sysclass, +}; + +static int __init exynos4_core_init(void) +{ + return sysdev_class_register(&exynos4_sysclass); +} +core_initcall(exynos4_core_init); + +#ifdef CONFIG_CACHE_L2X0 +static int __init exynos4_l2x0_cache_init(void) +{ + /* TAG, Data Latency Control: 2cycle */ + __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); + + if (soc_is_exynos4210()) + __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); + else if (soc_is_exynos4212() || soc_is_exynos4412()) + __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); + + /* L2X0 Prefetch Control */ + __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); + + /* L2X0 Power Control */ + __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, + S5P_VA_L2CC + L2X0_POWER_CTRL); + + l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); + + return 0; +} + +early_initcall(exynos4_l2x0_cache_init); +#endif + +int __init exynos_init(void) +{ + printk(KERN_INFO "EXYNOS: Initializing architecture\n"); + + /* set idle function */ + pm_idle = exynos_idle; + + return sysdev_register(&exynos4_sysdev); +} + +/* uart registration process */ + +void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + struct s3c2410_uartcfg *tcfg = cfg; + u32 ucnt; + + for (ucnt = 0; ucnt < no; ucnt++, tcfg++) + tcfg->has_fracval = 1; + + s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no); +} + +static DEFINE_SPINLOCK(eint_lock); + +static unsigned int eint0_15_data[16]; + +static unsigned int exynos4_get_irq_nr(unsigned int number) +{ + u32 ret = 0; + + switch (number) { + case 0 ... 3: + ret = (number + IRQ_EINT0); + break; + case 4 ... 7: + ret = (number + (IRQ_EINT4 - 4)); + break; + case 8 ... 15: + ret = (number + (IRQ_EINT8 - 8)); + break; + default: + printk(KERN_ERR "number available : %d\n", number); + } + + return ret; +} + +static inline void exynos4_irq_eint_mask(struct irq_data *data) +{ + u32 mask; + + spin_lock(&eint_lock); + mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); + mask |= eint_irq_to_bit(data->irq); + __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); + spin_unlock(&eint_lock); +} + +static void exynos4_irq_eint_unmask(struct irq_data *data) +{ + u32 mask; + + spin_lock(&eint_lock); + mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); + mask &= ~(eint_irq_to_bit(data->irq)); + __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); + spin_unlock(&eint_lock); +} + +static inline void exynos4_irq_eint_ack(struct irq_data *data) +{ + __raw_writel(eint_irq_to_bit(data->irq), + S5P_EINT_PEND(EINT_REG_NR(data->irq))); +} + +static void exynos4_irq_eint_maskack(struct irq_data *data) +{ + exynos4_irq_eint_mask(data); + exynos4_irq_eint_ack(data); +} + +static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type) +{ + int offs = EINT_OFFSET(data->irq); + int shift; + u32 ctrl, mask; + u32 newvalue = 0; + + switch (type) { + case IRQ_TYPE_EDGE_RISING: + newvalue = S5P_IRQ_TYPE_EDGE_RISING; + break; + + case IRQ_TYPE_EDGE_FALLING: + newvalue = S5P_IRQ_TYPE_EDGE_FALLING; + break; + + case IRQ_TYPE_EDGE_BOTH: + newvalue = S5P_IRQ_TYPE_EDGE_BOTH; + break; + + case IRQ_TYPE_LEVEL_LOW: + newvalue = S5P_IRQ_TYPE_LEVEL_LOW; + break; + + case IRQ_TYPE_LEVEL_HIGH: + newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; + break; + + default: + printk(KERN_ERR "No such irq type %d", type); + return -EINVAL; + } + + shift = (offs & 0x7) * 4; + mask = 0x7 << shift; + + spin_lock(&eint_lock); + ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); + ctrl &= ~mask; + ctrl |= newvalue << shift; + __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); + spin_unlock(&eint_lock); + + switch (offs) { + case 0 ... 7: + s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); + break; + case 8 ... 15: + s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); + break; + case 16 ... 23: + s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); + break; + case 24 ... 31: + s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); + break; + default: + printk(KERN_ERR "No such irq number %d", offs); + } + + return 0; +} + +static struct irq_chip exynos4_irq_eint = { + .name = "exynos4-eint", + .irq_mask = exynos4_irq_eint_mask, + .irq_unmask = exynos4_irq_eint_unmask, + .irq_mask_ack = exynos4_irq_eint_maskack, + .irq_ack = exynos4_irq_eint_ack, + .irq_set_type = exynos4_irq_eint_set_type, +#ifdef CONFIG_PM + .irq_set_wake = s3c_irqext_wake, +#endif +}; + +/* + * exynos4_irq_demux_eint + * + * This function demuxes the IRQ from from EINTs 16 to 31. + * It is designed to be inlined into the specific handler + * s5p_irq_demux_eintX_Y. + * + * Each EINT pend/mask registers handle eight of them. + */ +static inline void exynos4_irq_demux_eint(unsigned int start) +{ + unsigned int irq; + + u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); + u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); + + status &= ~mask; + status &= 0xff; + + while (status) { + irq = fls(status) - 1; + generic_handle_irq(irq + start); + status &= ~(1 << irq); + } +} + +static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) +{ + struct irq_chip *chip = irq_get_chip(irq); + chained_irq_enter(chip, desc); + exynos4_irq_demux_eint(IRQ_EINT(16)); + exynos4_irq_demux_eint(IRQ_EINT(24)); + chained_irq_exit(chip, desc); +} + +static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) +{ + u32 *irq_data = irq_get_handler_data(irq); + struct irq_chip *chip = irq_get_chip(irq); + + chained_irq_enter(chip, desc); + chip->irq_mask(&desc->irq_data); + + if (chip->irq_ack) + chip->irq_ack(&desc->irq_data); + + generic_handle_irq(*irq_data); + + chip->irq_unmask(&desc->irq_data); + chained_irq_exit(chip, desc); +} + +int __init exynos4_init_irq_eint(void) +{ + int irq; + + for (irq = 0 ; irq <= 31 ; irq++) { + irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint, + handle_level_irq); + set_irq_flags(IRQ_EINT(irq), IRQF_VALID); + } + + irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); + + for (irq = 0 ; irq <= 15 ; irq++) { + eint0_15_data[irq] = IRQ_EINT(irq); + + irq_set_handler_data(exynos4_get_irq_nr(irq), + &eint0_15_data[irq]); + irq_set_chained_handler(exynos4_get_irq_nr(irq), + exynos4_irq_eint0_15); + } + + return 0; +} +arch_initcall(exynos4_init_irq_eint); diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h new file mode 100644 index 0000000..1ac49de --- /dev/null +++ b/arch/arm/mach-exynos/common.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Header for EXYNOS machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H +#define __ARCH_ARM_MACH_EXYNOS_COMMON_H + +void exynos_init_io(struct map_desc *mach_desc, int size); +void exynos4_init_irq(void); + +void exynos4_register_clocks(void); +void exynos4_setup_clocks(void); + +void exynos4210_register_clocks(void); +void exynos4212_register_clocks(void); + +void exynos4_restart(char mode, const char *cmd); + +extern struct sys_timer exynos4_timer; + +#ifdef CONFIG_ARCH_EXYNOS +extern int exynos_init(void); +extern void exynos4_map_io(void); +extern void exynos4_init_clocks(int xtal); +extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +#else +#define exynos4_init_clocks NULL +#define exynos4_init_uarts NULL +#define exynos4_map_io NULL +#define exynos_init NULL +#endif + +#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c deleted file mode 100644 index 0eb7b6a..0000000 --- a/arch/arm/mach-exynos/cpu.c +++ /dev/null @@ -1,313 +0,0 @@ -/* linux/arch/arm/mach-exynos/cpu.c - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/sched.h> -#include <linux/sysdev.h> -#include <linux/of.h> -#include <linux/of_irq.h> - -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <asm/proc-fns.h> -#include <asm/hardware/cache-l2x0.h> -#include <asm/hardware/gic.h> - -#include <plat/cpu.h> -#include <plat/clock.h> -#include <plat/devs.h> -#include <plat/exynos4.h> -#include <plat/adc-core.h> -#include <plat/sdhci.h> -#include <plat/fb-core.h> -#include <plat/fimc-core.h> -#include <plat/iic-core.h> -#include <plat/reset.h> -#include <plat/tv-core.h> - -#include <mach/regs-irq.h> -#include <mach/regs-pmu.h> - -unsigned int gic_bank_offset __read_mostly; - -extern int combiner_init(unsigned int combiner_nr, void __iomem *base, - unsigned int irq_start); -extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); - -/* Initial IO mappings */ -static struct map_desc exynos_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSTIMER, - .pfn = __phys_to_pfn(EXYNOS_PA_SYSTIMER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_PMU, - .pfn = __phys_to_pfn(EXYNOS_PA_PMU), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_COMBINER_BASE, - .pfn = __phys_to_pfn(EXYNOS_PA_COMBINER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_CPU, - .pfn = __phys_to_pfn(EXYNOS_PA_GIC_CPU), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_DIST, - .pfn = __phys_to_pfn(EXYNOS_PA_GIC_DIST), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S3C_PA_UART), - .length = SZ_512K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_CMU, - .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), - .length = SZ_128K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_COREPERI_BASE, - .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), - .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_L2CC, - .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO1, - .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO2, - .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO3, - .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3), - .length = SZ_256, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC0, - .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_USB_HSPHY, - .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc0[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc1[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static void exynos_idle(void) -{ - if (!need_resched()) - cpu_do_idle(); - - local_irq_enable(); -} - -static void exynos4_sw_reset(void) -{ - __raw_writel(0x1, S5P_SWRESET); -} - -/* - * exynos_map_io - * - * register the standard cpu IO areas - */ -void __init exynos4_map_io(void) -{ - iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); - iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); - - if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) - iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); - else - iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); - - /* initialize device information early */ - exynos4_default_sdhci0(); - exynos4_default_sdhci1(); - exynos4_default_sdhci2(); - exynos4_default_sdhci3(); - - s3c_adc_setname("samsung-adc-v3"); - - s3c_fimc_setname(0, "exynos4-fimc"); - s3c_fimc_setname(1, "exynos4-fimc"); - s3c_fimc_setname(2, "exynos4-fimc"); - s3c_fimc_setname(3, "exynos4-fimc"); - - /* The I2C bus controllers are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - s3c_i2c1_setname("s3c2440-i2c"); - s3c_i2c2_setname("s3c2440-i2c"); - - s5p_fb_setname(0, "exynos4-fb"); - s5p_hdmi_setname("exynos4-hdmi"); -} - -void __init exynos4_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - - if (soc_is_exynos4210()) - exynos4210_register_clocks(); - else if (soc_is_exynos4212() || soc_is_exynos4412()) - exynos4212_register_clocks(); - - exynos4_register_clocks(); - exynos4_setup_clocks(); -} - -static void exynos4_gic_irq_fix_base(struct irq_data *d) -{ - struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); - - gic_data->cpu_base = S5P_VA_GIC_CPU + - (gic_bank_offset * smp_processor_id()); - - gic_data->dist_base = S5P_VA_GIC_DIST + - (gic_bank_offset * smp_processor_id()); -} - -#ifdef CONFIG_OF -static const struct of_device_id exynos4_dt_irq_match[] = { - { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, - {}, -}; -#endif - -void __init exynos4_init_irq(void) -{ - int irq; - - gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; - - if (!of_have_populated_dt()) - gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); -#ifdef CONFIG_OF - else - of_irq_init(exynos4_dt_irq_match); -#endif - - gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base; - gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base; - gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base; - - for (irq = 0; irq < MAX_COMBINER_NR; irq++) { - - combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), - COMBINER_IRQ(irq, 0)); - combiner_cascade_irq(irq, IRQ_SPI(irq)); - } - - /* The parameters of s5p_init_irq() are for VIC init. - * Theses parameters should be NULL and 0 because EXYNOS4 - * uses GIC instead of VIC. - */ - s5p_init_irq(NULL, 0); -} - -struct sysdev_class exynos4_sysclass = { - .name = "exynos4-core", -}; - -static struct sys_device exynos4_sysdev = { - .cls = &exynos4_sysclass, -}; - -static int __init exynos4_core_init(void) -{ - return sysdev_class_register(&exynos4_sysclass); -} -core_initcall(exynos4_core_init); - -#ifdef CONFIG_CACHE_L2X0 -static int __init exynos4_l2x0_cache_init(void) -{ - /* TAG, Data Latency Control: 2cycle */ - __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); - - if (soc_is_exynos4210()) - __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); - else if (soc_is_exynos4212() || soc_is_exynos4412()) - __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); - - /* L2X0 Prefetch Control */ - __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); - - /* L2X0 Power Control */ - __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, - S5P_VA_L2CC + L2X0_POWER_CTRL); - - l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); - - return 0; -} - -early_initcall(exynos4_l2x0_cache_init); -#endif - -int __init exynos_init(void) -{ - printk(KERN_INFO "EXYNOS: Initializing architecture\n"); - - /* set idle function */ - pm_idle = exynos_idle; - - /* set sw_reset function */ - if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) - s5p_reset_hook = exynos4_sw_reset; - - return sysdev_register(&exynos4_sysdev); -} diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S index d7dfcd7..3ba4f54 100644 --- a/arch/arm/mach-exynos/include/mach/entry-macro.S +++ b/arch/arm/mach-exynos/include/mach/entry-macro.S @@ -9,82 +9,8 @@ * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <mach/map.h> -#include <asm/hardware/gic.h> - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - mov \tmp, #0 - - mrc p15, 0, \base, c0, c0, 5 - and \base, \base, #3 - cmp \base, #0 - beq 1f - - ldr \tmp, =gic_bank_offset - ldr \tmp, [\tmp] - cmp \base, #1 - beq 1f - - cmp \base, #2 - addeq \tmp, \tmp, \tmp - addne \tmp, \tmp, \tmp, LSL #1 - -1: ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - add \base, \base, \tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - /* - * The interrupt numbering scheme is defined in the - * interrupt controller spec. To wit: - * - * Interrupts 0-15 are IPI - * 16-28 are reserved - * 29-31 are local. We allow 30 to be used for the watchdog. - * 32-1020 are global - * 1021-1022 are reserved - * 1023 is "spurious" (no interrupt) - * - * For now, we ignore all local interrupts so only return an interrupt if it's - * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. - * - * A simple read from the controller will tell us the number of the highest - * priority enabled interrupt. We then just need to check whether it is in the - * valid range for an IRQ (30-1020 inclusive). - */ - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ - - ldr \tmp, =1021 - - bic \irqnr, \irqstat, #0x1c00 - - cmp \irqnr, #15 - cmpcc \irqnr, \irqnr - cmpne \irqnr, \tmp - cmpcs \irqnr, \irqnr - - .endm - - /* We assume that irqstat (the raw value of the IRQ acknowledge - * register) is preserved from the macro above. - * If there is an IPI, we immediately signal end of interrupt on the - * controller, since this requires the original irqstat value which - * we won't easily be able to recreate later. - */ - - .macro test_for_ipi, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #16 - strcc \irqstat, [\base, #GIC_CPU_EOI] - cmpcs \irqnr, \irqnr - .endm diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 05ff187..c754a22 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -157,7 +157,6 @@ #define S3C_PA_SPI1 EXYNOS4_PA_SPI1 #define S3C_PA_SPI2 EXYNOS4_PA_SPI2 -#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID #define S5P_PA_EHCI EXYNOS4_PA_EHCI #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 #define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 @@ -174,26 +173,17 @@ #define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA #define S5P_PA_SDO EXYNOS4_PA_SDO #define S5P_PA_SDRAM EXYNOS4_PA_SDRAM -#define S5P_PA_SROMC EXYNOS4_PA_SROMC -#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON -#define S5P_PA_TIMER EXYNOS4_PA_TIMER #define S5P_PA_VP EXYNOS4_PA_VP #define SAMSUNG_PA_ADC EXYNOS4_PA_ADC #define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 #define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD -#define EXYNOS_PA_COMBINER EXYNOS4_PA_COMBINER -#define EXYNOS_PA_GIC_CPU EXYNOS4_PA_GIC_CPU -#define EXYNOS_PA_GIC_DIST EXYNOS4_PA_GIC_DIST -#define EXYNOS_PA_PMU EXYNOS4_PA_PMU -#define EXYNOS_PA_SYSTIMER EXYNOS4_PA_SYSTIMER - /* Compatibility UART */ #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) -#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) +#define S5P_PA_UART(x) (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET)) #define S5P_PA_UART0 S5P_PA_UART(0) #define S5P_PA_UART1 S5P_PA_UART(1) #define S5P_PA_UART2 S5P_PA_UART(2) diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 5e3220c..0063a6d 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h @@ -13,8 +13,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H __FILE__ -#include <plat/system-reset.h> - static void arch_idle(void) { /* nothing here yet */ diff --git a/arch/arm/mach-exynos/include/mach/vmalloc.h b/arch/arm/mach-exynos/include/mach/vmalloc.h deleted file mode 100644 index 284330e..0000000 --- a/arch/arm/mach-exynos/include/mach/vmalloc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/vmalloc.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright 2010 Ben Dooks <ben-linux@fluff.org> - * - * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * EXYNOS4 vmalloc definition -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H __FILE__ - -#define VMALLOC_END 0xF6000000UL - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c deleted file mode 100644 index 5b35978..0000000 --- a/arch/arm/mach-exynos/init.c +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/arch/arm/mach-exynos4/init.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/serial_core.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/regs-serial.h> - -/* uart registration process */ -void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - struct s3c2410_uartcfg *tcfg = cfg; - u32 ucnt; - - for (ucnt = 0; ucnt < no; ucnt++, tcfg++) - tcfg->has_fracval = 1; - - s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no); -} diff --git a/arch/arm/mach-exynos/irq-combiner.c b/arch/arm/mach-exynos/irq-combiner.c deleted file mode 100644 index 5a2758a..0000000 --- a/arch/arm/mach-exynos/irq-combiner.c +++ /dev/null @@ -1,124 +0,0 @@ -/* linux/arch/arm/mach-exynos4/irq-combiner.c - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Based on arch/arm/common/gic.c - * - * IRQ COMBINER support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/io.h> - -#include <asm/mach/irq.h> - -#define COMBINER_ENABLE_SET 0x0 -#define COMBINER_ENABLE_CLEAR 0x4 -#define COMBINER_INT_STATUS 0xC - -static DEFINE_SPINLOCK(irq_controller_lock); - -struct combiner_chip_data { - unsigned int irq_offset; - unsigned int irq_mask; - void __iomem *base; -}; - -static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; - -static inline void __iomem *combiner_base(struct irq_data *data) -{ - struct combiner_chip_data *combiner_data = - irq_data_get_irq_chip_data(data); - - return combiner_data->base; -} - -static void combiner_mask_irq(struct irq_data *data) -{ - u32 mask = 1 << (data->irq % 32); - - __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); -} - -static void combiner_unmask_irq(struct irq_data *data) -{ - u32 mask = 1 << (data->irq % 32); - - __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); -} - -static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) -{ - struct combiner_chip_data *chip_data = irq_get_handler_data(irq); - struct irq_chip *chip = irq_get_chip(irq); - unsigned int cascade_irq, combiner_irq; - unsigned long status; - - chained_irq_enter(chip, desc); - - spin_lock(&irq_controller_lock); - status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); - spin_unlock(&irq_controller_lock); - status &= chip_data->irq_mask; - - if (status == 0) - goto out; - - combiner_irq = __ffs(status); - - cascade_irq = combiner_irq + (chip_data->irq_offset & ~31); - if (unlikely(cascade_irq >= NR_IRQS)) - do_bad_IRQ(cascade_irq, desc); - else - generic_handle_irq(cascade_irq); - - out: - chained_irq_exit(chip, desc); -} - -static struct irq_chip combiner_chip = { - .name = "COMBINER", - .irq_mask = combiner_mask_irq, - .irq_unmask = combiner_unmask_irq, -}; - -void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) -{ - if (combiner_nr >= MAX_COMBINER_NR) - BUG(); - if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) - BUG(); - irq_set_chained_handler(irq, combiner_handle_cascade_irq); -} - -void __init combiner_init(unsigned int combiner_nr, void __iomem *base, - unsigned int irq_start) -{ - unsigned int i; - - if (combiner_nr >= MAX_COMBINER_NR) - BUG(); - - combiner_data[combiner_nr].base = base; - combiner_data[combiner_nr].irq_offset = irq_start; - combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3); - - /* Disable all interrupts */ - - __raw_writel(combiner_data[combiner_nr].irq_mask, - base + COMBINER_ENABLE_CLEAR); - - /* Setup the Linux IRQ subsystem */ - - for (i = irq_start; i < combiner_data[combiner_nr].irq_offset - + MAX_IRQ_IN_COMBINER; i++) { - irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq); - irq_set_chip_data(i, &combiner_data[combiner_nr]); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } -} diff --git a/arch/arm/mach-exynos/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c deleted file mode 100644 index badb8c6..0000000 --- a/arch/arm/mach-exynos/irq-eint.c +++ /dev/null @@ -1,237 +0,0 @@ -/* linux/arch/arm/mach-exynos4/irq-eint.c - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - IRQ EINT support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/sysdev.h> -#include <linux/gpio.h> - -#include <plat/pm.h> -#include <plat/cpu.h> -#include <plat/gpio-cfg.h> - -#include <mach/regs-gpio.h> - -#include <asm/mach/irq.h> - -static DEFINE_SPINLOCK(eint_lock); - -static unsigned int eint0_15_data[16]; - -static unsigned int exynos4_get_irq_nr(unsigned int number) -{ - u32 ret = 0; - - switch (number) { - case 0 ... 3: - ret = (number + IRQ_EINT0); - break; - case 4 ... 7: - ret = (number + (IRQ_EINT4 - 4)); - break; - case 8 ... 15: - ret = (number + (IRQ_EINT8 - 8)); - break; - default: - printk(KERN_ERR "number available : %d\n", number); - } - - return ret; -} - -static inline void exynos4_irq_eint_mask(struct irq_data *data) -{ - u32 mask; - - spin_lock(&eint_lock); - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); - mask |= eint_irq_to_bit(data->irq); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); - spin_unlock(&eint_lock); -} - -static void exynos4_irq_eint_unmask(struct irq_data *data) -{ - u32 mask; - - spin_lock(&eint_lock); - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); - mask &= ~(eint_irq_to_bit(data->irq)); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); - spin_unlock(&eint_lock); -} - -static inline void exynos4_irq_eint_ack(struct irq_data *data) -{ - __raw_writel(eint_irq_to_bit(data->irq), - S5P_EINT_PEND(EINT_REG_NR(data->irq))); -} - -static void exynos4_irq_eint_maskack(struct irq_data *data) -{ - exynos4_irq_eint_mask(data); - exynos4_irq_eint_ack(data); -} - -static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type) -{ - int offs = EINT_OFFSET(data->irq); - int shift; - u32 ctrl, mask; - u32 newvalue = 0; - - switch (type) { - case IRQ_TYPE_EDGE_RISING: - newvalue = S5P_IRQ_TYPE_EDGE_RISING; - break; - - case IRQ_TYPE_EDGE_FALLING: - newvalue = S5P_IRQ_TYPE_EDGE_FALLING; - break; - - case IRQ_TYPE_EDGE_BOTH: - newvalue = S5P_IRQ_TYPE_EDGE_BOTH; - break; - - case IRQ_TYPE_LEVEL_LOW: - newvalue = S5P_IRQ_TYPE_LEVEL_LOW; - break; - - case IRQ_TYPE_LEVEL_HIGH: - newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; - break; - - default: - printk(KERN_ERR "No such irq type %d", type); - return -EINVAL; - } - - shift = (offs & 0x7) * 4; - mask = 0x7 << shift; - - spin_lock(&eint_lock); - ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); - ctrl &= ~mask; - ctrl |= newvalue << shift; - __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); - spin_unlock(&eint_lock); - - switch (offs) { - case 0 ... 7: - s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); - break; - case 8 ... 15: - s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); - break; - case 16 ... 23: - s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); - break; - case 24 ... 31: - s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); - break; - default: - printk(KERN_ERR "No such irq number %d", offs); - } - - return 0; -} - -static struct irq_chip exynos4_irq_eint = { - .name = "exynos4-eint", - .irq_mask = exynos4_irq_eint_mask, - .irq_unmask = exynos4_irq_eint_unmask, - .irq_mask_ack = exynos4_irq_eint_maskack, - .irq_ack = exynos4_irq_eint_ack, - .irq_set_type = exynos4_irq_eint_set_type, -#ifdef CONFIG_PM - .irq_set_wake = s3c_irqext_wake, -#endif -}; - -/* exynos4_irq_demux_eint - * - * This function demuxes the IRQ from from EINTs 16 to 31. - * It is designed to be inlined into the specific handler - * s5p_irq_demux_eintX_Y. - * - * Each EINT pend/mask registers handle eight of them. - */ -static inline void exynos4_irq_demux_eint(unsigned int start) -{ - unsigned int irq; - - u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); - u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); - - status &= ~mask; - status &= 0xff; - - while (status) { - irq = fls(status) - 1; - generic_handle_irq(irq + start); - status &= ~(1 << irq); - } -} - -static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) -{ - struct irq_chip *chip = irq_get_chip(irq); - chained_irq_enter(chip, desc); - exynos4_irq_demux_eint(IRQ_EINT(16)); - exynos4_irq_demux_eint(IRQ_EINT(24)); - chained_irq_exit(chip, desc); -} - -static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) -{ - u32 *irq_data = irq_get_handler_data(irq); - struct irq_chip *chip = irq_get_chip(irq); - - chained_irq_enter(chip, desc); - chip->irq_mask(&desc->irq_data); - - if (chip->irq_ack) - chip->irq_ack(&desc->irq_data); - - generic_handle_irq(*irq_data); - - chip->irq_unmask(&desc->irq_data); - chained_irq_exit(chip, desc); -} - -int __init exynos4_init_irq_eint(void) -{ - int irq; - - for (irq = 0 ; irq <= 31 ; irq++) { - irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint, - handle_level_irq); - set_irq_flags(IRQ_EINT(irq), IRQF_VALID); - } - - irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); - - for (irq = 0 ; irq <= 15 ; irq++) { - eint0_15_data[irq] = IRQ_EINT(irq); - - irq_set_handler_data(exynos4_get_irq_nr(irq), - &eint0_15_data[irq]); - irq_set_chained_handler(exynos4_get_irq_nr(irq), - exynos4_irq_eint0_15); - } - - return 0; -} - -arch_initcall(exynos4_init_irq_eint); diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c index f0ca6c1..d726fcd 100644 --- a/arch/arm/mach-exynos/mach-armlex4210.c +++ b/arch/arm/mach-exynos/mach-armlex4210.c @@ -16,11 +16,11 @@ #include <linux/smsc911x.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <plat/cpu.h> #include <plat/devs.h> -#include <plat/exynos4.h> #include <plat/gpio-cfg.h> #include <plat/regs-serial.h> #include <plat/regs-srom.h> @@ -28,6 +28,8 @@ #include <mach/map.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -187,7 +189,7 @@ static void __init armlex4210_smsc911x_init(void) static void __init armlex4210_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(armlex4210_uartcfgs, ARRAY_SIZE(armlex4210_uartcfgs)); @@ -210,6 +212,8 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = armlex4210_map_io, + .handle_irq = gic_handle_irq, .init_machine = armlex4210_machine_init, .timer = &exynos4_timer, + .restart = exynos4_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 236bbe1..b895ec0 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c @@ -32,12 +32,12 @@ #include <media/v4l2-mediabus.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <plat/adc.h> #include <plat/regs-fb-v4.h> #include <plat/regs-serial.h> -#include <plat/exynos4.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/fb.h> @@ -54,6 +54,8 @@ #include <mach/map.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -247,13 +249,8 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power) static int nuri_bl_init(struct device *dev) { - int ret, gpio = EXYNOS4_GPE2(3); - - ret = gpio_request(gpio, "LCD_LDO_EN"); - if (!ret) - gpio_direction_output(gpio, 0); - - return ret; + return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW, + "LCD_LD0_EN"); } static int nuri_bl_notify(struct device *dev, int brightness) @@ -1283,7 +1280,7 @@ static struct platform_device *nuri_devices[] __initdata = { static void __init nuri_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); } @@ -1333,7 +1330,9 @@ MACHINE_START(NURI, "NURI") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = nuri_map_io, + .handle_irq = gic_handle_irq, .init_machine = nuri_machine_init, .timer = &exynos4_timer, .reserve = &nuri_reserve, + .restart = exynos4_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index b805e59..2b11e04 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c @@ -22,13 +22,13 @@ #include <linux/lcd.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <video/platform_lcd.h> #include <plat/regs-serial.h> #include <plat/regs-fb-v4.h> -#include <plat/exynos4.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/sdhci.h> @@ -44,6 +44,8 @@ #include <mach/ohci.h> #include <mach/map.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -650,7 +652,7 @@ static void s5p_tv_setup(void) static void __init origen_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); } @@ -707,7 +709,9 @@ MACHINE_START(ORIGEN, "ORIGEN") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = origen_map_io, + .handle_irq = gic_handle_irq, .init_machine = origen_machine_init, .timer = &exynos4_timer, .reserve = &origen_reserve, + .restart = exynos4_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index fcf2e0e..d00e4f0 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c @@ -21,13 +21,13 @@ #include <linux/serial_core.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <plat/backlight.h> #include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> -#include <plat/exynos4.h> #include <plat/gpio-cfg.h> #include <plat/iic.h> #include <plat/keypad.h> @@ -36,6 +36,8 @@ #include <mach/map.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -249,7 +251,7 @@ static void __init smdk4x12_map_io(void) { clk_xusbxti.rate = 24000000; - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + exynos_init_io(NULL, 0); s3c24xx_init_clocks(clk_xusbxti.rate); s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); } @@ -287,8 +289,10 @@ MACHINE_START(SMDK4212, "SMDK4212") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = smdk4x12_map_io, + .handle_irq = gic_handle_irq, .init_machine = smdk4x12_machine_init, .timer = &exynos4_timer, + .restart = exynos4_restart, MACHINE_END MACHINE_START(SMDK4412, "SMDK4412") @@ -297,6 +301,8 @@ MACHINE_START(SMDK4412, "SMDK4412") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = smdk4x12_map_io, + .handle_irq = gic_handle_irq, .init_machine = smdk4x12_machine_init, .timer = &exynos4_timer, + .restart = exynos4_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c index 25a5a40..b2c5557 100644 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ b/arch/arm/mach-exynos/mach-smdkv310.c @@ -21,13 +21,13 @@ #include <linux/pwm_backlight.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <video/platform_lcd.h> #include <plat/regs-serial.h> #include <plat/regs-srom.h> #include <plat/regs-fb-v4.h> -#include <plat/exynos4.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/fb.h> @@ -44,6 +44,8 @@ #include <mach/map.h> #include <mach/ohci.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -130,9 +132,7 @@ static void lcd_lte480wv_set_power(struct plat_lcd_data *pd, gpio_free(EXYNOS4_GPD0(1)); #endif /* fire nRESET on power up */ - gpio_request(EXYNOS4_GPX0(6), "GPX0"); - - gpio_direction_output(EXYNOS4_GPX0(6), 1); + gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0"); mdelay(100); gpio_set_value(EXYNOS4_GPX0(6), 0); @@ -344,7 +344,7 @@ static void s5p_tv_setup(void) static void __init smdkv310_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); } @@ -388,9 +388,11 @@ MACHINE_START(SMDKV310, "SMDKV310") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = smdkv310_map_io, + .handle_irq = gic_handle_irq, .init_machine = smdkv310_machine_init, .timer = &exynos4_timer, .reserve = &smdkv310_reserve, + .restart = exynos4_restart, MACHINE_END MACHINE_START(SMDKC210, "SMDKC210") @@ -398,6 +400,8 @@ MACHINE_START(SMDKC210, "SMDKC210") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = smdkv310_map_io, + .handle_irq = gic_handle_irq, .init_machine = smdkv310_machine_init, .timer = &exynos4_timer, + .restart = exynos4_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index a2a177f..37ac93e 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c @@ -24,10 +24,10 @@ #include <linux/i2c/atmel_mxt_ts.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <plat/regs-serial.h> -#include <plat/exynos4.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/iic.h> @@ -47,6 +47,8 @@ #include <media/s5p_fimc.h> #include <media/m5mols.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -608,8 +610,7 @@ static void __init universal_tsp_init(void) /* TSP_LDO_ON: XMDMADDR_11 */ gpio = EXYNOS4_GPE2(3); - gpio_request(gpio, "TSP_LDO_ON"); - gpio_direction_output(gpio, 1); + gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON"); gpio_export(gpio, 0); /* TSP_INT: XMDMADDR_7 */ @@ -669,8 +670,7 @@ static void __init universal_touchkey_init(void) i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ - gpio_request(gpio, "3_TOUCH_EN"); - gpio_direction_output(gpio, 1); + gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN"); } static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { @@ -992,7 +992,7 @@ static struct platform_device *universal_devices[] __initdata = { static void __init universal_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); } @@ -1000,9 +1000,7 @@ static void __init universal_map_io(void) void s5p_tv_setup(void) { /* direct HPD to HDMI chip */ - gpio_request(EXYNOS4_GPX3(7), "hpd-plug"); - - gpio_direction_input(EXYNOS4_GPX3(7)); + gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); @@ -1058,7 +1056,9 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") .atag_offset = 0x100, .init_irq = exynos4_init_irq, .map_io = universal_map_io, + .handle_irq = gic_handle_irq, .init_machine = universal_machine_init, .timer = &exynos4_timer, .reserve = &universal_reserve, + .restart = exynos4_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 69ffb2f..60bc45e 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -32,7 +32,6 @@ #include <plat/cpu.h> -extern unsigned int gic_bank_offset; extern void exynos4_secondary_startup(void); #define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \ @@ -65,31 +64,6 @@ static void __iomem *scu_base_addr(void) static DEFINE_SPINLOCK(boot_lock); -static void __cpuinit exynos4_gic_secondary_init(void) -{ - void __iomem *dist_base = S5P_VA_GIC_DIST + - (gic_bank_offset * smp_processor_id()); - void __iomem *cpu_base = S5P_VA_GIC_CPU + - (gic_bank_offset * smp_processor_id()); - int i; - - /* - * Deal with the banked PPI and SGI interrupts - disable all - * PPI interrupts, ensure all SGI interrupts are enabled. - */ - __raw_writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR); - __raw_writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET); - - /* - * Set priority on PPI and SGI interrupts - */ - for (i = 0; i < 32; i += 4) - __raw_writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4); - - __raw_writel(0xf0, cpu_base + GIC_CPU_PRIMASK); - __raw_writel(1, cpu_base + GIC_CPU_CTRL); -} - void __cpuinit platform_secondary_init(unsigned int cpu) { /* @@ -97,7 +71,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) * core (e.g. timer irq), then they will not have been enabled * for us: do so */ - exynos4_gic_secondary_init(); + gic_secondary_init(0); /* * let the primary processor know we're out of the diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 509a435..4093fea 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -23,6 +23,7 @@ #include <asm/cacheflush.h> #include <asm/hardware/cache-l2x0.h> +#include <asm/smp_scu.h> #include <plat/cpu.h> #include <plat/pm.h> @@ -213,27 +214,6 @@ static int exynos4_pm_add(struct sys_device *sysdev) return 0; } -/* This function copy from linux/arch/arm/kernel/smp_scu.c */ - -void exynos4_scu_enable(void __iomem *scu_base) -{ - u32 scu_ctrl; - - scu_ctrl = __raw_readl(scu_base); - /* already enabled? */ - if (scu_ctrl & 1) - return; - - scu_ctrl |= 1; - __raw_writel(scu_ctrl, scu_base); - - /* - * Ensure that the data accessed by CPU0 before the SCU was - * initialised is visible to the other CPUs. - */ - flush_cache_all(); -} - static unsigned long pll_base_rate; static void exynos4_restore_pll(void) @@ -402,7 +382,7 @@ static void exynos4_pm_resume(void) exynos4_restore_pll(); - exynos4_scu_enable(S5P_VA_SCU); + scu_enable(S5P_VA_SCU); #ifdef CONFIG_CACHE_L2X0 s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c index d5f1785..25b4536 100644 --- a/arch/arm/mach-footbridge/cats-hw.c +++ b/arch/arm/mach-footbridge/cats-hw.c @@ -86,9 +86,10 @@ fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi) MACHINE_START(CATS, "Chalice-CATS") /* Maintainer: Philip Blundell */ .atag_offset = 0x100, - .soft_reboot = 1, + .restart_mode = 's', .fixup = fixup_cats, .map_io = footbridge_map_io, .init_irq = footbridge_init_irq, .timer = &isa_timer, + .restart = footbridge_restart, MACHINE_END diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 38a44f9..41978ee 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -199,6 +199,33 @@ void __init footbridge_map_io(void) iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); } +void footbridge_restart(char mode, const char *cmd) +{ + if (mode == 's') { + /* Jump into the ROM */ + soft_restart(0x41000000); + } else { + /* + * Force the watchdog to do a CPU reset. + * + * After making sure that the watchdog is disabled + * (so we can change the timer registers) we first + * enable the timer to autoreload itself. Next, the + * timer interval is set really short and any + * current interrupt request is cleared (so we can + * see an edge transition). Finally, TIMER4 is + * enabled as the watchdog. + */ + *CSR_SA110_CNTL &= ~(1 << 13); + *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | + TIMER_CNTL_AUTORELOAD | + TIMER_CNTL_DIV16; + *CSR_TIMER4_LOAD = 0x2; + *CSR_TIMER4_CLR = 0; + *CSR_SA110_CNTL |= (1 << 13); + } +} + #ifdef CONFIG_FOOTBRIDGE_ADDIN static inline unsigned long fb_bus_sdram_offset(void) diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h index b05e662..c9767b8 100644 --- a/arch/arm/mach-footbridge/common.h +++ b/arch/arm/mach-footbridge/common.h @@ -8,3 +8,4 @@ extern void footbridge_map_io(void); extern void footbridge_init_irq(void); extern void isa_init_irq(unsigned int irq); +extern void footbridge_restart(char, const char *); diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c index 012210c..27716a7 100644 --- a/arch/arm/mach-footbridge/ebsa285.c +++ b/arch/arm/mach-footbridge/ebsa285.c @@ -21,5 +21,6 @@ MACHINE_START(EBSA285, "EBSA285") .map_io = footbridge_map_io, .init_irq = footbridge_init_irq, .timer = &footbridge_timer, + .restart = footbridge_restart, MACHINE_END diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h index 0b29315..a174a58 100644 --- a/arch/arm/mach-footbridge/include/mach/system.h +++ b/arch/arm/mach-footbridge/include/mach/system.h @@ -7,63 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/io.h> -#include <asm/hardware/dec21285.h> -#include <mach/hardware.h> -#include <asm/leds.h> -#include <asm/mach-types.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - if (mode == 's') { - /* - * Jump into the ROM - */ - cpu_reset(0x41000000); - } else { - if (machine_is_netwinder()) { - /* open up the SuperIO chip - */ - outb(0x87, 0x370); - outb(0x87, 0x370); - - /* aux function group 1 (logical device 7) - */ - outb(0x07, 0x370); - outb(0x07, 0x371); - - /* set GP16 for WD-TIMER output - */ - outb(0xe6, 0x370); - outb(0x00, 0x371); - - /* set a RED LED and toggle WD_TIMER for rebooting - */ - outb(0xc4, 0x338); - } else { - /* - * Force the watchdog to do a CPU reset. - * - * After making sure that the watchdog is disabled - * (so we can change the timer registers) we first - * enable the timer to autoreload itself. Next, the - * timer interval is set really short and any - * current interrupt request is cleared (so we can - * see an edge transition). Finally, TIMER4 is - * enabled as the watchdog. - */ - *CSR_SA110_CNTL &= ~(1 << 13); - *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | - TIMER_CNTL_AUTORELOAD | - TIMER_CNTL_DIV16; - *CSR_TIMER4_LOAD = 0x2; - *CSR_TIMER4_CLR = 0; - *CSR_SA110_CNTL |= (1 << 13); - } - } -} diff --git a/arch/arm/mach-footbridge/include/mach/vmalloc.h b/arch/arm/mach-footbridge/include/mach/vmalloc.h deleted file mode 100644 index 40ba78e..0000000 --- a/arch/arm/mach-footbridge/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-footbridge/include/mach/vmalloc.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - -#define VMALLOC_END 0xf0000000UL diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c index 0d3846f..80a1c5c 100644 --- a/arch/arm/mach-footbridge/netwinder-hw.c +++ b/arch/arm/mach-footbridge/netwinder-hw.c @@ -645,6 +645,32 @@ fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi) #endif } +static void netwinder_restart(char mode, const char *cmd) +{ + if (mode == 's') { + /* Jump into the ROM */ + soft_restart(0x41000000); + } else { + local_irq_disable(); + local_fiq_disable(); + + /* open up the SuperIO chip */ + outb(0x87, 0x370); + outb(0x87, 0x370); + + /* aux function group 1 (logical device 7) */ + outb(0x07, 0x370); + outb(0x07, 0x371); + + /* set GP16 for WD-TIMER output */ + outb(0xe6, 0x370); + outb(0x00, 0x371); + + /* set a RED LED and toggle WD_TIMER for rebooting */ + outb(0xc4, 0x338); + } +} + MACHINE_START(NETWINDER, "Rebel-NetWinder") /* Maintainer: Russell King/Rebel.com */ .atag_offset = 0x100, @@ -656,4 +682,5 @@ MACHINE_START(NETWINDER, "Rebel-NetWinder") .map_io = footbridge_map_io, .init_irq = footbridge_init_irq, .timer = &isa_timer, + .restart = netwinder_restart, MACHINE_END diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c index f41dba3..e1e9990 100644 --- a/arch/arm/mach-footbridge/personal.c +++ b/arch/arm/mach-footbridge/personal.c @@ -19,5 +19,6 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer") .map_io = footbridge_map_io, .init_irq = footbridge_init_irq, .timer = &footbridge_timer, + .restart = footbridge_restart, MACHINE_END diff --git a/arch/arm/mach-gemini/include/mach/vmalloc.h b/arch/arm/mach-gemini/include/mach/vmalloc.h deleted file mode 100644 index 45371eb..0000000 --- a/arch/arm/mach-gemini/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#define VMALLOC_END 0xf0000000UL diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index 51d4e44..f8a2f6b 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c @@ -242,3 +242,8 @@ void __init h720x_map_io(void) { iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc)); } + +void h720x_restart(char mode, const char *cmd) +{ + CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; +} diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h index 7dd5fa6..2489537 100644 --- a/arch/arm/mach-h720x/common.h +++ b/arch/arm/mach-h720x/common.h @@ -16,6 +16,7 @@ extern unsigned long h720x_gettimeoffset(void); extern void __init h720x_init_irq(void); extern void __init h720x_map_io(void); +extern void h720x_restart(char, const char *); #ifdef CONFIG_ARCH_H7202 extern struct sys_timer h7202_timer; diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c index 9886f19..5fdb20c 100644 --- a/arch/arm/mach-h720x/h7201-eval.c +++ b/arch/arm/mach-h720x/h7201-eval.c @@ -34,4 +34,5 @@ MACHINE_START(H7201, "Hynix GMS30C7201") .init_irq = h720x_init_irq, .timer = &h7201_timer, .dma_zone_size = SZ_256M, + .restart = h720x_restart, MACHINE_END diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c index 284a134..1696730 100644 --- a/arch/arm/mach-h720x/h7202-eval.c +++ b/arch/arm/mach-h720x/h7202-eval.c @@ -77,4 +77,5 @@ MACHINE_START(H7202, "Hynix HMS30C7202") .timer = &h7202_timer, .init_machine = init_eval_h7202, .dma_zone_size = SZ_256M, + .restart = h720x_restart, MACHINE_END diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h index a708d24..16ac46e 100644 --- a/arch/arm/mach-h720x/include/mach/system.h +++ b/arch/arm/mach-h720x/include/mach/system.h @@ -24,10 +24,4 @@ static void arch_idle(void) nop(); } - -static __inline__ void arch_reset(char mode, const char *cmd) -{ - CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; -} - #endif diff --git a/arch/arm/mach-h720x/include/mach/vmalloc.h b/arch/arm/mach-h720x/include/mach/vmalloc.h deleted file mode 100644 index 8520b4a..0000000 --- a/arch/arm/mach-h720x/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-h720x/include/mach/vmalloc.h - */ - -#ifndef __ARCH_ARM_VMALLOC_H -#define __ARCH_ARM_VMALLOC_H - -#define VMALLOC_END 0xd0000000UL - -#endif diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h index 7e33fc9..d8e2d0b 100644 --- a/arch/arm/mach-highbank/core.h +++ b/arch/arm/mach-highbank/core.h @@ -1,5 +1,6 @@ extern void highbank_set_cpu_jump(int cpu, void *jump_addr); extern void highbank_clocks_init(void); +extern void highbank_restart(char, const char *); extern void __iomem *scu_base_addr; #ifdef CONFIG_DEBUG_HIGHBANK_UART extern void highbank_lluart_map_io(void); diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 88660d5..804c4a5 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -144,6 +144,8 @@ DT_MACHINE_START(HIGHBANK, "Highbank") .map_io = highbank_map_io, .init_irq = highbank_init_irq, .timer = &highbank_timer, + .handle_irq = gic_handle_irq, .init_machine = highbank_init, .dt_compat = highbank_match, + .restart = highbank_restart, MACHINE_END diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S index 73c1129..a14f9e6 100644 --- a/arch/arm/mach-highbank/include/mach/entry-macro.S +++ b/arch/arm/mach-highbank/include/mach/entry-macro.S @@ -1,5 +1,3 @@ -#include <asm/hardware/entry-macro-gic.S> - .macro disable_fiq .endm diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h index 7e81922..b1d8b5f 100644 --- a/arch/arm/mach-highbank/include/mach/system.h +++ b/arch/arm/mach-highbank/include/mach/system.h @@ -21,6 +21,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -extern void arch_reset(char mode, const char *cmd); - #endif diff --git a/arch/arm/mach-highbank/include/mach/vmalloc.h b/arch/arm/mach-highbank/include/mach/vmalloc.h deleted file mode 100644 index 1969e95..0000000 --- a/arch/arm/mach-highbank/include/mach/vmalloc.h +++ /dev/null @@ -1 +0,0 @@ -#define VMALLOC_END 0xFEE00000UL diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c index 53f0c4c..82c27230 100644 --- a/arch/arm/mach-highbank/system.c +++ b/arch/arm/mach-highbank/system.c @@ -20,7 +20,7 @@ #include "core.h" #include "sysregs.h" -void arch_reset(char mode, const char *cmd) +void highbank_restart(char mode, const char *cmd) { if (mode == 'h') hignbank_set_pwr_hard_reset(); diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index c44aa97..35a218c 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -132,7 +132,7 @@ config MACH_MX25_3DS select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX -config MACH_EUKREA_CPUIMX25 +config MACH_EUKREA_CPUIMX25SD bool "Support Eukrea CPUIMX25 Platform" select SOC_IMX25 select IMX_HAVE_PLATFORM_FLEXCAN @@ -148,7 +148,7 @@ config MACH_EUKREA_CPUIMX25 choice prompt "Baseboard" - depends on MACH_EUKREA_CPUIMX25 + depends on MACH_EUKREA_CPUIMX25SD default MACH_EUKREA_MBIMXSD25_BASEBOARD config MACH_EUKREA_MBIMXSD25_BASEBOARD @@ -542,7 +542,7 @@ config MACH_MX35_3DS Include support for MX35PDK platform. This includes specific configurations for the board and its peripherals. -config MACH_EUKREA_CPUIMX35 +config MACH_EUKREA_CPUIMX35SD bool "Support Eukrea CPUIMX35 Platform" select SOC_IMX35 select IMX_HAVE_PLATFORM_FLEXCAN @@ -560,7 +560,7 @@ config MACH_EUKREA_CPUIMX35 choice prompt "Baseboard" - depends on MACH_EUKREA_CPUIMX35 + depends on MACH_EUKREA_CPUIMX35SD default MACH_EUKREA_MBIMXSD35_BASEBOARD config MACH_EUKREA_MBIMXSD35_BASEBOARD @@ -596,12 +596,12 @@ comment "i.MX6 family:" config SOC_IMX6Q bool "i.MX6 Quad support" select ARM_GIC - select CACHE_L2X0 select CPU_V7 select HAVE_ARM_SCU select HAVE_IMX_GPC select HAVE_IMX_MMDC select HAVE_IMX_SRC + select HAVE_SMP select USE_OF help diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index aba7321..d97f409 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o # i.MX25 based machines obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o -obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o +obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o # i.MX27 based machines @@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o # i.MX35 based machines obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o -obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o +obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c index 8116f11..ac8238c 100644 --- a/arch/arm/mach-imx/clock-imx35.c +++ b/arch/arm/mach-imx/clock-imx35.c @@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = { int __init mx35_clocks_init() { - unsigned int cgr2 = 3 << 26, cgr3 = 0; + unsigned int cgr2 = 3 << 26; #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) cgr2 |= 3 << 16; @@ -521,6 +521,12 @@ int __init mx35_clocks_init() __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), CCM_BASE + CCM_CGR1); + __raw_writel(cgr2, CCM_BASE + CCM_CGR2); + __raw_writel(0, CCM_BASE + CCM_CGR3); + + clk_enable(&iim_clk); + imx_print_silicon_rev("i.MX35", mx35_revision()); + clk_disable(&iim_clk); /* * Check if we came up in internal boot mode. If yes, we need some @@ -529,17 +535,11 @@ int __init mx35_clocks_init() */ if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { /* Additionally turn on UART1, SCC, and IIM clocks */ - cgr2 |= 3 << 16 | 3 << 4; - cgr3 |= 3 << 2; + clk_enable(&iim_clk); + clk_enable(&uart1_clk); + clk_enable(&scc_clk); } - __raw_writel(cgr2, CCM_BASE + CCM_CGR2); - __raw_writel(cgr3, CCM_BASE + CCM_CGR3); - - clk_enable(&iim_clk); - imx_print_silicon_rev("i.MX35", mx35_revision()); - clk_disable(&iim_clk); - #ifdef CONFIG_MXC_USE_EPIT epit_timer_init(&epit1_clk, MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 039a7ab..9273c2a 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -1931,14 +1931,12 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) val |= 0x1 << BP_CLPCR_LPM; val &= ~BM_CLPCR_VSTBY; val &= ~BM_CLPCR_SBYOS; - val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; break; case STOP_POWER_OFF: val |= 0x2 << BP_CLPCR_LPM; val |= 0x3 << BP_CLPCR_STBY_COUNT; val |= BM_CLPCR_VSTBY; val |= BM_CLPCR_SBYOS; - val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; break; default: return -EINVAL; diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index 1e486e6..146a4f0 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c @@ -139,4 +139,5 @@ MACHINE_START(APF9328, "Armadeus APF9328") .handle_irq = imx1_handle_irq, .timer = &apf9328_timer, .init_machine = apf9328_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index c9a9cf6..e4f426a 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c @@ -561,4 +561,5 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500") .handle_irq = imx31_handle_irq, .timer = &armadillo5x0_timer, .init_machine = armadillo5x0_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c index 313f62d..9a98977 100644 --- a/arch/arm/mach-imx/mach-bug.c +++ b/arch/arm/mach-imx/mach-bug.c @@ -65,4 +65,5 @@ MACHINE_START(BUG, "BugLabs BUGBase") .handle_irq = imx31_handle_irq, .timer = &bug_timer, .init_machine = bug_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index edb3730..d085aea 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -318,4 +318,5 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27") .handle_irq = imx27_handle_irq, .timer = &eukrea_cpuimx27_timer, .init_machine = eukrea_cpuimx27_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index 66af2e8..8ecc872 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c @@ -53,12 +53,18 @@ static const struct imxi2c_platform_data .bitrate = 100000, }; +#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2) +static int tsc2007_get_pendown_state(void) +{ + return !gpio_get_value(TSC2007_IRQGPIO); +} + static struct tsc2007_platform_data tsc2007_info = { .model = 2007, .x_plate_ohms = 180, + .get_pendown_state = tsc2007_get_pendown_state, }; -#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 2) static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { { I2C_BOARD_INFO("pcf8563", 0x51), @@ -201,4 +207,5 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35") .handle_irq = imx35_handle_irq, .timer = &eukrea_cpuimx35_timer, .init_machine = eukrea_cpuimx35_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index ab8fbcc..76a97a5 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c @@ -170,4 +170,5 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25") .handle_irq = imx25_handle_irq, .timer = &eukrea_cpuimx25_timer, .init_machine = eukrea_cpuimx25_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 38eb9e4..c2766ae 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -282,4 +282,5 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") .handle_irq = imx27_handle_irq, .timer = &visstrim_m10_timer, .init_machine = visstrim_m10_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index 7052155..c9d350c 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c @@ -78,4 +78,5 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM") .handle_irq = imx27_handle_irq, .timer = &mx27ipcam_timer, .init_machine = mx27ipcam_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 8d6a635..1f45b91 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c @@ -84,4 +84,5 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") .handle_irq = imx27_handle_irq, .timer = &mx27lite_timer, .init_machine = mx27lite_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 8deb012..05b49bb 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -10,10 +10,13 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include <linux/delay.h> #include <linux/init.h> +#include <linux/io.h> #include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/of.h> +#include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/of_platform.h> #include <asm/hardware/cache-l2x0.h> @@ -23,6 +26,36 @@ #include <mach/common.h> #include <mach/hardware.h> +void imx6q_restart(char mode, const char *cmd) +{ + struct device_node *np; + void __iomem *wdog_base; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt"); + wdog_base = of_iomap(np, 0); + if (!wdog_base) + goto soft; + + imx_src_prepare_restart(); + + /* enable wdog */ + writew_relaxed(1 << 2, wdog_base); + /* write twice to ensure the request will not get ignored */ + writew_relaxed(1 << 2, wdog_base); + + /* wait for reset to assert ... */ + mdelay(500); + + pr_err("Watchdog reset failed to assert reset\n"); + + /* delay to allow the serial port to show the message */ + mdelay(50); + +soft: + /* we'll take a jump through zero as a poor second */ + soft_restart(0); +} + static void __init imx6q_init_machine(void) { of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); @@ -83,4 +116,5 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)") .timer = &imx6q_timer, .init_machine = imx6q_init_machine, .dt_compat = imx6q_dt_compat, + .restart = imx6q_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 5f37f89..fc78e80 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c @@ -279,4 +279,5 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") .handle_irq = imx31_handle_irq, .timer = &kzm_timer, .init_machine = kzm_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index fc49785..9704608 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c @@ -147,6 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") .handle_irq = imx1_handle_irq, .timer = &mx1ads_timer, .init_machine = mx1ads_init, + .restart = mxc_restart, MACHINE_END MACHINE_START(MXLADS, "Freescale MXLADS") @@ -157,4 +158,5 @@ MACHINE_START(MXLADS, "Freescale MXLADS") .handle_irq = imx1_handle_irq, .timer = &mx1ads_timer, .init_machine = mx1ads_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 25f8402..8d9f955 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -312,4 +312,5 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS") .handle_irq = imx21_handle_irq, .timer = &mx21ads_timer, .init_machine = mx21ads_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index 88dccf1..f267342 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c @@ -270,4 +270,5 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)") .handle_irq = imx25_handle_irq, .timer = &mx25pdk_timer, .init_machine = mx25pdk_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index ba232d7..18f3581 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -425,4 +425,5 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK") .handle_irq = imx27_handle_irq, .timer = &mx27pdk_timer, .init_machine = mx27pdk_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 74dd573..0228d2e 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -351,4 +351,5 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS") .handle_irq = imx27_handle_irq, .timer = &mx27ads_timer, .init_machine = mx27ads_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index b8c54b8..2b565c3 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -770,4 +770,5 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") .timer = &mx31_3ds_timer, .init_machine = mx31_3ds_init, .reserve = mx31_3ds_reserve, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index 9cc1a49..4917aab 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c @@ -542,4 +542,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS") .handle_irq = imx31_handle_irq, .timer = &mx31ads_timer, .init_machine = mx31ads_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 102ec99..02401bb 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c @@ -303,4 +303,5 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131") .handle_irq = imx31_handle_irq, .timer = &mx31lilly_timer, .init_machine = mx31lilly_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index 5366d2d..ef80751 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -287,4 +287,5 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") .handle_irq = imx31_handle_irq, .timer = &mx31lite_timer, .init_machine = mx31lite_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 9326915..b95981d 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -600,4 +600,5 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") .handle_irq = imx31_handle_irq, .timer = &mx31moboard_timer, .init_machine = mx31moboard_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 7a46202..0af6c9c 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c @@ -224,4 +224,5 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK") .handle_irq = imx35_handle_irq, .timer = &mx35pdk_timer, .init_machine = mx35_3ds_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 125c196..8b3d3f0 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -274,4 +274,5 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") .handle_irq = imx27_handle_irq, .timer = &mxt_td60_timer, .init_machine = mxt_td60_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 26072f4..d3b9c6b 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -442,4 +442,5 @@ MACHINE_START(PCA100, "phyCARD-i.MX27") .handle_irq = imx27_handle_irq, .init_machine = pca100_init, .timer = &pca100_timer, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index efd6b53..d7e1516 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c @@ -696,4 +696,5 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") .handle_irq = imx31_handle_irq, .timer = &pcm037_timer, .init_machine = pcm037_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index a17e9c7..16f126d 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -357,4 +357,5 @@ MACHINE_START(PCM038, "phyCORE-i.MX27") .handle_irq = imx27_handle_irq, .timer = &pcm038_timer, .init_machine = pcm038_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index 7366c2a..06dc106 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c @@ -425,4 +425,5 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043") .handle_irq = imx35_handle_irq, .timer = &pcm043_timer, .init_machine = pcm043_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index 4ff5faf..2606210 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c @@ -273,4 +273,5 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") .handle_irq = imx31_handle_irq, .timer = &qong_timer, .init_machine = qong_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index bb6e5b2..cb9ceae 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c @@ -144,4 +144,5 @@ MACHINE_START(SCB9328, "Synertronixx scb9328") .handle_irq = imx1_handle_irq, .timer = &scb9328_timer, .init_machine = scb9328_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index 6909245..033257e 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c @@ -322,4 +322,5 @@ MACHINE_START(VPR200, "VPR200") .handle_irq = imx35_handle_irq, .timer = &vpr200_timer, .init_machine = vpr200_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index a8e3368..4bde04f 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c @@ -19,6 +19,7 @@ #define SRC_SCR 0x000 #define SRC_GPR1 0x020 +#define BP_SRC_SCR_WARM_RESET_ENABLE 0 #define BP_SRC_SCR_CORE1_RST 14 #define BP_SRC_SCR_CORE1_ENABLE 22 @@ -46,11 +47,33 @@ void imx_set_cpu_jump(int cpu, void *jump_addr) src_base + SRC_GPR1 + cpu * 8); } +void imx_src_prepare_restart(void) +{ + u32 val; + + /* clear enable bits of secondary cores */ + val = readl_relaxed(src_base + SRC_SCR); + val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE); + writel_relaxed(val, src_base + SRC_SCR); + + /* clear persistent entry register of primary core */ + writel_relaxed(0, src_base + SRC_GPR1); +} + void __init imx_src_init(void) { struct device_node *np; + u32 val; np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); src_base = of_iomap(np, 0); WARN_ON(!src_base); + + /* + * force warm reset sources to generate cold reset + * for a more reliable restart + */ + val = readl_relaxed(src_base + SRC_SCR); + val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE); + writel_relaxed(val, src_base + SRC_SCR); } diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index dfd18f3..350e266 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -6,6 +6,8 @@ config ARCH_INTEGRATOR_AP bool "Support Integrator/AP and Integrator/PP2 platforms" select CLKSRC_MMIO select MIGHT_HAVE_PCI + select SERIAL_AMBA_PL010 + select SERIAL_AMBA_PL010_CONSOLE help Include support for the ARM(R) Integrator/AP and Integrator/PP2 platforms. @@ -15,6 +17,8 @@ config ARCH_INTEGRATOR_CP select ARCH_CINTEGRATOR select ARM_TIMER_SP804 select PLAT_VERSATILE_CLCD + select SERIAL_AMBA_PL011 + select SERIAL_AMBA_PL011_CONSOLE help Include support for the ARM(R) Integrator CP platform. diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h index a08f9b0..899561d 100644 --- a/arch/arm/mach-integrator/common.h +++ b/arch/arm/mach-integrator/common.h @@ -1,2 +1,3 @@ void integrator_init_early(void); void integrator_reserve(void); +void integrator_restart(char, const char *); diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 4b38e13..019f0ab 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -29,6 +29,7 @@ #include <mach/cm.h> #include <asm/system.h> #include <asm/leds.h> +#include <asm/mach-types.h> #include <asm/mach/time.h> #include <asm/pgtable.h> @@ -44,7 +45,6 @@ static struct amba_device rtc_device = { .flags = IORESOURCE_MEM, }, .irq = { IRQ_RTCINT, NO_IRQ }, - .periphid = 0x00041030, }; static struct amba_device uart0_device = { @@ -58,7 +58,6 @@ static struct amba_device uart0_device = { .flags = IORESOURCE_MEM, }, .irq = { IRQ_UARTINT0, NO_IRQ }, - .periphid = 0x0041010, }; static struct amba_device uart1_device = { @@ -72,7 +71,6 @@ static struct amba_device uart1_device = { .flags = IORESOURCE_MEM, }, .irq = { IRQ_UARTINT1, NO_IRQ }, - .periphid = 0x0041010, }; static struct amba_device kmi0_device = { @@ -85,7 +83,6 @@ static struct amba_device kmi0_device = { .flags = IORESOURCE_MEM, }, .irq = { IRQ_KMIINT0, NO_IRQ }, - .periphid = 0x00041050, }; static struct amba_device kmi1_device = { @@ -98,7 +95,6 @@ static struct amba_device kmi1_device = { .flags = IORESOURCE_MEM, }, .irq = { IRQ_KMIINT1, NO_IRQ }, - .periphid = 0x00041050, }; static struct amba_device *amba_devs[] __initdata = { @@ -157,6 +153,19 @@ static int __init integrator_init(void) { int i; + /* + * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to + * hard-code them. The Integator/CP and forward have proper cell IDs. + * Else we leave them undefined to the bus driver can autoprobe them. + */ + if (machine_is_integrator()) { + rtc_device.periphid = 0x00041030; + uart0_device.periphid = 0x00041010; + uart1_device.periphid = 0x00041010; + kmi0_device.periphid = 0x00041050; + kmi1_device.periphid = 0x00041050; + } + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { struct amba_device *d = amba_devs[i]; amba_device_register(d, &iomem_resource); @@ -238,3 +247,11 @@ void __init integrator_reserve(void) { memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); } + +/* + * To reset, we hit the on-board reset register in the system FPGA + */ +void integrator_restart(char mode, const char *cmd) +{ + cm_control(CM_CTRL_RESET, CM_CTRL_RESET); +} diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h index e1551b8..901514e 100644 --- a/arch/arm/mach-integrator/include/mach/system.h +++ b/arch/arm/mach-integrator/include/mach/system.h @@ -21,8 +21,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/cm.h> - static inline void arch_idle(void) { /* @@ -32,13 +30,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - cm_control(CM_CTRL_RESET, CM_CTRL_RESET); -} - #endif diff --git a/arch/arm/mach-integrator/include/mach/vmalloc.h b/arch/arm/mach-integrator/include/mach/vmalloc.h deleted file mode 100644 index 2f5a2baf..0000000 --- a/arch/arm/mach-integrator/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-integrator/include/mach/vmalloc.h - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xd0000000UL diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index a1769f3..21a1d6c 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -472,4 +472,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator") .init_irq = ap_init_irq, .timer = &ap_timer, .init_machine = ap_init, + .restart = integrator_restart, MACHINE_END diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 5de49c3..3a730d44 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -499,4 +499,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") .init_irq = intcp_init_irq, .timer = &cp_timer, .init_machine = intcp_init, + .restart = integrator_restart, MACHINE_END diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h index 52b7fab..07e9ff7 100644 --- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h +++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h @@ -10,6 +10,7 @@ void iop13xx_map_io(void); void iop13xx_platform_init(void); void iop13xx_add_tpmi_devices(void); void iop13xx_init_irq(void); +void iop13xx_restart(char, const char *); /* CPUID CP6 R0 Page 0 */ static inline int iop13xx_cpu_id(void) diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h index d0c66ef..1f31ed3 100644 --- a/arch/arm/mach-iop13xx/include/mach/system.h +++ b/arch/arm/mach-iop13xx/include/mach/system.h @@ -7,21 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <mach/iop13xx.h> static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * Reset the internal bus (warning both cores are reset) - */ - write_wdtcr(IOP_WDTCR_EN_ARM); - write_wdtcr(IOP_WDTCR_EN); - write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); - write_wdtcr(0x1000); - - for(;;); -} diff --git a/arch/arm/mach-iop13xx/include/mach/vmalloc.h b/arch/arm/mach-iop13xx/include/mach/vmalloc.h deleted file mode 100644 index c534567..0000000 --- a/arch/arm/mach-iop13xx/include/mach/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _VMALLOC_H_ -#define _VMALLOC_H_ -#define VMALLOC_END 0xfa000000UL -#endif diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 4cf2cc4..abaee88 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -96,4 +96,5 @@ MACHINE_START(IQ81340MC, "Intel IQ81340MC") .init_irq = iop13xx_init_irq, .timer = &iq81340mc_timer, .init_machine = iq81340mc_init, + .restart = iop13xx_restart, MACHINE_END diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index cd9e274..690916a 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -98,4 +98,5 @@ MACHINE_START(IQ81340SC, "Intel IQ81340SC") .init_irq = iop13xx_init_irq, .timer = &iq81340sc_timer, .init_machine = iq81340sc_init, + .restart = iop13xx_restart, MACHINE_END diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index a5b9897..daabb1f 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c @@ -606,3 +606,14 @@ static int __init iop13xx_init_adma_setup(char *str) __setup("iop13xx_init_adma", iop13xx_init_adma_setup); __setup("iop13xx_init_uart", iop13xx_init_uart_setup); __setup("iop13xx_init_i2c", iop13xx_init_i2c_setup); + +void iop13xx_restart(char mode, const char *cmd) +{ + /* + * Reset the internal bus (warning both cores are reset) + */ + write_wdtcr(IOP_WDTCR_EN_ARM); + write_wdtcr(IOP_WDTCR_EN); + write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); + write_wdtcr(0x1000); +} diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c index 4325055..24069e0 100644 --- a/arch/arm/mach-iop32x/em7210.c +++ b/arch/arm/mach-iop32x/em7210.c @@ -208,4 +208,5 @@ MACHINE_START(EM7210, "Lanner EM7210") .init_irq = iop32x_init_irq, .timer = &em7210_timer, .init_machine = em7210_init_machine, + .restart = iop3xx_restart, MACHINE_END diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index 0edc880..204e1d1 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c @@ -212,4 +212,5 @@ MACHINE_START(GLANTANK, "GLAN Tank") .init_irq = iop32x_init_irq, .timer = &glantank_timer, .init_machine = glantank_init_machine, + .restart = iop3xx_restart, MACHINE_END diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h index 059c783..2d88264 100644 --- a/arch/arm/mach-iop32x/include/mach/io.h +++ b/arch/arm/mach-iop32x/include/mach/io.h @@ -13,15 +13,8 @@ #include <asm/hardware/iop3xx.h> -extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype); -extern void __iop3xx_iounmap(void __iomem *addr); - #define IO_SPACE_LIMIT 0xffffffff #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) #define __mem_pci(a) (a) -#define __arch_ioremap __iop3xx_ioremap -#define __arch_iounmap __iop3xx_iounmap - #endif diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h index a4b808f..4a88727 100644 --- a/arch/arm/mach-iop32x/include/mach/system.h +++ b/arch/arm/mach-iop32x/include/mach/system.h @@ -7,28 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <asm/mach-types.h> -#include <asm/hardware/iop3xx.h> -#include <mach/n2100.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - local_irq_disable(); - - if (machine_is_n2100()) { - gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW); - gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT); - while (1) - ; - } - - *IOP3XX_PCSR = 0x30; - - /* Jump into ROM at address 0 */ - cpu_reset(0); -} diff --git a/arch/arm/mach-iop32x/include/mach/vmalloc.h b/arch/arm/mach-iop32x/include/mach/vmalloc.h deleted file mode 100644 index c4862d4..0000000 --- a/arch/arm/mach-iop32x/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000UL diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index 9e7aacc..3eb642a 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c @@ -318,6 +318,7 @@ MACHINE_START(IQ31244, "Intel IQ31244") .init_irq = iop32x_init_irq, .timer = &iq31244_timer, .init_machine = iq31244_init_machine, + .restart = iop3xx_restart, MACHINE_END /* There should have been an ep80219 machine identifier from the beginning. @@ -332,4 +333,5 @@ MACHINE_START(EP80219, "Intel EP80219") .init_irq = iop32x_init_irq, .timer = &iq31244_timer, .init_machine = iq31244_init_machine, + .restart = iop3xx_restart, MACHINE_END diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 53ea86f..2ec724b 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c @@ -191,4 +191,5 @@ MACHINE_START(IQ80321, "Intel IQ80321") .init_irq = iop32x_init_irq, .timer = &iq80321_timer, .init_machine = iq80321_init_machine, + .restart = iop3xx_restart, MACHINE_END diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index d726927..6b6d559 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c @@ -291,6 +291,14 @@ static void n2100_power_off(void) ; } +static void n2100_restart(char mode, const char *cmd) +{ + gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW); + gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT); + while (1) + ; +} + static struct timer_list power_button_poll_timer; @@ -332,4 +340,5 @@ MACHINE_START(N2100, "Thecus N2100") .init_irq = iop32x_init_irq, .timer = &n2100_timer, .init_machine = n2100_init_machine, + .restart = n2100_restart, MACHINE_END diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h index 39e893e..a8a66fc 100644 --- a/arch/arm/mach-iop33x/include/mach/io.h +++ b/arch/arm/mach-iop33x/include/mach/io.h @@ -13,15 +13,8 @@ #include <asm/hardware/iop3xx.h> -extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype); -extern void __iop3xx_iounmap(void __iomem *addr); - #define IO_SPACE_LIMIT 0xffffffff #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) #define __mem_pci(a) (a) -#define __arch_ioremap __iop3xx_ioremap -#define __arch_iounmap __iop3xx_iounmap - #endif diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h index f192a34..4f98e76 100644 --- a/arch/arm/mach-iop33x/include/mach/system.h +++ b/arch/arm/mach-iop33x/include/mach/system.h @@ -7,17 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <asm/hardware/iop3xx.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - *IOP3XX_PCSR = 0x30; - - /* Jump into ROM at address 0 */ - cpu_reset(0); -} diff --git a/arch/arm/mach-iop33x/include/mach/vmalloc.h b/arch/arm/mach-iop33x/include/mach/vmalloc.h deleted file mode 100644 index 48331dc..0000000 --- a/arch/arm/mach-iop33x/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-iop33x/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000UL diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index 9e14ccc..abce934 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c @@ -146,4 +146,5 @@ MACHINE_START(IQ80331, "Intel IQ80331") .init_irq = iop33x_init_irq, .timer = &iq80331_timer, .init_machine = iq80331_init_machine, + .restart = iop3xx_restart, MACHINE_END diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 09c899a..7513559 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c @@ -146,4 +146,5 @@ MACHINE_START(IQ80332, "Intel IQ80332") .init_irq = iop33x_init_irq, .timer = &iq80332_timer, .init_machine = iq80332_init_machine, + .restart = iop3xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 24f0fe3..81c4537 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -515,3 +515,7 @@ void __init ixp2000_init_irq(void) } } +void ixp2000_restart(char mode, const char *cmd) +{ + ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); +} diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c index af99945..ee52541 100644 --- a/arch/arm/mach-ixp2000/enp2611.c +++ b/arch/arm/mach-ixp2000/enp2611.c @@ -259,6 +259,7 @@ MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board") .init_irq = ixp2000_init_irq, .timer = &enp2611_timer, .init_machine = enp2611_init_machine, + .restart = ixp2000_restart, MACHINE_END diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h index 42182c79..bb0f8dc 100644 --- a/arch/arm/mach-ixp2000/include/mach/platform.h +++ b/arch/arm/mach-ixp2000/include/mach/platform.h @@ -122,6 +122,7 @@ void ixp2000_map_io(void); void ixp2000_uart_init(void); void ixp2000_init_irq(void); void ixp2000_init_time(unsigned long); +void ixp2000_restart(char, const char *); unsigned long ixp2000_gettimeoffset(void); struct pci_sys_data; diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h index de37099..a7fb08b 100644 --- a/arch/arm/mach-ixp2000/include/mach/system.h +++ b/arch/arm/mach-ixp2000/include/mach/system.h @@ -8,42 +8,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - -#include <mach/hardware.h> -#include <asm/mach-types.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - local_irq_disable(); - - /* - * Reset flash banking register so that we are pointing at - * RedBoot bank. - */ - if (machine_is_ixdp2401()) { - ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, - ((0 >> IXDP2X01_FLASH_WINDOW_BITS) - | IXDP2X01_CPLD_FLASH_INTERN)); - ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); - } - - /* - * On IXDP2801 we need to write this magic sequence to the CPLD - * to cause a complete reset of the CPU and all external devices - * and move the flash bank register back to 0. - */ - if (machine_is_ixdp2801() || machine_is_ixdp28x5()) { - unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; - - reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); - ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); - ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); - } - - ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); -} diff --git a/arch/arm/mach-ixp2000/include/mach/vmalloc.h b/arch/arm/mach-ixp2000/include/mach/vmalloc.h deleted file mode 100644 index 61c8dae..0000000 --- a/arch/arm/mach-ixp2000/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-ixp2000/include/mach/vmalloc.h - * - * Author: Naeem Afzal <naeem.m.afzal@intel.com> - * - * Copyright 2002 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 8MB value just means that there will be a 8MB "hole" after the - * physical memory until the kernel virtual memory starts. That means that - * any out-of-bounds memory accesses will hopefully be caught. - * The vmalloc() routines leaves a hole of 4kB between each vmalloced - * area for the same reason. ;) - */ -#define VMALLOC_END 0xfb000000UL diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c index f7dfd97..f53e911 100644 --- a/arch/arm/mach-ixp2000/ixdp2400.c +++ b/arch/arm/mach-ixp2000/ixdp2400.c @@ -176,5 +176,6 @@ MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform") .init_irq = ixdp2400_init_irq, .timer = &ixdp2400_timer, .init_machine = ixdp2x00_init_machine, + .restart = ixp2000_restart, MACHINE_END diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c index d33bcac..a2e7c39 100644 --- a/arch/arm/mach-ixp2000/ixdp2800.c +++ b/arch/arm/mach-ixp2000/ixdp2800.c @@ -291,5 +291,6 @@ MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform") .init_irq = ixdp2800_init_irq, .timer = &ixdp2800_timer, .init_machine = ixdp2x00_init_machine, + .restart = ixp2000_restart, MACHINE_END diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 61a2867..7632bea 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -413,6 +413,35 @@ static void __init ixdp2x01_init_machine(void) ixdp2x01_uart_init(); } +static void ixdp2401_restart(char mode, const char *cmd) +{ + /* + * Reset flash banking register so that we are pointing at + * RedBoot bank. + */ + ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, + ((0 >> IXDP2X01_FLASH_WINDOW_BITS) + | IXDP2X01_CPLD_FLASH_INTERN)); + ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); + + ixp2000_restart(mode, cmd); +} + +static void ixdp280x_restart(char mode, const char *cmd) +{ + /* + * On IXDP2801 we need to write this magic sequence to the CPLD + * to cause a complete reset of the CPU and all external devices + * and move the flash bank register back to 0. + */ + unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; + + reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); + ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); + ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); + + ixp2000_restart(mode, cmd); +} #ifdef CONFIG_ARCH_IXDP2401 MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") @@ -422,6 +451,7 @@ MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") .init_irq = ixdp2x01_init_irq, .timer = &ixdp2x01_timer, .init_machine = ixdp2x01_init_machine, + .restart = ixdp2401_restart, MACHINE_END #endif @@ -433,6 +463,7 @@ MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform") .init_irq = ixdp2x01_init_irq, .timer = &ixdp2x01_timer, .init_machine = ixdp2x01_init_machine, + .restart = ixdp280x_restart, MACHINE_END /* @@ -446,6 +477,7 @@ MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform") .init_irq = ixdp2x01_init_irq, .timer = &ixdp2x01_timer, .init_machine = ixdp2x01_init_machine, + .restart = ixdp280x_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index a1bee33..0923bb9 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -444,3 +444,9 @@ void __init ixp23xx_sys_init(void) *IXP23XX_EXP_UNIT_FUSE |= 0xf; platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); } + +void ixp23xx_restart(char mode, const char *cmd) +{ + /* Use on-chip reset capability */ + *IXP23XX_RESET0 |= IXP23XX_RST_ALL; +} diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index 30dd316..8f2487e 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c @@ -90,4 +90,5 @@ MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso") .timer = &ixp23xx_timer, .atag_offset = 0x100, .init_machine = espresso_init, + .restart = ixp23xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h index a1749d0..4ce4353 100644 --- a/arch/arm/mach-ixp23xx/include/mach/io.h +++ b/arch/arm/mach-ixp23xx/include/mach/io.h @@ -20,33 +20,4 @@ #define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) #define __mem_pci(a) (a) -static inline void __iomem * -ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype) -{ - if (addr >= IXP23XX_PCI_MEM_START && - addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) { - if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) - return NULL; - - return (void __iomem *) - ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT); - } - - return __arm_ioremap(addr, size, mtype); -} - -static inline void -ixp23xx_iounmap(void __iomem *addr) -{ - if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) && - (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE)) - return; - - __iounmap(addr); -} - -#define __arch_ioremap ixp23xx_ioremap -#define __arch_iounmap ixp23xx_iounmap - - #endif diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h index db9d941..50de558 100644 --- a/arch/arm/mach-ixp23xx/include/mach/platform.h +++ b/arch/arm/mach-ixp23xx/include/mach/platform.h @@ -34,6 +34,7 @@ struct pci_sys_data; void ixp23xx_map_io(void); void ixp23xx_init_irq(void); void ixp23xx_sys_init(void); +void ixp23xx_restart(char, const char *); int ixp23xx_pci_setup(int, struct pci_sys_data *); void ixp23xx_pci_preinit(void); struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h index 8920ff2..277dda7 100644 --- a/arch/arm/mach-ixp23xx/include/mach/system.h +++ b/arch/arm/mach-ixp23xx/include/mach/system.h @@ -7,10 +7,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - -#include <mach/hardware.h> -#include <asm/mach-types.h> - static inline void arch_idle(void) { #if 0 @@ -18,16 +14,3 @@ static inline void arch_idle(void) cpu_do_idle(); #endif } - -static inline void arch_reset(char mode, const char *cmd) -{ - /* First try machine specific support */ - if (machine_is_ixdp2351()) { - *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC; - (void) *IXDP2351_CPLD_RESET1_REG; - *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE; - } - - /* Use on-chip reset capability */ - *IXP23XX_RESET0 |= IXP23XX_RST_ALL; -} diff --git a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h b/arch/arm/mach-ixp23xx/include/mach/vmalloc.h deleted file mode 100644 index 896c56a..0000000 --- a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-ixp23xx/include/mach/vmalloc.h - * - * Copyright (c) 2005 MontaVista Software, Inc. - * - * NPU mappings end at 0xf0000000 and we allocate 64MB for board - * specific static I/O. - */ - -#define VMALLOC_END (0xec000000UL) diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index b3a57e0..5d5dd3e 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -326,6 +326,17 @@ static void __init ixdp2351_init(void) ixp23xx_sys_init(); } +static void ixdp2351_restart(char mode, const char *cmd) +{ + /* First try machine specific support */ + + *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC; + (void) *IXDP2351_CPLD_RESET1_REG; + *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE; + + ixp23xx_restart(mode, cmd); +} + MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") /* Maintainer: MontaVista Software, Inc. */ .map_io = ixdp2351_map_io, @@ -333,4 +344,5 @@ MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") .timer = &ixp23xx_timer, .atag_offset = 0x100, .init_machine = ixdp2351_init, + .restart = ixdp2351_restart, MACHINE_END diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index 8f4dcbb..377283f 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c @@ -177,4 +177,5 @@ MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform") .timer = &ixp23xx_timer, .atag_offset = 0x100, .init_machine = roadrunner_init, + .restart = ixp23xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c index 37609a2..a7277ad 100644 --- a/arch/arm/mach-ixp4xx/avila-setup.c +++ b/arch/arm/mach-ixp4xx/avila-setup.c @@ -172,6 +172,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END /* @@ -190,6 +191,7 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index b86a005..3841ab4 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -17,7 +17,6 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/serial.h> -#include <linux/sched.h> #include <linux/tty.h> #include <linux/platform_device.h> #include <linux/serial_core.h> @@ -403,18 +402,9 @@ void __init ixp4xx_sys_init(void) /* * sched_clock() */ -static DEFINE_CLOCK_DATA(cd); - -unsigned long long notrace sched_clock(void) -{ - u32 cyc = *IXP4XX_OSTS; - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace ixp4xx_update_sched_clock(void) +static u32 notrace ixp4xx_read_sched_clock(void) { - u32 cyc = *IXP4XX_OSTS; - update_sched_clock(&cd, cyc, (u32)~0); + return *IXP4XX_OSTS; } /* @@ -430,7 +420,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ; EXPORT_SYMBOL(ixp4xx_timer_freq); static void __init ixp4xx_clocksource_init(void) { - init_sched_clock(&cd, ixp4xx_update_sched_clock, 32, ixp4xx_timer_freq); + setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq); clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32, ixp4xx_clocksource_read); @@ -501,3 +491,23 @@ static void __init ixp4xx_clockevent_init(void) clockevents_register_device(&clockevent_ixp4xx); } + +void ixp4xx_restart(char mode, const char *cmd) +{ + if ( 1 && mode == 's') { + /* Jump into ROM at address 0 */ + soft_restart(0); + } else { + /* Use on-chip reset capability */ + + /* set the "key" register to enable access to + * "timer" and "enable" registers + */ + *IXP4XX_OSWK = IXP4XX_WDT_KEY; + + /* write 0 to the timer register for an immediate reset */ + *IXP4XX_OSWT = 0; + + *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; + } +} diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index 81dfec3..a74f86c 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c @@ -117,6 +117,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END #endif @@ -132,6 +133,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425") .timer = &ixp4xx_timer, .atag_offset = 0x100, .init_machine = coyote_init, + .restart = ixp4xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index 8837fbc..67be177 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c @@ -286,4 +286,5 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c index 2887c35..6d58182 100644 --- a/arch/arm/mach-ixp4xx/fsg-setup.c +++ b/arch/arm/mach-ixp4xx/fsg-setup.c @@ -277,5 +277,6 @@ MACHINE_START(FSG, "Freecom FSG-3") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c index d69d1b0..7ecf9b2 100644 --- a/arch/arm/mach-ixp4xx/gateway7001-setup.c +++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c @@ -104,5 +104,6 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index bf6678d..c0e3d69 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -504,4 +504,5 @@ MACHINE_START(GORAMO_MLR, "MultiLink") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index aa029fc..a23f893 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c @@ -172,6 +172,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h index e824c02..df9250b 100644 --- a/arch/arm/mach-ixp4xx/include/mach/platform.h +++ b/arch/arm/mach-ixp4xx/include/mach/platform.h @@ -125,6 +125,7 @@ extern void ixp4xx_init_irq(void); extern void ixp4xx_sys_init(void); extern void ixp4xx_timer_init(void); extern struct sys_timer ixp4xx_timer; +extern void ixp4xx_restart(char, const char *); extern void ixp4xx_pci_preinit(void); struct pci_sys_data; extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h index 54c0af7..140a9be 100644 --- a/arch/arm/mach-ixp4xx/include/mach/system.h +++ b/arch/arm/mach-ixp4xx/include/mach/system.h @@ -8,9 +8,6 @@ * published by the Free Software Foundation. * */ - -#include <mach/hardware.h> - static inline void arch_idle(void) { /* ixp4xx does not implement the XScale PWRMODE register, @@ -20,25 +17,3 @@ static inline void arch_idle(void) cpu_do_idle(); #endif } - - -static inline void arch_reset(char mode, const char *cmd) -{ - if ( 1 && mode == 's') { - /* Jump into ROM at address 0 */ - cpu_reset(0); - } else { - /* Use on-chip reset capability */ - - /* set the "key" register to enable access to - * "timer" and "enable" registers - */ - *IXP4XX_OSWK = IXP4XX_WDT_KEY; - - /* write 0 to the timer register for an immediate reset */ - *IXP4XX_OSWT = 0; - - *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; - } -} - diff --git a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h b/arch/arm/mach-ixp4xx/include/mach/vmalloc.h deleted file mode 100644 index 9bcd64d..0000000 --- a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-ixp4xx/include/mach/vmalloc.h - */ -#define VMALLOC_END (0xff000000UL) - diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index f235f82..8a38b39 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -261,6 +261,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index de716fa..1010eb7b 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c @@ -321,4 +321,5 @@ MACHINE_START(NAS100D, "Iomega NAS 100d") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index ac81ccb..aa355c3 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c @@ -307,4 +307,5 @@ MACHINE_START(NSLU2, "Linksys NSLU2") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c index 3b6a81a..0940869 100644 --- a/arch/arm/mach-ixp4xx/omixp-setup.c +++ b/arch/arm/mach-ixp4xx/omixp-setup.c @@ -246,6 +246,7 @@ MACHINE_START(DEVIXP, "Omicron DEVIXP") .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .init_machine = omixp_init, + .restart = ixp4xx_restart, MACHINE_END #endif @@ -259,6 +260,7 @@ MACHINE_START(MICCPT, "Omicron MICCPT") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END #endif @@ -269,5 +271,6 @@ MACHINE_START(MIC256, "Omicron MIC256") .init_irq = ixp4xx_init_irq, .timer = &ixp4xx_timer, .init_machine = omixp_init, + .restart = ixp4xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c index 27e469e..9dec206 100644 --- a/arch/arm/mach-ixp4xx/vulcan-setup.c +++ b/arch/arm/mach-ixp4xx/vulcan-setup.c @@ -244,4 +244,5 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c index b14144b..5ac0f0a 100644 --- a/arch/arm/mach-ixp4xx/wg302v2-setup.c +++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c @@ -105,5 +105,6 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2") #if defined(CONFIG_PCI) .dma_zone_size = SZ_64M, #endif + .restart = ixp4xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index f3248cf..0bff4a9 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -534,3 +534,19 @@ static int __init kirkwood_clock_gate(void) return 0; } late_initcall(kirkwood_clock_gate); + +void kirkwood_restart(char mode, const char *cmd) +{ + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); + + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); + + while (1) + ; +} diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index b9b0f09..1529280 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h @@ -50,6 +50,7 @@ void kirkwood_uart1_init(void); void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); void kirkwood_audio_init(void); +void kirkwood_restart(char, const char *); extern int kirkwood_tclk; extern struct sys_timer kirkwood_timer; diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c index f457e07..6e1bac9 100644 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c @@ -227,4 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c index ff4c21c..d933593 100644 --- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c +++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c @@ -103,4 +103,5 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c index e4d199b..61d9a55 100644 --- a/arch/arm/mach-kirkwood/dockstar-setup.c +++ b/arch/arm/mach-kirkwood/dockstar-setup.c @@ -108,4 +108,5 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c index 6c40f78..bdaed38 100644 --- a/arch/arm/mach-kirkwood/guruplug-setup.c +++ b/arch/arm/mach-kirkwood/guruplug-setup.c @@ -127,4 +127,5 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h index 1aaddc3..49dd0cb 100644 --- a/arch/arm/mach-kirkwood/include/mach/io.h +++ b/arch/arm/mach-kirkwood/include/mach/io.h @@ -19,31 +19,6 @@ static inline void __iomem *__io(unsigned long addr) + KIRKWOOD_PCIE_IO_VIRT_BASE); } -static inline void __iomem * -__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype) -{ - void __iomem *retval; - unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE; - if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE && - size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) { - retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs; - } else { - retval = __arm_ioremap(paddr, size, mtype); - } - - return retval; -} - -static inline void -__arch_iounmap(void __iomem *addr) -{ - if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE || - addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE)) - __iounmap(addr); -} - -#define __arch_ioremap __arch_ioremap -#define __arch_iounmap __arch_iounmap #define __io(a) __io(a) #define __mem_pci(a) (a) diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h index 7568e95..5fddde0 100644 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ b/arch/arm/mach-kirkwood/include/mach/system.h @@ -9,28 +9,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/bridge-regs.h> - static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - - #endif diff --git a/arch/arm/mach-kirkwood/include/mach/vmalloc.h b/arch/arm/mach-kirkwood/include/mach/vmalloc.h deleted file mode 100644 index bf162ca..0000000 --- a/arch/arm/mach-kirkwood/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe800000UL diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c index 9a1e917..85f6169 100644 --- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c +++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c @@ -169,4 +169,5 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c index 8849bcc..e6bba01 100644 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c @@ -264,6 +264,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif @@ -275,6 +276,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif @@ -286,5 +288,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c index 1ba12c4..31ae8de 100644 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c @@ -405,6 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif @@ -416,5 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c index 5660ca6..01f8c89 100644 --- a/arch/arm/mach-kirkwood/openrd-setup.c +++ b/arch/arm/mach-kirkwood/openrd-setup.c @@ -220,6 +220,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif @@ -232,6 +233,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif @@ -244,5 +246,6 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index 6663869..fd2c9c8 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c @@ -85,4 +85,5 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index 66b3c05..ef92207 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -121,4 +121,5 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c index 8b102d6..4ea70e5 100644 --- a/arch/arm/mach-kirkwood/sheevaplug-setup.c +++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c @@ -107,7 +107,7 @@ static void __init sheevaplug_init(void) kirkwood_init(); /* setup gpio pin select */ - if (machine_is_sheeva_esata()) + if (machine_is_esata_sheevaplug()) kirkwood_mpp_conf(sheeva_esata_mpp_config); else kirkwood_mpp_conf(sheevaplug_mpp_config); @@ -123,11 +123,11 @@ static void __init sheevaplug_init(void) kirkwood_ge00_init(&sheevaplug_ge00_data); /* honor lower power consumption for plugs with out eSATA */ - if (machine_is_sheeva_esata()) + if (machine_is_esata_sheevaplug()) kirkwood_sata_init(&sheeva_esata_sata_data); /* enable sd wp and sd cd on plugs with esata */ - if (machine_is_sheeva_esata()) + if (machine_is_esata_sheevaplug()) kirkwood_sdio_init(&sheeva_esata_mvsdio_data); else kirkwood_sdio_init(&sheevaplug_mvsdio_data); @@ -144,6 +144,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif @@ -155,5 +156,6 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c index ea104fb..966b2b3 100644 --- a/arch/arm/mach-kirkwood/t5325-setup.c +++ b/arch/arm/mach-kirkwood/t5325-setup.c @@ -207,4 +207,5 @@ MACHINE_START(T5325, "HP t5325 Thin Client") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c index 262c034..73e2b6c 100644 --- a/arch/arm/mach-kirkwood/ts219-setup.c +++ b/arch/arm/mach-kirkwood/ts219-setup.c @@ -138,4 +138,5 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index b68f5b4..5bbca26 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -182,4 +182,5 @@ MACHINE_START(TS41X, "QNAP TS-41x") .init_early = kirkwood_init_early, .init_irq = kirkwood_init_irq, .timer = &kirkwood_timer, + .restart = kirkwood_restart, MACHINE_END diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c index a91f99d..255502d 100644 --- a/arch/arm/mach-ks8695/board-acs5k.c +++ b/arch/arm/mach-ks8695/board-acs5k.c @@ -228,4 +228,5 @@ MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board") .init_irq = ks8695_init_irq, .init_machine = acs5k_init, .timer = &ks8695_timer, + .restart = ks8695_restart, MACHINE_END diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c index d24bcef..e0d36ce 100644 --- a/arch/arm/mach-ks8695/board-dsm320.c +++ b/arch/arm/mach-ks8695/board-dsm320.c @@ -126,4 +126,5 @@ MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player") .init_irq = ks8695_init_irq, .init_machine = dsm320_init, .timer = &ks8695_timer, + .restart = ks8695_restart, MACHINE_END diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c index 16c9565..a827072 100644 --- a/arch/arm/mach-ks8695/board-micrel.c +++ b/arch/arm/mach-ks8695/board-micrel.c @@ -58,4 +58,5 @@ MACHINE_START(KS8695, "KS8695 Centaur Development Board") .init_irq = ks8695_init_irq, .init_machine = micrel_init, .timer = &ks8695_timer, + .restart = ks8695_restart, MACHINE_END diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h index 2fbfab8..f8bdb11 100644 --- a/arch/arm/mach-ks8695/generic.h +++ b/arch/arm/mach-ks8695/generic.h @@ -12,4 +12,5 @@ extern __init void ks8695_map_io(void); extern __init void ks8695_init_irq(void); +extern void ks8695_restart(char, const char *); extern struct sys_timer ks8695_timer; diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h index fb1dda9..59fe992 100644 --- a/arch/arm/mach-ks8695/include/mach/system.h +++ b/arch/arm/mach-ks8695/include/mach/system.h @@ -14,9 +14,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <linux/io.h> -#include <mach/regs-timer.h> - static void arch_idle(void) { /* @@ -27,22 +24,4 @@ static void arch_idle(void) } -static void arch_reset(char mode, const char *cmd) -{ - unsigned int reg; - - if (mode == 's') - cpu_reset(0); - - /* disable timer0 */ - reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); - __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); - - /* enable watchdog mode */ - __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); - - /* re-enable timer0 */ - __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); -} - #endif diff --git a/arch/arm/mach-ks8695/include/mach/vmalloc.h b/arch/arm/mach-ks8695/include/mach/vmalloc.h deleted file mode 100644 index 744ac66..0000000 --- a/arch/arm/mach-ks8695/include/mach/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-ks8695/include/mach/vmalloc.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics <linux@simtec.co.uk> - * - * KS8695 vmalloc definition - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END (KS8695_IO_VA & PGDIR_MASK) - -#endif diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index 69c072c..37dfcd5 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c @@ -109,3 +109,21 @@ struct sys_timer ks8695_timer = { .offset = ks8695_gettimeoffset, .resume = ks8695_timer_setup, }; + +void ks8695_restart(char mode, const char *cmd) +{ + unsigned int reg; + + if (mode == 's') + soft_restart(0); + + /* disable timer0 */ + reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); + __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); + + /* enable watchdog mode */ + __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); + + /* re-enable timer0 */ + __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); +} diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index 205b2db..369b152 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c @@ -164,7 +164,7 @@ int clk_is_sysclk_mainosc(void) /* * System reset via the watchdog timer */ -void lpc32xx_watchdog_reset(void) +static void lpc32xx_watchdog_reset(void) { /* Make sure WDT clocks are enabled */ __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN, @@ -311,3 +311,21 @@ void __init lpc32xx_map_io(void) { iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc)); } + +void lpc23xx_restart(char mode, const char *cmd) +{ + switch (mode) { + case 's': + case 'h': + lpc32xx_watchdog_reset(); + break; + + default: + /* Do nothing */ + break; + } + + /* Wait for watchdog to reset system */ + while (1) + ; +} diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index 5583f52..4b4e700 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -39,6 +39,8 @@ extern void __init lpc32xx_init_irq(void); extern void __init lpc32xx_map_io(void); extern void __init lpc32xx_serial_init(void); extern void __init lpc32xx_gpio_init(void); +extern void lpc23xx_restart(char, const char *); + /* * Structure used for setting up and querying the PLLS diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h index df3b0de..bf176c9 100644 --- a/arch/arm/mach-lpc32xx/include/mach/system.h +++ b/arch/arm/mach-lpc32xx/include/mach/system.h @@ -24,29 +24,4 @@ static void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - extern void lpc32xx_watchdog_reset(void); - - switch (mode) { - case 's': - case 'h': - printk(KERN_CRIT "RESET: Rebooting system\n"); - - /* Disable interrupts */ - local_irq_disable(); - - lpc32xx_watchdog_reset(); - break; - - default: - /* Do nothing */ - break; - } - - /* Wait for watchdog to reset system */ - while (1) - ; -} - #endif diff --git a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h deleted file mode 100644 index 720fa43..0000000 --- a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/include/mach/vmalloc.h - * - * Author: Kevin Wells <kevin.wells@nxp.com> - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END 0xF0000000UL - -#endif diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index 6d2f0d1..ecb9411 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -388,4 +388,5 @@ MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller") .init_irq = lpc32xx_init_irq, .timer = &lpc32xx_timer, .init_machine = phy3250_board_init, + .restart = lpc23xx_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c index f0d236d..17cb760 100644 --- a/arch/arm/mach-mmp/aspenite.c +++ b/arch/arm/mach-mmp/aspenite.c @@ -244,6 +244,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = common_init, + .restart = pxa168_restart, MACHINE_END MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") @@ -252,4 +253,5 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = common_init, + .restart = pxa168_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c index c5d53e0..b148a9d 100644 --- a/arch/arm/mach-mmp/avengers_lite.c +++ b/arch/arm/mach-mmp/avengers_lite.c @@ -46,4 +46,5 @@ MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = avengers_lite_init, + .restart = pxa168_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c index eb07565..d839fe6 100644 --- a/arch/arm/mach-mmp/brownstone.c +++ b/arch/arm/mach-mmp/brownstone.c @@ -220,4 +220,5 @@ MACHINE_START(BROWNSTONE, "Brownstone Development Platform") .init_irq = mmp2_init_irq, .timer = &mmp2_timer, .init_machine = brownstone_init, + .restart = mmp_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c index 5720674..062b5b9 100644 --- a/arch/arm/mach-mmp/common.c +++ b/arch/arm/mach-mmp/common.c @@ -45,3 +45,8 @@ void __init mmp_map_io(void) /* this is early, initialize mmp_chip_id here */ mmp_chip_id = __raw_readl(MMP_CHIPID); } + +void mmp_restart(char mode, const char *cmd) +{ + soft_restart(0); +} diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h index ec8d65d..1c9d6c1 100644 --- a/arch/arm/mach-mmp/common.h +++ b/arch/arm/mach-mmp/common.h @@ -6,3 +6,4 @@ extern void timer_init(int irq); extern void __init icu_init_irq(void); extern void __init mmp_map_io(void); +extern void mmp_restart(char, const char *); diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c index c1f0aa8..2ee8cd7 100644 --- a/arch/arm/mach-mmp/flint.c +++ b/arch/arm/mach-mmp/flint.c @@ -122,4 +122,5 @@ MACHINE_START(FLINT, "Flint Development Platform") .init_irq = mmp2_init_irq, .timer = &mmp2_timer, .init_machine = flint_init, + .restart = mmp_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c index e266f66..8776546 100644 --- a/arch/arm/mach-mmp/gplugd.c +++ b/arch/arm/mach-mmp/gplugd.c @@ -195,4 +195,5 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform") .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = gplugd_init, + .restart = pxa168_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index f928608..dc03d58 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -5,6 +5,7 @@ struct sys_timer; extern struct sys_timer pxa168_timer; extern void __init pxa168_init_irq(void); +extern void pxa168_restart(char, const char *); extern void pxa168_clear_keypad_wakeup(void); #include <linux/i2c.h> diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h index 1a8a25e..1d001ea 100644 --- a/arch/arm/mach-mmp/include/mach/system.h +++ b/arch/arm/mach-mmp/include/mach/system.h @@ -9,18 +9,8 @@ #ifndef __ASM_MACH_SYSTEM_H #define __ASM_MACH_SYSTEM_H -#include <mach/cputype.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - if (cpu_is_pxa168()) - cpu_reset(0xffff0000); - else - cpu_reset(0); -} #endif /* __ASM_MACH_SYSTEM_H */ diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h deleted file mode 100644 index 1d0bac0..0000000 --- a/arch/arm/mach-mmp/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000UL diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c index 8bfac66..96cf5c8 100644 --- a/arch/arm/mach-mmp/jasper.c +++ b/arch/arm/mach-mmp/jasper.c @@ -175,4 +175,5 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform") .init_irq = mmp2_init_irq, .timer = &mmp2_timer, .init_machine = jasper_init, + .restart = mmp_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 8424503..7bc17ea 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c @@ -218,3 +218,8 @@ int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata) pxa168_device_usb_host.dev.platform_data = pdata; return platform_device_register(&pxa168_device_usb_host); } + +void pxa168_restart(char mode, const char *cmd) +{ + soft_restart(0xffff0000); +} diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c index bb2ddb7..8e3b5af0 100644 --- a/arch/arm/mach-mmp/tavorevb.c +++ b/arch/arm/mach-mmp/tavorevb.c @@ -105,4 +105,5 @@ MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)") .init_irq = pxa910_init_irq, .timer = &pxa910_timer, .init_machine = tavorevb_init, + .restart = mmp_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c index 703de85..0523e42 100644 --- a/arch/arm/mach-mmp/teton_bga.c +++ b/arch/arm/mach-mmp/teton_bga.c @@ -87,4 +87,5 @@ MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") .init_irq = pxa168_init_irq, .timer = &pxa168_timer, .init_machine = teton_bga_init, + .restart = pxa168_restart, MACHINE_END diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 4e91ee6..71fc4ee 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -25,7 +25,6 @@ #include <linux/io.h> #include <linux/irq.h> -#include <linux/sched.h> #include <asm/sched_clock.h> #include <mach/addr-map.h> @@ -42,8 +41,6 @@ #define MAX_DELTA (0xfffffffe) #define MIN_DELTA (16) -static DEFINE_CLOCK_DATA(cd); - /* * FIXME: the timer needs some delay to stablize the counter capture */ @@ -59,16 +56,9 @@ static inline uint32_t timer_read(void) return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1)); } -unsigned long long notrace sched_clock(void) +static u32 notrace mmp_read_sched_clock(void) { - u32 cyc = timer_read(); - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace mmp_update_sched_clock(void) -{ - u32 cyc = timer_read(); - update_sched_clock(&cd, cyc, (u32)~0); + return timer_read(); } static irqreturn_t timer_interrupt(int irq, void *dev_id) @@ -201,7 +191,7 @@ void __init timer_init(int irq) { timer_config(); - init_sched_clock(&cd, mmp_update_sched_clock, 32, CLOCK_TICK_RATE); + setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift); ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt); diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index a80ed26..5ac5d58 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c @@ -161,4 +161,5 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") .init_irq = pxa910_init_irq, .timer = &pxa910_timer, .init_machine = ttc_dkb_init, + .restart = mmp_restart, MACHINE_END diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index ebde97f..1cd40ad 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -13,7 +13,6 @@ config ARCH_MSM7X00A select CPU_V6 select GPIO_MSM_V1 select MSM_PROC_COMM - select HAS_MSM_DEBUG_UART_PHYS config ARCH_MSM7X30 bool "MSM7x30" @@ -25,7 +24,6 @@ config ARCH_MSM7X30 select MSM_GPIOMUX select GPIO_MSM_V1 select MSM_PROC_COMM - select HAS_MSM_DEBUG_UART_PHYS config ARCH_QSD8X50 bool "QSD8X50" @@ -37,7 +35,6 @@ config ARCH_QSD8X50 select MSM_GPIOMUX select GPIO_MSM_V1 select MSM_PROC_COMM - select HAS_MSM_DEBUG_UART_PHYS config ARCH_MSM8X60 bool "MSM8X60" @@ -63,19 +60,20 @@ config ARCH_MSM8960 endchoice +config MSM_HAS_DEBUG_UART_HS + bool + config MSM_SOC_REV_A bool config ARCH_MSM_SCORPIONMP bool + select HAVE_SMP config ARCH_MSM_ARM11 bool config ARCH_MSM_SCORPION bool -config HAS_MSM_DEBUG_UART_PHYS - bool - config MSM_VIC bool @@ -152,32 +150,6 @@ config MACH_MSM8960_RUMI3 endmenu -config MSM_DEBUG_UART - int - default 1 if MSM_DEBUG_UART1 - default 2 if MSM_DEBUG_UART2 - default 3 if MSM_DEBUG_UART3 - -if HAS_MSM_DEBUG_UART_PHYS -choice - prompt "Debug UART" - - default MSM_DEBUG_UART_NONE - - config MSM_DEBUG_UART_NONE - bool "None" - - config MSM_DEBUG_UART1 - bool "UART1" - - config MSM_DEBUG_UART2 - bool "UART2" - - config MSM_DEBUG_UART3 - bool "UART3" -endchoice -endif - config MSM_SMD_PKG3 bool diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c index 6dc1cbd..ed35981 100644 --- a/arch/arm/mach-msm/board-msm8960.c +++ b/arch/arm/mach-msm/board-msm8960.c @@ -99,6 +99,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") .map_io = msm8960_map_io, .init_irq = msm8960_init_irq, .timer = &msm_timer, + .handle_irq = gic_handle_irq, .init_machine = msm8960_sim_init, MACHINE_END @@ -108,6 +109,7 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") .map_io = msm8960_map_io, .init_irq = msm8960_init_irq, .timer = &msm_timer, + .handle_irq = gic_handle_irq, .init_machine = msm8960_rumi3_init, MACHINE_END diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 44bf716..0a11342 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -108,6 +108,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, + .handle_irq = gic_handle_irq, .init_machine = msm8x60_init, .timer = &msm_timer, MACHINE_END @@ -117,6 +118,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, + .handle_irq = gic_handle_irq, .init_machine = msm8x60_init, .timer = &msm_timer, MACHINE_END @@ -126,6 +128,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, + .handle_irq = gic_handle_irq, .init_machine = msm8x60_init, .timer = &msm_timer, MACHINE_END @@ -135,6 +138,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, + .handle_irq = gic_handle_irq, .init_machine = msm8x60_init, .timer = &msm_timer, MACHINE_END diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 2dc73cc..3ffd866 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S @@ -1,6 +1,7 @@ -/* arch/arm/mach-msm7200/include/mach/debug-macro.S +/* * * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2011, Code Aurora Forum. All rights reserved. * Author: Brian Swetland <swetland@google.com> * * This software is licensed under the terms of the GNU General Public @@ -14,40 +15,52 @@ * */ - - #include <mach/hardware.h> #include <mach/msm_iomap.h> -#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) .macro addruart, rp, rv, tmp +#ifdef MSM_DEBUG_UART_PHYS ldr \rp, =MSM_DEBUG_UART_PHYS ldr \rv, =MSM_DEBUG_UART_BASE +#endif .endm - .macro senduart,rd,rx + .macro senduart, rd, rx +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS + @ Write the 1 character to UARTDM_TF + str \rd, [\rx, #0x70] +#else teq \rx, #0 strne \rd, [\rx, #0x0C] +#endif .endm - .macro waituart,rd,rx + .macro waituart, rd, rx +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS + @ check for TX_EMT in UARTDM_SR + ldr \rd, [\rx, #0x08] + tst \rd, #0x08 + bne 1002f + @ wait for TXREADY in UARTDM_ISR +1001: ldr \rd, [\rx, #0x14] + tst \rd, #0x80 + beq 1001b +1002: + @ Clear TX_READY by writing to the UARTDM_CR register + mov \rd, #0x300 + str \rd, [\rx, #0x10] + @ Write 0x1 to NCF register + mov \rd, #0x1 + str \rd, [\rx, #0x40] + @ UARTDM reg. Read to induce delay + ldr \rd, [\rx, #0x08] +#else @ wait for TX_READY 1001: ldr \rd, [\rx, #0x08] tst \rd, #0x04 beq 1001b - .endm -#else - .macro addruart, rp, rv, tmp - mov \rv, #0xff000000 - orr \rv, \rv, #0x00f00000 - .endm - - .macro senduart,rd,rx - .endm - - .macro waituart,rd,rx - .endm #endif + .endm - .macro busyuart,rd,rx + .macro busyuart, rd, rx .endm diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S deleted file mode 100644 index 717076f..0000000 --- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Low-level IRQ helper macros - * - * Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <asm/hardware/entry-macro-gic.S> - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S deleted file mode 100644 index 70563ed..0000000 --- a/arch/arm/mach-msm/include/mach/entry-macro-vic.S +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <mach/msm_iomap.h> - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - @ enable imprecise aborts - cpsie a - mov \base, #MSM_VIC_BASE - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ 0xD0 has irq# or old irq# if the irq has been handled - @ 0xD4 has irq# or -1 if none pending *but* if you just - @ read 0xD4 you never get the first irq for some reason - ldr \irqnr, [\base, #0xD0] - ldr \irqnr, [\base, #0xD4] - cmp \irqnr, #0xffffffff - .endm diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S index b16f082..41f7003 100644 --- a/arch/arm/mach-msm/include/mach/entry-macro.S +++ b/arch/arm/mach-msm/include/mach/entry-macro.S @@ -16,8 +16,27 @@ * */ -#if defined(CONFIG_ARM_GIC) -#include <mach/entry-macro-qgic.S> -#else -#include <mach/entry-macro-vic.S> + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + +#if !defined(CONFIG_ARM_GIC) +#include <mach/msm_iomap.h> + + .macro get_irqnr_preamble, base, tmp + @ enable imprecise aborts + cpsie a + mov \base, #MSM_VIC_BASE + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + @ 0xD0 has irq# or old irq# if the irq has been handled + @ 0xD4 has irq# or -1 if none pending *but* if you just + @ read 0xD4 you never get the first irq for some reason + ldr \irqnr, [\base, #0xD0] + ldr \irqnr, [\base, #0xD4] + cmp \irqnr, #0xffffffff + .endm #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 94fe9fe..8af4612 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h @@ -78,18 +78,6 @@ #define MSM_UART3_PHYS 0xA9C00000 #define MSM_UART3_SIZE SZ_4K -#ifdef CONFIG_MSM_DEBUG_UART -#define MSM_DEBUG_UART_BASE 0xE1000000 -#if CONFIG_MSM_DEBUG_UART == 1 -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS -#elif CONFIG_MSM_DEBUG_UART == 2 -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS -#elif CONFIG_MSM_DEBUG_UART == 3 -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS -#endif -#define MSM_DEBUG_UART_SIZE SZ_4K -#endif - #define MSM_SDC1_PHYS 0xA0400000 #define MSM_SDC1_SIZE SZ_4K diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 3769444..198202c 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h @@ -89,18 +89,6 @@ #define MSM_UART3_PHYS 0xACC00000 #define MSM_UART3_SIZE SZ_4K -#ifdef CONFIG_MSM_DEBUG_UART -#define MSM_DEBUG_UART_BASE 0xE1000000 -#if CONFIG_MSM_DEBUG_UART == 1 -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS -#elif CONFIG_MSM_DEBUG_UART == 2 -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS -#elif CONFIG_MSM_DEBUG_UART == 3 -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS -#endif -#define MSM_DEBUG_UART_SIZE SZ_4K -#endif - #define MSM_MDC_BASE IOMEM(0xE0200000) #define MSM_MDC_PHYS 0xAA500000 #define MSM_MDC_SIZE SZ_1M diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h index 3c9d960..800b557 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h @@ -45,4 +45,9 @@ #define MSM8960_TMR0_PHYS 0x0208A000 #define MSM8960_TMR0_SIZE SZ_4K +#ifdef CONFIG_DEBUG_MSM8960_UART +#define MSM_DEBUG_UART_BASE 0xE1040000 +#define MSM_DEBUG_UART_PHYS 0x16440000 +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index d67cd73..0faa894 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h @@ -83,18 +83,6 @@ #define MSM_UART3_PHYS 0xA9C00000 #define MSM_UART3_SIZE SZ_4K -#ifdef CONFIG_MSM_DEBUG_UART -#define MSM_DEBUG_UART_BASE 0xE1000000 -#if CONFIG_MSM_DEBUG_UART == 1 -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS -#elif CONFIG_MSM_DEBUG_UART == 2 -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS -#elif CONFIG_MSM_DEBUG_UART == 3 -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS -#endif -#define MSM_DEBUG_UART_SIZE SZ_4K -#endif - #define MSM_MDC_BASE IOMEM(0xE0200000) #define MSM_MDC_PHYS 0xAA500000 #define MSM_MDC_SIZE SZ_1M diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 3b19b8f..54e12ca 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h @@ -62,4 +62,9 @@ #define MSM8X60_TMR0_PHYS 0x02040000 #define MSM8X60_TMR0_SIZE SZ_4K +#ifdef CONFIG_DEBUG_MSM8660_UART +#define MSM_DEBUG_UART_BASE 0xE1040000 +#define MSM_DEBUG_UART_PHYS 0x19C40000 +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h index 4ded152..90682f4 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap.h @@ -55,6 +55,18 @@ #include "msm_iomap-8960.h" +#define MSM_DEBUG_UART_SIZE SZ_4K +#if defined(CONFIG_DEBUG_MSM_UART1) +#define MSM_DEBUG_UART_BASE 0xE1000000 +#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS +#elif defined(CONFIG_DEBUG_MSM_UART2) +#define MSM_DEBUG_UART_BASE 0xE1000000 +#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS +#elif defined(CONFIG_DEBUG_MSM_UART3) +#define MSM_DEBUG_UART_BASE 0xE1000000 +#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS +#endif + /* Virtual addresses shared across all MSM targets. */ #define MSM_CSR_BASE IOMEM(0xE0001000) #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h index d2e83f4..311db2b 100644 --- a/arch/arm/mach-msm/include/mach/system.h +++ b/arch/arm/mach-msm/include/mach/system.h @@ -12,16 +12,8 @@ * GNU General Public License for more details. * */ - -#include <mach/hardware.h> - void arch_idle(void); -static inline void arch_reset(char mode, const char *cmd) -{ - for (;;) ; /* depends on IPC w/ other core */ -} - /* low level hardware reset hook -- for example, hitting the * PSHOLD line on the PMIC to hard reset the system */ diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h index d94292c..169a840 100644 --- a/arch/arm/mach-msm/include/mach/uncompress.h +++ b/arch/arm/mach-msm/include/mach/uncompress.h @@ -1,6 +1,6 @@ -/* arch/arm/mach-msm/include/mach/uncompress.h - * +/* * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2011, Code Aurora Forum. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -14,17 +14,40 @@ */ #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H +#define __ASM_ARCH_MSM_UNCOMPRESS_H + +#include <asm/processor.h> +#include <mach/msm_iomap.h> + +#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)) +#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c)) -#include "hardware.h" -#include "linux/io.h" -#include "mach/msm_iomap.h" +#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))) +#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10))) +#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14))) +#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40))) +#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70))) static void putc(int c) { #if defined(MSM_DEBUG_UART_PHYS) - unsigned base = MSM_DEBUG_UART_PHYS; - while (!(readl(base + 0x08) & 0x04)) ; - writel(c, base + 0x0c); +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS + /* + * Wait for TX_READY to be set; but skip it if we have a + * TX underrun. + */ + if (UART_DM_SR & 0x08) + while (!(UART_DM_ISR & 0x80)) + cpu_relax(); + + UART_DM_CR = 0x300; + UART_DM_NCHAR = 0x1; + UART_DM_TF = c; +#else + while (!(UART_CSR & 0x04)) + cpu_relax(); + UART_TF = c; +#endif #endif } diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h deleted file mode 100644 index d138448..0000000 --- a/arch/arm/mach-msm/include/mach/vmalloc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* arch/arm/mach-msm/include/mach/vmalloc.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_VMALLOC_H -#define __ASM_ARCH_MSM_VMALLOC_H - -#define VMALLOC_END 0xd0000000UL - -#endif - diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 8759ecf..578b04e 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -47,7 +47,8 @@ static struct map_desc msm_io_desc[] __initdata = { MSM_CHIP_DEVICE(GPIO1, MSM7X00), MSM_CHIP_DEVICE(GPIO2, MSM7X00), MSM_DEVICE(CLK_CTL), -#ifdef CONFIG_MSM_DEBUG_UART +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ + defined(CONFIG_DEBUG_MSM_UART3) MSM_DEVICE(DEBUG_UART), #endif #ifdef CONFIG_ARCH_MSM7X30 @@ -84,7 +85,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = { MSM_DEVICE(SCPLL), MSM_DEVICE(AD5), MSM_DEVICE(MDC), -#ifdef CONFIG_MSM_DEBUG_UART +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ + defined(CONFIG_DEBUG_MSM_UART3) MSM_DEVICE(DEBUG_UART), #endif { @@ -109,6 +111,9 @@ static struct map_desc msm8x60_io_desc[] __initdata = { MSM_CHIP_DEVICE(TMR0, MSM8X60), MSM_DEVICE(ACC), MSM_DEVICE(GCC), +#ifdef CONFIG_DEBUG_MSM8660_UART + MSM_DEVICE(DEBUG_UART), +#endif }; void __init msm_map_msm8x60_io(void) @@ -123,6 +128,9 @@ static struct map_desc msm8960_io_desc[] __initdata = { MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), MSM_CHIP_DEVICE(TMR, MSM8960), MSM_CHIP_DEVICE(TMR0, MSM8960), +#ifdef CONFIG_DEBUG_MSM8960_UART + MSM_DEVICE(DEBUG_UART), +#endif }; void __init msm_map_msm8960_io(void) @@ -146,7 +154,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = { MSM_DEVICE(SAW), MSM_DEVICE(GCC), MSM_DEVICE(TCSR), -#ifdef CONFIG_MSM_DEBUG_UART +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ + defined(CONFIG_DEBUG_MSM_UART3) MSM_DEVICE(DEBUG_UART), #endif { diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index fdec58a..0b3e357 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -79,7 +79,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu) ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), SCM_FLAG_COLDBOOT_CPU1); if (ret == 0) { - void *sc1_base_ptr; + void __iomem *sc1_base_ptr; sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); if (sc1_base_ptr) { writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c index 0e94268..ee74ec9 100644 --- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c +++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c @@ -151,4 +151,5 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL") .init_early = mv78xx0_init_early, .init_irq = mv78xx0_init_irq, .timer = &mv78xx0_timer, + .restart = mv78xx0_restart, MACHINE_END diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index 23d3980..5b9632b 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -401,3 +401,19 @@ void __init mv78xx0_init(void) feroceon_l2_init(is_l2_writethrough()); #endif } + +void mv78xx0_restart(char mode, const char *cmd) +{ + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); + + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); + + while (1) + ; +} diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h index 632e63d..07d5f8f 100644 --- a/arch/arm/mach-mv78xx0/common.h +++ b/arch/arm/mach-mv78xx0/common.h @@ -46,6 +46,7 @@ void mv78xx0_uart1_init(void); void mv78xx0_uart2_init(void); void mv78xx0_uart3_init(void); void mv78xx0_i2c_init(void); +void mv78xx0_restart(char, const char *); extern struct sys_timer mv78xx0_timer; diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index 50b85ae..4d6d48b 100644 --- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c @@ -99,4 +99,5 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board") .init_early = mv78xx0_init_early, .init_irq = mv78xx0_init_irq, .timer = &mv78xx0_timer, + .restart = mv78xx0_restart, MACHINE_END diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h index 66e7ce4..8c3a538 100644 --- a/arch/arm/mach-mv78xx0/include/mach/system.h +++ b/arch/arm/mach-mv78xx0/include/mach/system.h @@ -9,28 +9,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/bridge-regs.h> - static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - - #endif diff --git a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h deleted file mode 100644 index ba26fe9..0000000 --- a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000UL diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c index e85222e..9a88270 100644 --- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c @@ -84,4 +84,5 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") .init_early = mv78xx0_init_early, .init_irq = mv78xx0_init_irq, .timer = &mv78xx0_timer, + .restart = mv78xx0_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 1fc1103..944025d 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c @@ -297,4 +297,5 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module") .handle_irq = imx51_handle_irq, .timer = &mxc_timer, .init_machine = eukrea_cpuimx51_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c index 52a11c1..9fbe923 100644 --- a/arch/arm/mach-mx5/board-cpuimx51sd.c +++ b/arch/arm/mach-mx5/board-cpuimx51sd.c @@ -335,4 +335,5 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD") .handle_irq = imx51_handle_irq, .timer = &mxc_timer, .init_machine = eukrea_cpuimx51sd_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c index fc3621d..42b66e8 100644 --- a/arch/arm/mach-mx5/board-mx50_rdp.c +++ b/arch/arm/mach-mx5/board-mx50_rdp.c @@ -222,4 +222,5 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform") .handle_irq = imx50_handle_irq, .timer = &mx50_rdp_timer, .init_machine = mx50_rdp_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index 0578390..83eab41 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -175,4 +175,5 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board") .handle_irq = imx51_handle_irq, .timer = &mx51_3ds_timer, .init_machine = mx51_3ds_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 24994bb..e4b822e 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -426,4 +426,5 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") .handle_irq = imx51_handle_irq, .timer = &mx51_babbage_timer, .init_machine = mx51_babbage_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index a9e4866..3a5ed2d 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -182,7 +182,7 @@ static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initcon .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), }; -void mx51_efikamx_reset(void) +static void mx51_efikamx_restart(char mode, const char *cmd) { if (system_rev == 0x11) gpio_direction_output(EFIKAMX_RESET1_1, 0); @@ -292,4 +292,5 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") .handle_irq = imx51_handle_irq, .timer = &mx51_efikamx_timer, .init_machine = mx51_efikamx_init, + .restart = mx51_efikamx_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index 38c4a3e..ea5f65b 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c @@ -287,4 +287,5 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook") .handle_irq = imx51_handle_irq, .init_machine = efikasb_board_init, .timer = &mx51_efikasb_timer, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 0d7f0ff..5f224f1 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c @@ -257,4 +257,5 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board") .handle_irq = imx53_handle_irq, .timer = &mx53_ard_timer, .init_machine = mx53_ard_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index 64bbfce..d6ce137 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c @@ -175,4 +175,5 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board") .handle_irq = imx53_handle_irq, .timer = &mx53_evk_timer, .init_machine = mx53_evk_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 237bdec..fd8b524 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -317,4 +317,5 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board") .handle_irq = imx53_handle_irq, .timer = &mx53_loco_timer, .init_machine = mx53_loco_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c index d42132a..22c53c9 100644 --- a/arch/arm/mach-mx5/board-mx53_smd.c +++ b/arch/arm/mach-mx5/board-mx53_smd.c @@ -164,4 +164,5 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board") .handle_irq = imx53_handle_irq, .timer = &mx53_smd_timer, .init_machine = mx53_smd_board_init, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c index 596edd9..e6bad17 100644 --- a/arch/arm/mach-mx5/imx51-dt.c +++ b/arch/arm/mach-mx5/imx51-dt.c @@ -115,4 +115,5 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") .timer = &imx51_timer, .init_machine = imx51_dt_init, .dt_compat = imx51_dt_board_compat, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c index 85bfd5f..05ebb3e 100644 --- a/arch/arm/mach-mx5/imx53-dt.c +++ b/arch/arm/mach-mx5/imx53-dt.c @@ -125,4 +125,5 @@ DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") .timer = &imx53_timer, .init_machine = imx53_dt_init, .dt_compat = imx53_dt_board_compat, + .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index 3bbb94f..e1237ab 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -16,6 +16,7 @@ struct clk; extern const u32 *mxs_get_ocotp(void); extern int mxs_reset_block(void __iomem *); extern void mxs_timer_init(struct clk *, int); +extern void mxs_restart(char, const char *); extern int mxs_saif_clkmux_select(unsigned int clkmux); extern int mx23_register_gpios(void); diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h index 0e42823..e7ad1bb 100644 --- a/arch/arm/mach-mxs/include/mach/system.h +++ b/arch/arm/mach-mxs/include/mach/system.h @@ -22,6 +22,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -void arch_reset(char mode, const char *cmd); - #endif /* __MACH_MXS_SYSTEM_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/vmalloc.h b/arch/arm/mach-mxs/include/mach/vmalloc.h deleted file mode 100644 index 103b016..0000000 --- a/arch/arm/mach-mxs/include/mach/vmalloc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2000 Russell King. - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_MXS_VMALLOC_H__ -#define __MACH_MXS_VMALLOC_H__ - -/* vmalloc ending address */ -#define VMALLOC_END 0xf4000000UL - -#endif /* __MACH_MXS_VMALLOC_H__ */ diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c index 6b00577..2f27582 100644 --- a/arch/arm/mach-mxs/mach-m28evk.c +++ b/arch/arm/mach-mxs/mach-m28evk.c @@ -363,4 +363,5 @@ MACHINE_START(M28EVK, "DENX M28 EVK") .init_irq = mx28_init_irq, .timer = &m28evk_timer, .init_machine = m28evk_init, + .restart = mxs_restart, MACHINE_END diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c index c325fbe..5ea1c57 100644 --- a/arch/arm/mach-mxs/mach-mx23evk.c +++ b/arch/arm/mach-mxs/mach-mx23evk.c @@ -184,4 +184,5 @@ MACHINE_START(MX23EVK, "Freescale MX23 EVK") .init_irq = mx23_init_irq, .timer = &mx23evk_timer, .init_machine = mx23evk_init, + .restart = mxs_restart, MACHINE_END diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index ac84a10..eb0597b 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c @@ -515,4 +515,5 @@ MACHINE_START(MX28EVK, "Freescale MX28 EVK") .init_irq = mx28_init_irq, .timer = &mx28evk_timer, .init_machine = mx28evk_init, + .restart = mxs_restart, MACHINE_END diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c index 6834dea..a626c07 100644 --- a/arch/arm/mach-mxs/mach-stmp378x_devb.c +++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c @@ -117,4 +117,5 @@ MACHINE_START(STMP378X, "STMP378X") .init_irq = mx23_init_irq, .timer = &stmp378x_dvb_timer, .init_machine = stmp378x_dvb_init, + .restart = mxs_restart, MACHINE_END diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 9a1f0e7..2c0862e 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -178,4 +178,5 @@ MACHINE_START(TX28, "Ka-Ro electronics TX28 module") .init_irq = mx28_init_irq, .timer = &tx28_timer, .init_machine = tx28_stk5v3_init, + .restart = mxs_restart, MACHINE_END diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c index 20ec3bd..b936633 100644 --- a/arch/arm/mach-mxs/system.c +++ b/arch/arm/mach-mxs/system.c @@ -42,7 +42,7 @@ static void __iomem *mxs_clkctrl_reset_addr; /* * Reset the system. It is called by machine_restart(). */ -void arch_reset(char mode, const char *cmd) +void mxs_restart(char mode, const char *cmd) { /* reset the chip */ __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr); @@ -53,7 +53,7 @@ void arch_reset(char mode, const char *cmd) mdelay(50); /* We'll take a jump through zero as a poor second */ - cpu_reset(0); + soft_restart(0); } static int __init mxs_arch_reset_init(void) diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 00023b5..59e6797 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c @@ -187,3 +187,8 @@ static int __init netx_init(void) subsys_initcall(netx_init); +void netx_restart(char mode, const char *cmd) +{ + writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, + NETX_SYSTEM_RES_CR); +} diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h index ede2d35..9b91511 100644 --- a/arch/arm/mach-netx/generic.h +++ b/arch/arm/mach-netx/generic.h @@ -19,6 +19,7 @@ extern void __init netx_map_io(void); extern void __init netx_init_irq(void); +extern void netx_restart(char, const char *); struct sys_timer; extern struct sys_timer netx_timer; diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S index 844f1f9..6e9f1cb 100644 --- a/arch/arm/mach-netx/include/mach/entry-macro.S +++ b/arch/arm/mach-netx/include/mach/entry-macro.S @@ -18,22 +18,9 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include <mach/hardware.h> .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =io_p2v(0x001ff000) - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #0] - clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #31 - cmp \irqstat, #0 - .endm - diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h index dc7b4bc..b38fa36 100644 --- a/arch/arm/mach-netx/include/mach/system.h +++ b/arch/arm/mach-netx/include/mach/system.h @@ -19,20 +19,10 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <linux/io.h> -#include <mach/hardware.h> -#include "netx-regs.h" - static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, - NETX_SYSTEM_RES_CR); -} - #endif diff --git a/arch/arm/mach-netx/include/mach/vmalloc.h b/arch/arm/mach-netx/include/mach/vmalloc.h deleted file mode 100644 index 871f1ef..0000000 --- a/arch/arm/mach-netx/include/mach/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-netx/include/mach/vmalloc.h - * - * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xd0000000UL diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c index 90903dd..180ea89 100644 --- a/arch/arm/mach-netx/nxdb500.c +++ b/arch/arm/mach-netx/nxdb500.c @@ -28,6 +28,7 @@ #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include <asm/hardware/vic.h> #include <mach/netx-regs.h> #include <mach/eth.h> @@ -203,6 +204,8 @@ MACHINE_START(NXDB500, "Hilscher nxdb500") .atag_offset = 0x100, .map_io = netx_map_io, .init_irq = netx_init_irq, + .handle_irq = vic_handle_irq, .timer = &netx_timer, .init_machine = nxdb500_init, + .restart = netx_restart, MACHINE_END diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c index c63384a..58009e2 100644 --- a/arch/arm/mach-netx/nxdkn.c +++ b/arch/arm/mach-netx/nxdkn.c @@ -28,6 +28,7 @@ #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include <asm/hardware/vic.h> #include <mach/netx-regs.h> #include <mach/eth.h> @@ -96,6 +97,8 @@ MACHINE_START(NXDKN, "Hilscher nxdkn") .atag_offset = 0x100, .map_io = netx_map_io, .init_irq = netx_init_irq, + .handle_irq = vic_handle_irq, .timer = &netx_timer, .init_machine = nxdkn_init, + .restart = netx_restart, MACHINE_END diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c index 8f548ec..122e998 100644 --- a/arch/arm/mach-netx/nxeb500hmi.c +++ b/arch/arm/mach-netx/nxeb500hmi.c @@ -28,6 +28,7 @@ #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include <asm/hardware/vic.h> #include <mach/netx-regs.h> #include <mach/eth.h> @@ -180,6 +181,8 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi") .atag_offset = 0x100, .map_io = netx_map_io, .init_irq = netx_init_irq, + .handle_irq = vic_handle_irq, .timer = &netx_timer, .init_machine = nxeb500hmi_init, + .restart = netx_restart, MACHINE_END diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 0cbb74c..7c878bf 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -21,6 +21,7 @@ #include <linux/mtd/onenand.h> #include <linux/mtd/partitions.h> #include <linux/io.h> +#include <asm/hardware/vic.h> #include <asm/sizes.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -34,6 +35,8 @@ #include <mach/nand.h> #include <mach/fsmc.h> +#include "cpu-8815.h" + /* Initial value for SRC control register: all timers use MXTAL/8 source */ #define SRC_CR_INIT_MASK 0x00007fff #define SRC_CR_INIT_VAL 0x2aaa8000 @@ -280,6 +283,8 @@ MACHINE_START(NOMADIK, "NHK8815") .atag_offset = 0x100, .map_io = cpu8815_map_io, .init_irq = cpu8815_init_irq, + .handle_irq = vic_handle_irq, .timer = &nomadik_timer, .init_machine = nhk8815_platform_init, + .restart = cpu8815_restart, MACHINE_END diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index dc67717..65df7b4 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c @@ -21,6 +21,7 @@ #include <linux/device.h> #include <linux/amba/bus.h> #include <linux/platform_device.h> +#include <linux/io.h> #include <plat/gpio-nomadik.h> #include <mach/hardware.h> @@ -32,6 +33,7 @@ #include <asm/hardware/cache-l2x0.h> #include "clock.h" +#include "cpu-8815.h" #define __MEM_4K_RESOURCE(x) \ .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} @@ -164,3 +166,13 @@ void __init cpu8815_init_irq(void) #endif return; } + +void cpu8815_restart(char mode, const char *cmd) +{ + void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18); + + /* FIXME: use egpio when implemented */ + + /* Write anything to Reset status register */ + writel(1, src_rstsr); +} diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h new file mode 100644 index 0000000..71c21e8 --- /dev/null +++ b/arch/arm/mach-nomadik/cpu-8815.h @@ -0,0 +1,4 @@ +extern void cpu8815_map_io(void); +extern void cpu8815_platform_init(void); +extern void cpu8815_init_irq(void); +extern void cpu8815_restart(char, const char *); diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S index 49f1aa3..98ea1c1 100644 --- a/arch/arm/mach-nomadik/include/mach/entry-macro.S +++ b/arch/arm/mach-nomadik/include/mach/entry-macro.S @@ -6,38 +6,8 @@ * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <mach/irqs.h> - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =IO_ADDRESS(NOMADIK_IC_BASE) - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - /* This stanza gets the irq mask from one of two status registers */ - mov \irqnr, #0 - ldr \irqstat, [\base, #VIC_REG_IRQSR0] @ get masked status - cmp \irqstat, #0 - bne 1001f - add \irqnr, \irqnr, #32 - ldr \irqstat, [\base, #VIC_REG_IRQSR1] @ get masked status - -1001: tst \irqstat, #15 - bne 1002f - add \irqnr, \irqnr, #4 - movs \irqstat, \irqstat, lsr #4 - bne 1001b -1002: tst \irqstat, #1 - bne 1003f - add \irqnr, \irqnr, #1 - movs \irqstat, \irqstat, lsr #1 - bne 1002b -1003: /* EQ will be set if no irqs pending */ - .endm diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h index b7897ed..bcaeaf4 100644 --- a/arch/arm/mach-nomadik/include/mach/setup.h +++ b/arch/arm/mach-nomadik/include/mach/setup.h @@ -12,9 +12,6 @@ #ifdef CONFIG_NOMADIK_8815 -extern void cpu8815_map_io(void); -extern void cpu8815_platform_init(void); -extern void cpu8815_init_irq(void); extern void nmdk_timer_init(void); #endif /* NOMADIK_8815 */ diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h index 7119f68..25e198b 100644 --- a/arch/arm/mach-nomadik/include/mach/system.h +++ b/arch/arm/mach-nomadik/include/mach/system.h @@ -20,9 +20,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <linux/io.h> -#include <mach/hardware.h> - static inline void arch_idle(void) { /* @@ -32,14 +29,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18); - - /* FIXME: use egpio when implemented */ - - /* Write anything to Reset status register */ - writel(1, src_rstsr); -} - #endif diff --git a/arch/arm/mach-nomadik/include/mach/vmalloc.h b/arch/arm/mach-nomadik/include/mach/vmalloc.h deleted file mode 100644 index f83d574..0000000 --- a/arch/arm/mach-nomadik/include/mach/vmalloc.h +++ /dev/null @@ -1,2 +0,0 @@ - -#define VMALLOC_END 0xe8000000UL diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index b0f15d2..88909cc 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -35,7 +35,7 @@ #include <plat/mux.h> #include <plat/usb.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <mach/camera.h> #include <mach/ams-delta-fiq.h> @@ -386,6 +386,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") .init_irq = omap1_init_irq, .init_machine = ams_delta_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END EXPORT_SYMBOL(ams_delta_latch1_write); diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 2317827..0b9464b 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -32,7 +32,7 @@ #include <plat/flash.h> #include <plat/fpga.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #include <plat/board.h> /* fsample is pretty close to p2-sample */ @@ -390,4 +390,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") .init_irq = omap1_init_irq, .init_machine = omap_fsample_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index dc5b75d..9a5fe58 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -25,7 +25,7 @@ #include <plat/mux.h> #include <plat/usb.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" /* assume no Mini-AB port */ @@ -89,4 +89,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") .init_irq = omap1_init_irq, .init_machine = omap_generic_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index b334b14..00ad6b2 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -43,7 +43,7 @@ #include <plat/irda.h> #include <plat/usb.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #include <plat/flash.h> #include "board-h2.h" @@ -456,4 +456,5 @@ MACHINE_START(OMAP_H2, "TI-H2") .init_irq = omap1_init_irq, .init_machine = h2_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 74ebe72..4a7f251 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -45,7 +45,7 @@ #include <plat/usb.h> #include <plat/keypad.h> #include <plat/dma.h> -#include <plat/common.h> +#include "common.h" #include <plat/flash.h> #include "board-h3.h" @@ -444,4 +444,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") .init_irq = omap1_init_irq, .init_machine = h3_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 3e91baa..731cc3d 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -41,7 +41,7 @@ #include <asm/mach/arch.h> #include <plat/omap7xx.h> -#include <plat/common.h> +#include "common.h" #include <plat/board.h> #include <plat/keypad.h> #include <plat/usb.h> @@ -610,4 +610,5 @@ MACHINE_START(HERALD, "HTC Herald") .init_irq = omap1_init_irq, .init_machine = htcherald_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 273153d..309369e 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -37,7 +37,7 @@ #include <plat/tc.h> #include <plat/usb.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #include <plat/mmc.h> /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ @@ -460,4 +460,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") .init_irq = omap1_init_irq, .init_machine = innovator_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 6798b84..f9efc03 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -30,7 +30,7 @@ #include <plat/usb.h> #include <plat/board.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #include <plat/hwa742.h> #include <plat/lcd_mipid.h> #include <plat/mmc.h> @@ -259,4 +259,5 @@ MACHINE_START(NOKIA770, "Nokia 770") .init_irq = omap1_init_irq, .init_machine = omap_nokia770_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index c385927..675de06 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -51,7 +51,7 @@ #include <plat/usb.h> #include <plat/mux.h> #include <plat/tc.h> -#include <plat/common.h> +#include "common.h" /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ #define OMAP_OSK_ETHR_START 0x04800300 @@ -578,4 +578,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK") .init_irq = omap1_init_irq, .init_machine = osk_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index f9c44cb..81fa27f 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -41,7 +41,7 @@ #include <plat/board.h> #include <plat/irda.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #define PALMTE_USBDETECT_GPIO 0 #define PALMTE_USB_OR_DC_GPIO 1 @@ -270,4 +270,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") .init_irq = omap1_init_irq, .init_machine = omap_palmte_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 11a9853..81cb821 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -39,7 +39,7 @@ #include <plat/board.h> #include <plat/irda.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -317,4 +317,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") .init_irq = omap1_init_irq, .init_machine = omap_palmtt_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 4206157..e881945 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -41,7 +41,7 @@ #include <plat/board.h> #include <plat/irda.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -334,4 +334,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") .init_irq = omap1_init_irq, .init_machine = omap_palmz71_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 203ae07..c000bed 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -32,7 +32,7 @@ #include <plat/fpga.h> #include <plat/flash.h> #include <plat/keypad.h> -#include <plat/common.h> +#include "common.h" #include <plat/board.h> static const unsigned int p2_keymap[] = { @@ -352,4 +352,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") .init_irq = omap1_init_irq, .init_machine = omap_perseus2_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 092a4c0..7bcd82a 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -40,7 +40,7 @@ #include <plat/usb.h> #include <plat/tc.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/keypad.h> #include <plat/board-sx1.h> @@ -416,4 +416,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") .init_irq = omap1_init_irq, .init_machine = omap_sx1_init, .timer = &omap1_timer, + .restart = omap1_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 61ed6cd..f83a502d 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -28,13 +28,12 @@ #include <linux/export.h> #include <mach/hardware.h> -#include <mach/system.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <plat/board-voiceblue.h> -#include <plat/common.h> +#include "common.h" #include <plat/flash.h> #include <plat/mux.h> #include <plat/tc.h> @@ -221,7 +220,7 @@ void voiceblue_wdt_ping(void) gpio_set_value(0, wdt_gpio_state); } -static void voiceblue_reset(char mode, const char *cmd) +static void voiceblue_restart(char mode, const char *cmd) { /* * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 @@ -285,8 +284,6 @@ static void __init voiceblue_init(void) * (it is connected through invertor) */ omap_writeb(0x00, OMAP_LPG1_LCR); omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */ - - arch_reset = voiceblue_reset; } MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") @@ -298,4 +295,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") .init_irq = omap1_init_irq, .init_machine = voiceblue_init, .timer = &omap1_timer, + .restart = voiceblue_restart, MACHINE_END diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h new file mode 100644 index 0000000..a9a5146 --- /dev/null +++ b/arch/arm/mach-omap1/common.h @@ -0,0 +1,62 @@ +/* + * + * Header for code common to all OMAP1 machines. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H +#define __ARCH_ARM_MACH_OMAP1_COMMON_H + +#include <plat/common.h> + +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +void omap7xx_map_io(void); +#else +static inline void omap7xx_map_io(void) +{ +} +#endif + +#ifdef CONFIG_ARCH_OMAP15XX +void omap15xx_map_io(void); +#else +static inline void omap15xx_map_io(void) +{ +} +#endif + +#ifdef CONFIG_ARCH_OMAP16XX +void omap16xx_map_io(void); +#else +static inline void omap16xx_map_io(void) +{ +} +#endif + +void omap1_init_early(void); +void omap1_init_irq(void); +void omap1_restart(char, const char *); + +extern struct sys_timer omap1_timer; +extern bool omap_32k_timer_init(void); + +#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 475cb2f..1d76a63 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -22,7 +22,7 @@ #include <mach/hardware.h> #include <asm/mach/map.h> -#include <plat/common.h> +#include "common.h" #include <plat/tc.h> #include <plat/board.h> #include <plat/mux.h> diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h deleted file mode 100644 index 22ec4a4..0000000 --- a/arch/arm/mach-omap1/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-omap1/include/mach/vmalloc.h - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xd8000000UL diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 7969cfd..8e55b6fb 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -121,7 +121,6 @@ void __init omap16xx_map_io(void) void omap1_init_early(void) { omap_check_revision(); - omap_ioremap_init(); /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort * on a Posted Write in the TIPB Bridge". diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index ad951ee..91d199b 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -5,10 +5,9 @@ #include <linux/io.h> #include <mach/hardware.h> -#include <mach/system.h> #include <plat/prcm.h> -void omap1_arch_reset(char mode, const char *cmd) +void omap1_restart(char mode, const char *cmd) { /* * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 @@ -21,5 +20,3 @@ void omap1_arch_reset(char mode, const char *cmd) omap_writew(1, ARM_RSTCT1); } - -void (*arch_reset)(char, const char *) = omap1_arch_reset; diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index a183777..b8faffa 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -37,7 +37,6 @@ #include <linux/init.h> #include <linux/delay.h> #include <linux/interrupt.h> -#include <linux/sched.h> #include <linux/spinlock.h> #include <linux/clk.h> #include <linux/err.h> @@ -54,7 +53,7 @@ #include <asm/mach/irq.h> #include <asm/mach/time.h> -#include <plat/common.h> +#include "common.h" #ifdef CONFIG_OMAP_MPU_TIMER @@ -190,30 +189,9 @@ static __init void omap_init_mpu_timer(unsigned long rate) * --------------------------------------------------------------------------- */ -static DEFINE_CLOCK_DATA(cd); - -static inline unsigned long long notrace _omap_mpu_sched_clock(void) -{ - u32 cyc = ~omap_mpu_timer_read(1); - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -#ifndef CONFIG_OMAP_32K_TIMER -unsigned long long notrace sched_clock(void) -{ - return _omap_mpu_sched_clock(); -} -#else -static unsigned long long notrace omap_mpu_sched_clock(void) -{ - return _omap_mpu_sched_clock(); -} -#endif - -static void notrace mpu_update_sched_clock(void) +static u32 notrace omap_mpu_read_sched_clock(void) { - u32 cyc = ~omap_mpu_timer_read(1); - update_sched_clock(&cd, cyc, (u32)~0); + return ~omap_mpu_timer_read(1); } static void __init omap_init_clocksource(unsigned long rate) @@ -223,7 +201,7 @@ static void __init omap_init_clocksource(unsigned long rate) "%s: can't register clocksource!\n"; omap_mpu_timer_start(1, ~0, 1); - init_sched_clock(&cd, mpu_update_sched_clock, 32, rate); + setup_sched_clock(omap_mpu_read_sched_clock, 32, rate); if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate, 300, 32, clocksource_mmio_readl_down)) @@ -254,30 +232,6 @@ static inline void omap_mpu_timer_init(void) } #endif /* CONFIG_OMAP_MPU_TIMER */ -#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER) -static unsigned long long (*preferred_sched_clock)(void); - -unsigned long long notrace sched_clock(void) -{ - if (!preferred_sched_clock) - return 0; - - return preferred_sched_clock(); -} - -static inline void preferred_sched_clock_init(bool use_32k_sched_clock) -{ - if (use_32k_sched_clock) - preferred_sched_clock = omap_32k_sched_clock; - else - preferred_sched_clock = omap_mpu_sched_clock; -} -#else -static inline void preferred_sched_clock_init(bool use_32k_sched_clcok) -{ -} -#endif - static inline int omap_32k_timer_usable(void) { int res = false; @@ -299,12 +253,8 @@ static inline int omap_32k_timer_usable(void) */ static void __init omap1_timer_init(void) { - if (omap_32k_timer_usable()) { - preferred_sched_clock_init(1); - } else { + if (!omap_32k_timer_usable()) omap_mpu_timer_init(); - preferred_sched_clock_init(0); - } } struct sys_timer omap1_timer = { diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 96604a5..9a54ef4 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -52,7 +52,7 @@ #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> -#include <plat/common.h> +#include "common.h" #include <plat/dmtimer.h> /* diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index e1293aa..4f01533 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -25,6 +25,7 @@ config ARCH_OMAP2 depends on ARCH_OMAP2PLUS default y select CPU_V6 + select MULTI_IRQ_HANDLER config ARCH_OMAP3 bool "TI OMAP3" @@ -36,13 +37,16 @@ config ARCH_OMAP3 select ARCH_HAS_OPP select PM_OPP if PM select ARM_CPU_SUSPEND if PM + select MULTI_IRQ_HANDLER config ARCH_OMAP4 bool "TI OMAP4" default y depends on ARCH_OMAP2PLUS + select CACHE_L2X0 select CPU_V7 select ARM_GIC + select HAVE_SMP select LOCAL_TIMERS if SMP select PL310_ERRATA_588369 select PL310_ERRATA_727915 diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index d704f0a..7370983 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -34,7 +34,7 @@ #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc.h> #include <plat/usb.h> #include <plat/gpmc-smc91x.h> @@ -301,6 +301,8 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = omap_2430sdp_init, .timer = &omap2_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 77142c1..9996334 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -33,7 +33,7 @@ #include <plat/mcspi.h> #include <plat/board.h> #include <plat/usb.h> -#include <plat/common.h> +#include "common.h" #include <plat/dma.h> #include <plat/gpmc.h> #include <video/omapdss.h> @@ -728,6 +728,8 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap_3430sdp_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index f552305..6ef350d 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -16,7 +16,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <plat/common.h> +#include "common.h" #include <plat/board.h> #include <plat/gpmc-smc91x.h> #include <plat/usb.h> @@ -215,6 +215,8 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap_sdp_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index ba23224..594c8ab 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -27,13 +27,13 @@ #include <linux/leds_pwm.h> #include <mach/hardware.h> -#include <mach/omap4-common.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/usb.h> #include <plat/mmc.h> #include <plat/omap4-keypad.h> @@ -985,6 +985,8 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, + .handle_irq = gic_handle_irq, .init_machine = omap_4430sdp_init, .timer = &omap4_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 7834536..c3851e8 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -27,7 +27,7 @@ #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/usb.h> #include "mux.h" @@ -98,6 +98,8 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = am3517_crane_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index f7df8d3..4b1cfe3 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -33,7 +33,7 @@ #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/usb.h> #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> @@ -513,6 +513,8 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = am3517_evm_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index de8134b..ac77382 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -37,7 +37,7 @@ #include <plat/led.h> #include <plat/usb.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc.h> #include <video/omapdss.h> @@ -354,6 +354,8 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = omap_apollon_init, .timer = &omap2_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index bd1bcac..1545102 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -37,7 +37,7 @@ #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/nand.h> #include <plat/gpmc.h> #include <plat/usb.h> @@ -634,8 +634,10 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t35_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END MACHINE_START(CM_T3730, "Compulab CM-T3730") @@ -644,6 +646,8 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730") .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t3730_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 3f4dc66..f36d694 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -39,7 +39,7 @@ #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/usb.h> #include <plat/nand.h> #include <plat/gpmc.h> @@ -299,6 +299,8 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .map_io = omap3_map_io, .init_early = am35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = cm_t3517_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 90154e4..e873063 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -41,7 +41,7 @@ #include <asm/mach/flash.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc.h> #include <plat/nand.h> #include <plat/usb.h> @@ -660,6 +660,8 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = devkit8000_init, .timer = &omap3_secure_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index fb55fa3d..f8c5b2c 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -20,8 +20,7 @@ #include <asm/mach/arch.h> #include <plat/board.h> -#include <plat/common.h> -#include <mach/omap4-common.h> +#include "common.h" #include "common-board-devices.h" /* @@ -107,6 +106,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .init_machine = omap_generic_init, .timer = &omap2_timer, .dt_compat = omap242x_boards_compat, + .restart = omap_prcm_restart, MACHINE_END #endif @@ -122,9 +122,11 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = omap_generic_init, .timer = &omap2_timer, .dt_compat = omap243x_boards_compat, + .restart = omap_prcm_restart, MACHINE_END #endif @@ -143,6 +145,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .init_machine = omap3_init, .timer = &omap3_timer, .dt_compat = omap3_boards_compat, + .restart = omap_prcm_restart, MACHINE_END #endif @@ -161,5 +164,6 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") .init_machine = omap4_init, .timer = &omap4_timer, .dt_compat = omap4_boards_compat, + .restart = omap_prcm_restart, MACHINE_END #endif diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 8b351d9..54af800 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -34,7 +34,7 @@ #include <plat/usb.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/menelaus.h> #include <plat/dma.h> #include <plat/gpmc.h> @@ -396,6 +396,8 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = omap_h4_init, .timer = &omap2_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index d0a3f78..a59ace0 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -28,7 +28,7 @@ #include <asm/mach/arch.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc.h> #include <plat/usb.h> #include <video/omapdss.h> @@ -672,8 +672,10 @@ MACHINE_START(IGEP0020, "IGEP v2 board") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = igep_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END MACHINE_START(IGEP0030, "IGEP OMAP3 module") @@ -682,6 +684,8 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = igep_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index e179da0..2d2a61f 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -36,7 +36,7 @@ #include <plat/mcspi.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc.h> #include <mach/board-zoom.h> @@ -434,6 +434,8 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap_ldp_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index e9d5f4a..cef2cf1 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -26,7 +26,7 @@ #include <asm/mach-types.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/menelaus.h> #include <mach/irqs.h> #include <plat/mcspi.h> @@ -689,8 +689,10 @@ MACHINE_START(NOKIA_N800, "Nokia N800") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = n8x0_init_machine, .timer = &omap2_timer, + .restart = omap_prcm_restart, MACHINE_END MACHINE_START(NOKIA_N810, "Nokia N810") @@ -699,8 +701,10 @@ MACHINE_START(NOKIA_N810, "Nokia N810") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = n8x0_init_machine, .timer = &omap2_timer, + .restart = omap_prcm_restart, MACHINE_END MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") @@ -709,6 +713,8 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, + .handle_irq = omap2_intc_handle_irq, .init_machine = n8x0_init_machine, .timer = &omap2_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 4a71cb7..7ffcd28 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -40,7 +40,7 @@ #include <asm/mach/flash.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <video/omapdss.h> #include <video/omap-panel-dvi.h> #include <plat/gpmc.h> @@ -559,6 +559,8 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .map_io = omap3_map_io, .init_early = omap3_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_beagle_init, .timer = &omap3_secure_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index ec00b2e..003fe34 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -43,7 +43,7 @@ #include <plat/board.h> #include <plat/usb.h> -#include <plat/common.h> +#include "common.h" #include <plat/mcspi.h> #include <video/omapdss.h> #include <video/omap-panel-dvi.h> @@ -681,6 +681,8 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_evm_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 7c0f193..4198dd0 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -40,7 +40,7 @@ #include <plat/mux.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc-smsc911x.h> #include <plat/gpmc.h> #include <plat/sdrc.h> @@ -208,8 +208,10 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3logic_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") @@ -217,6 +219,8 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3logic_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index f7811f4..1644b73 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -41,7 +41,7 @@ #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <mach/hardware.h> #include <plat/mcspi.h> #include <plat/usb.h> @@ -606,6 +606,8 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3pandora_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index ddb7d66..cb089a4 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -35,7 +35,7 @@ #include <asm/mach/flash.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc.h> #include <plat/nand.h> #include <plat/usb.h> @@ -454,6 +454,8 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_stalker_init, .timer = &omap3_secure_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index a2d0d19..a0b851a 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -44,7 +44,7 @@ #include <asm/mach/flash.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/gpmc.h> #include <plat/nand.h> #include <plat/usb.h> @@ -381,6 +381,8 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap3_touchbook_init, .timer = &omap3_secure_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index a8c2c42..8b06c6a 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -30,14 +30,14 @@ #include <linux/wl12xx.h> #include <mach/hardware.h> -#include <mach/omap4-common.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <video/omapdss.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/usb.h> #include <plat/mmc.h> #include <video/omap-panel-dvi.h> @@ -577,6 +577,8 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, + .handle_irq = gic_handle_irq, .init_machine = omap4_panda_init, .timer = &omap4_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 4cf7aea..52c0cef 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -43,7 +43,7 @@ #include <asm/mach/map.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <video/omapdss.h> #include <video/omap-panel-generic-dpi.h> #include <video/omap-panel-dvi.h> @@ -562,6 +562,8 @@ MACHINE_START(OVERO, "Gumstix Overo") .map_io = omap3_map_io, .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = overo_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 616fb39..8678b38 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -25,7 +25,7 @@ #include <plat/mmc.h> #include <plat/usb.h> #include <plat/gpmc.h> -#include <plat/common.h> +#include "common.h" #include <plat/onenand.h> #include "mux.h" @@ -149,6 +149,8 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = rm680_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index c15c5c9..108fee6 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -27,7 +27,7 @@ #include <plat/mcspi.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/dma.h> #include <plat/gpmc.h> #include <plat/onenand.h> diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 4af7c4b..27f01f0 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -25,7 +25,7 @@ #include <plat/mcspi.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" #include <plat/dma.h> #include <plat/gpmc.h> #include <plat/usb.h> @@ -127,6 +127,8 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = rx51_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index e6ee884..74713e3 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -22,7 +22,7 @@ #include <plat/irqs.h> #include <plat/board.h> -#include <plat/common.h> +#include "common.h" static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { }; @@ -48,4 +48,5 @@ MACHINE_START(TI8168EVM, "ti8168evm") .init_irq = ti816x_init_irq, .timer = &omap3_timer, .init_machine = ti8168_evm_init, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 6d0aa4f..8d7ce11 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -24,7 +24,7 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/common.h> +#include "common.h" #include <plat/usb.h> #include <mach/board-zoom.h> diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index be6684d..5c20bcc 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -21,7 +21,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <plat/common.h> +#include "common.h" #include <plat/board.h> #include <plat/usb.h> @@ -135,8 +135,10 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap_zoom_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") @@ -145,6 +147,8 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, + .handle_irq = omap3_intc_handle_irq, .init_machine = omap_zoom_init, .timer = &omap3_timer, + .restart = omap_prcm_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c index 38830d8..04d39cd 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c @@ -18,7 +18,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include "cm.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c index e96f53e..6a83630 100644 --- a/arch/arm/mach-omap2/cm44xx.c +++ b/arch/arm/mach-omap2/cm44xx.c @@ -18,7 +18,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include "cm.h" #include "cm1_44xx.h" diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index eb2a472..6204dea 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -20,7 +20,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include "cm.h" #include "cm1_44xx.h" diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 110e5b9..684b8a7 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -17,7 +17,7 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include <plat/board.h> #include <plat/mux.h> diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h new file mode 100644 index 0000000..cda888a --- /dev/null +++ b/arch/arm/mach-omap2/common.h @@ -0,0 +1,186 @@ +/* + * Header for code common to all OMAP2+ machines. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H +#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H + +#include <linux/delay.h> +#include <plat/common.h> + +#ifdef CONFIG_SOC_OMAP2420 +extern void omap242x_map_common_io(void); +#else +static inline void omap242x_map_common_io(void) +{ +} +#endif + +#ifdef CONFIG_SOC_OMAP2430 +extern void omap243x_map_common_io(void); +#else +static inline void omap243x_map_common_io(void) +{ +} +#endif + +#ifdef CONFIG_ARCH_OMAP3 +extern void omap34xx_map_common_io(void); +#else +static inline void omap34xx_map_common_io(void) +{ +} +#endif + +#ifdef CONFIG_SOC_OMAPTI816X +extern void omapti816x_map_common_io(void); +#else +static inline void omapti816x_map_common_io(void) +{ +} +#endif + +#ifdef CONFIG_ARCH_OMAP4 +extern void omap44xx_map_common_io(void); +#else +static inline void omap44xx_map_common_io(void) +{ +} +#endif + +extern void omap2_init_common_infrastructure(void); + +extern struct sys_timer omap2_timer; +extern struct sys_timer omap3_timer; +extern struct sys_timer omap3_secure_timer; +extern struct sys_timer omap4_timer; + +void omap2420_init_early(void); +void omap2430_init_early(void); +void omap3430_init_early(void); +void omap35xx_init_early(void); +void omap3630_init_early(void); +void omap3_init_early(void); /* Do not use this one */ +void am35xx_init_early(void); +void ti816x_init_early(void); +void omap4430_init_early(void); +void omap_prcm_restart(char, const char *); + +/* + * IO bases for various OMAP processors + * Except the tap base, rest all the io bases + * listed are physical addresses. + */ +struct omap_globals { + u32 class; /* OMAP class to detect */ + void __iomem *tap; /* Control module ID code */ + void __iomem *sdrc; /* SDRAM Controller */ + void __iomem *sms; /* SDRAM Memory Scheduler */ + void __iomem *ctrl; /* System Control Module */ + void __iomem *ctrl_pad; /* PAD Control Module */ + void __iomem *prm; /* Power and Reset Management */ + void __iomem *cm; /* Clock Management */ + void __iomem *cm2; +}; + +void omap2_set_globals_242x(void); +void omap2_set_globals_243x(void); +void omap2_set_globals_3xxx(void); +void omap2_set_globals_443x(void); +void omap2_set_globals_ti816x(void); + +/* These get called from omap2_set_globals_xxxx(), do not call these */ +void omap2_set_globals_tap(struct omap_globals *); +void omap2_set_globals_sdrc(struct omap_globals *); +void omap2_set_globals_control(struct omap_globals *); +void omap2_set_globals_prcm(struct omap_globals *); + +void omap242x_map_io(void); +void omap243x_map_io(void); +void omap3_map_io(void); +void omap4_map_io(void); + +/** + * omap_test_timeout - busy-loop, testing a condition + * @cond: condition to test until it evaluates to true + * @timeout: maximum number of microseconds in the timeout + * @index: loop index (integer) + * + * Loop waiting for @cond to become true or until at least @timeout + * microseconds have passed. To use, define some integer @index in the + * calling code. After running, if @index == @timeout, then the loop has + * timed out. + */ +#define omap_test_timeout(cond, timeout, index) \ +({ \ + for (index = 0; index < timeout; index++) { \ + if (cond) \ + break; \ + udelay(1); \ + } \ +}) + +extern struct device *omap2_get_mpuss_device(void); +extern struct device *omap2_get_iva_device(void); +extern struct device *omap2_get_l3_device(void); +extern struct device *omap4_get_dsp_device(void); + +void omap2_init_irq(void); +void omap3_init_irq(void); +void ti816x_init_irq(void); +extern int omap_irq_pending(void); +void omap_intc_save_context(void); +void omap_intc_restore_context(void); +void omap3_intc_suspend(void); +void omap3_intc_prepare_idle(void); +void omap3_intc_resume_idle(void); +void omap2_intc_handle_irq(struct pt_regs *regs); +void omap3_intc_handle_irq(struct pt_regs *regs); + +/* + * wfi used in low power code. Directly opcode is used instead + * of instruction to avoid mulit-omap build break + */ +#ifdef CONFIG_THUMB2_KERNEL +#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory") +#else +#define do_wfi() \ + __asm__ __volatile__ (".word 0xe320f003" : : : "memory") +#endif + +#ifdef CONFIG_CACHE_L2X0 +extern void __iomem *l2cache_base; +#endif + +extern void __init gic_init_irq(void); +extern void omap_smc1(u32 fn, u32 arg); + +#ifdef CONFIG_SMP +/* Needed for secondary core boot */ +extern void omap_secondary_startup(void); +extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); +extern void omap_auxcoreboot_addr(u32 cpu_addr); +extern u32 omap_read_auxcoreboot0(void); +#endif + +#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index e34d27f..114c037 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -15,7 +15,7 @@ #include <linux/kernel.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include <plat/sdrc.h> #include "cm-regbits-34xx.h" diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 942bb4f..e20332f 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -34,6 +34,7 @@ #include "pm.h" #include "control.h" +#include "common.h" #ifdef CONFIG_CPU_IDLE diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index dce9905..bc6cf86 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -22,12 +22,13 @@ #include <linux/io.h> #include <linux/clk.h> #include <linux/err.h> +#include <linux/delay.h> #include <video/omapdss.h> #include <plat/omap_hwmod.h> #include <plat/omap_device.h> #include <plat/omap-pm.h> -#include <plat/common.h> +#include "common.h" #include "control.h" #include "display.h" diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index ace9994..a12e224 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -21,7 +21,7 @@ #include <plat/cpu.h> #include <plat/i2c.h> -#include <plat/common.h> +#include "common.h" #include <plat/omap_hwmod.h> #include "mux.h" diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 7f47092..27ad722 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -21,7 +21,7 @@ #include <asm/cputype.h> -#include <plat/common.h> +#include "common.h" #include <plat/cpu.h> #include <mach/id.h> diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index feb90a1..56964a0 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -10,146 +10,9 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <mach/io.h> -#include <mach/irqs.h> -#include <asm/hardware/gic.h> - -#include <plat/omap24xx.h> -#include <plat/omap34xx.h> -#include <plat/omap44xx.h> - -#include <plat/multi.h> - -#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) -#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) -#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) -#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ -#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ .macro disable_fiq .endm .macro arch_ret_to_user, tmp1, tmp2 .endm - -/* - * Unoptimized irq functions for multi-omap2, 3 and 4 - */ - -#ifdef MULTI_OMAP2 - /* - * Configure the interrupt base on the first interrupt. - * See also omap_irq_base_init for setting omap_irq_base. - */ - .macro get_irqnr_preamble, base, tmp - ldr \base, =omap_irq_base @ irq base address - ldr \base, [\base, #0] @ irq base value - .endm - - /* Check the pending interrupts. Note that base already set */ - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - tst \base, #0x100 @ gic address? - bne 4401f @ found gic - - /* Handle omap2 and omap3 */ - ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ - cmp \irqnr, #0x0 - bne 9998f - ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ - cmp \irqnr, #0x0 - bne 9998f - ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ - cmp \irqnr, #0x0 - bne 9998f - - /* - * ti816x has additional IRQ pending register. Checking this - * register on omap2 & omap3 has no effect (read as 0). - */ - ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */ - cmp \irqnr, #0x0 -9998: - ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] - and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ - b 9999f - - /* Handle omap4 */ -4401: ldr \irqstat, [\base, #GIC_CPU_INTACK] - ldr \tmp, =1021 - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #15 - cmpcc \irqnr, \irqnr - cmpne \irqnr, \tmp - cmpcs \irqnr, \irqnr -9999: - .endm - -#ifdef CONFIG_SMP - /* We assume that irqstat (the raw value of the IRQ acknowledge - * register) is preserved from the macro above. - * If there is an IPI, we immediately signal end of interrupt - * on the controller, since this requires the original irqstat - * value which we won't easily be able to recreate later. - */ - - .macro test_for_ipi, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #16 - it cc - strcc \irqstat, [\base, #GIC_CPU_EOI] - it cs - cmpcs \irqnr, \irqnr - .endm -#endif /* CONFIG_SMP */ - -#else /* MULTI_OMAP2 */ - - -/* - * Optimized irq functions for omap2, 3 and 4 - */ - -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) - .macro get_irqnr_preamble, base, tmp -#ifdef CONFIG_ARCH_OMAP2 - ldr \base, =OMAP2_IRQ_BASE -#else - ldr \base, =OMAP3_IRQ_BASE -#endif - .endm - - /* Check the pending interrupts. Note that base already set */ - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ - cmp \irqnr, #0x0 - bne 9999f - ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ - cmp \irqnr, #0x0 - bne 9999f - ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ - cmp \irqnr, #0x0 -#ifdef CONFIG_SOC_OMAPTI816X - bne 9999f - ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */ - cmp \irqnr, #0x0 -#endif -9999: - ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] - and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ - - .endm -#endif - - -#ifdef CONFIG_ARCH_OMAP4 -#define HAVE_GET_IRQNR_PREAMBLE -#include <asm/hardware/entry-macro-gic.S> - - .macro get_irqnr_preamble, base, tmp - ldr \base, =OMAP4_IRQ_BASE - .endm - -#endif - -#endif /* MULTI_OMAP2 */ diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h deleted file mode 100644 index e4bd87619..0000000 --- a/arch/arm/mach-omap2/include/mach/omap4-common.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * omap4-common.h: OMAP4 specific common header file - * - * Copyright (C) 2010 Texas Instruments, Inc. - * - * Author: - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef OMAP_ARCH_OMAP4_COMMON_H -#define OMAP_ARCH_OMAP4_COMMON_H - -/* - * wfi used in low power code. Directly opcode is used instead - * of instruction to avoid mulit-omap build break - */ -#ifdef CONFIG_THUMB2_KERNEL -#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory") -#else -#define do_wfi() \ - __asm__ __volatile__ (".word 0xe320f003" : : : "memory") -#endif - -#ifdef CONFIG_CACHE_L2X0 -extern void __iomem *l2cache_base; -#endif - -extern void __iomem *gic_dist_base_addr; - -extern void __init gic_init_irq(void); -extern void omap_smc1(u32 fn, u32 arg); - -#ifdef CONFIG_SMP -/* Needed for secondary core boot */ -extern void omap_secondary_startup(void); -extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); -extern void omap_auxcoreboot_addr(u32 cpu_addr); -extern u32 omap_read_auxcoreboot0(void); -#endif -#endif diff --git a/arch/arm/mach-omap2/include/mach/vmalloc.h b/arch/arm/mach-omap2/include/mach/vmalloc.h deleted file mode 100644 index 8663199..0000000 --- a/arch/arm/mach-omap2/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/vmalloc.h - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xf8000000UL diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 25d20ce..3f565dd 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -35,7 +35,7 @@ #include "clock3xxx.h" #include "clock44xx.h" -#include <plat/common.h> +#include "common.h" #include <plat/omap-pm.h> #include "voltage.h" #include "powerdomain.h" @@ -43,7 +43,7 @@ #include "clockdomain.h" #include <plat/omap_hwmod.h> #include <plat/multi.h> -#include <plat/common.h> +#include "common.h" /* * The machine specific code may provide the extra mapping besides the @@ -316,13 +316,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); } -/* See irq.c, omap4-common.c and entry-macro.S */ -void __iomem *omap_irq_base; - static void __init omap_common_init_early(void) { omap2_check_revision(); - omap_ioremap_init(); omap_init_consistent_dma_size(); } diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 65f1be6..42b1d65 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -15,6 +15,7 @@ #include <linux/interrupt.h> #include <linux/io.h> #include <mach/hardware.h> +#include <asm/exception.h> #include <asm/mach/irq.h> @@ -35,6 +36,11 @@ /* Number of IRQ state bits in each MIR register */ #define IRQ_BITS_PER_REG 32 +#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) +#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) +#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ +#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ + /* * OMAP2 has a number of different interrupt controllers, each interrupt * controller is identified as its own "bank". Register definitions are @@ -143,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) static void __init omap_init_irq(u32 base, int nr_irqs) { + void __iomem *omap_irq_base; unsigned long nr_of_irqs = 0; unsigned int nr_banks = 0; int i, j; @@ -191,6 +198,44 @@ void __init ti816x_init_irq(void) omap_init_irq(OMAP34XX_IC_BASE, 128); } +static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs) +{ + u32 irqnr; + + do { + irqnr = readl_relaxed(base_addr + 0x98); + if (irqnr) + goto out; + + irqnr = readl_relaxed(base_addr + 0xb8); + if (irqnr) + goto out; + + irqnr = readl_relaxed(base_addr + 0xd8); +#ifdef CONFIG_SOC_OMAPTI816X + if (irqnr) + goto out; + irqnr = readl_relaxed(base_addr + 0xf8); +#endif + +out: + if (!irqnr) + break; + + irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET); + irqnr &= ACTIVEIRQ_MASK; + + if (irqnr) + handle_IRQ(irqnr, regs); + } while (irqnr); +} + +asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs) +{ + void __iomem *base_addr = OMAP2_IRQ_BASE; + omap_intc_handle_irq(base_addr, regs); +} + #ifdef CONFIG_ARCH_OMAP3 static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; @@ -263,4 +308,10 @@ void omap3_intc_resume_idle(void) /* Re-enable autoidle */ intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG); } + +asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs) +{ + void __iomem *base_addr = OMAP3_IRQ_BASE; + omap_intc_handle_irq(base_addr, regs); +} #endif /* CONFIG_ARCH_OMAP3 */ diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c index 4976b93..e5a1c3f 100644 --- a/arch/arm/mach-omap2/omap-hotplug.c +++ b/arch/arm/mach-omap2/omap-hotplug.c @@ -19,7 +19,8 @@ #include <linux/smp.h> #include <asm/cacheflush.h> -#include <mach/omap4-common.h> + +#include "common.h" int platform_cpu_kill(unsigned int cpu) { diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 4412ddb..e99bc6c 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -24,7 +24,8 @@ #include <asm/hardware/gic.h> #include <asm/smp_scu.h> #include <mach/hardware.h> -#include <mach/omap4-common.h> + +#include "common.h" /* SCU base address */ static void __iomem *scu_base; diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 35ac3e5..beecfdd 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -22,17 +22,18 @@ #include <plat/irqs.h> #include <mach/hardware.h> -#include <mach/omap4-common.h> + +#include "common.h" #ifdef CONFIG_CACHE_L2X0 void __iomem *l2cache_base; #endif -void __iomem *gic_dist_base_addr; - - void __init gic_init_irq(void) { + void __iomem *omap_irq_base; + void __iomem *gic_dist_base_addr; + /* Static mapping, never released */ gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); BUG_ON(!gic_dist_base_addr); diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 207a2ff..529142a 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -137,7 +137,7 @@ #include <linux/mutex.h> #include <linux/spinlock.h> -#include <plat/common.h> +#include "common.h" #include <plat/cpu.h> #include "clockdomain.h" #include "powerdomain.h" diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 00bff46..1881fe9 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -18,7 +18,7 @@ #include <plat/omap-pm.h> #include <plat/omap_device.h> -#include <plat/common.h> +#include "common.h" #include "voltage.h" #include "powerdomain.h" diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index cf0c216..ef8595c 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -42,6 +42,7 @@ #include <plat/dma.h> #include <plat/board.h> +#include "common.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "cm2xxx_3xxx.h" diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index efa6649..fa637df 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -42,6 +42,7 @@ #include <plat/gpmc.h> #include <plat/dma.h> +#include "common.h" #include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" #include "prm-regbits-34xx.h" diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index 59a870b..8edb015 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c @@ -16,8 +16,8 @@ #include <linux/err.h> #include <linux/slab.h> +#include "common.h" #include "powerdomain.h" -#include <mach/omap4-common.h> struct power_state { struct powerdomain *pwrdm; diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 597e2da..626acfa 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -25,8 +25,7 @@ #include <linux/delay.h> #include <linux/export.h> -#include <mach/system.h> -#include <plat/common.h> +#include "common.h" #include <plat/prcm.h> #include <plat/irqs.h> @@ -59,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void) EXPORT_SYMBOL(omap_prcm_get_reset_sources); /* Resets clock rates and reboots the system. Only called from system.h */ -static void omap_prcm_arch_reset(char mode, const char *cmd) +void omap_prcm_restart(char mode, const char *cmd) { s16 prcm_offs = 0; @@ -110,8 +109,6 @@ static void omap_prcm_arch_reset(char mode, const char *cmd) omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ } -void (*arch_reset)(char, const char *) = omap_prcm_arch_reset; - /** * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness * @reg: physical address of module IDLEST register diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c index 171fe17..ca669b5 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.c +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c @@ -15,7 +15,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include "prcm_mpu44xx.h" #include "cm-regbits-44xx.h" diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index f02d87f..9a08ba3 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -16,7 +16,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include <plat/cpu.h> #include <plat/prcm.h> diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 495a31a..dd885ee 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -17,7 +17,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include <plat/cpu.h> #include <plat/prcm.h> diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index 3a7bab1..f6de5bc 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -16,7 +16,7 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include "prm44xx.h" #include "prminst44xx.h" diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c index 14caa22..ee3a8ad 100644 --- a/arch/arm/mach-omap2/sdram-nokia.c +++ b/arch/arm/mach-omap2/sdram-nokia.c @@ -18,7 +18,7 @@ #include <linux/io.h> #include <plat/io.h> -#include <plat/common.h> +#include "common.h" #include <plat/clock.h> #include <plat/sdrc.h> diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index 8f27828..e3d345f 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -23,7 +23,7 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include <plat/clock.h> #include <plat/sram.h> diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index ccdb010..791a63c 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c @@ -24,7 +24,7 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/common.h> +#include "common.h" #include <plat/clock.h> #include <plat/sram.h> diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 9992dbf..42c3267 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -33,7 +33,7 @@ #include <plat/omap-serial.h> #endif -#include <plat/common.h> +#include "common.h" #include <plat/board.h> #include <plat/clock.h> #include <plat/dma.h> diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index cf246b3..9dd93453 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -26,7 +26,7 @@ #include <linux/slab.h> #include <linux/pm_runtime.h> -#include <plat/common.h> +#include "common.h" #include "pm.h" #include "smartreflex.h" diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 037b0d7..6eeff0e 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -41,7 +41,7 @@ #include <plat/dmtimer.h> #include <asm/localtimer.h> #include <asm/sched_clock.h> -#include <plat/common.h> +#include "common.h" #include <plat/omap_hwmod.h> #include <plat/omap_device.h> #include <plat/omap-pm.h> @@ -254,7 +254,6 @@ static struct omap_dm_timer clksrc; /* * clocksource */ -static DEFINE_CLOCK_DATA(cd); static cycle_t clocksource_read_cycles(struct clocksource *cs) { return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); @@ -268,23 +267,12 @@ static struct clocksource clocksource_gpt = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -static void notrace dmtimer_update_sched_clock(void) +static u32 notrace dmtimer_read_sched_clock(void) { - u32 cyc; - - cyc = __omap_dm_timer_read_counter(&clksrc, 1); - - update_sched_clock(&cd, cyc, (u32)~0); -} - -unsigned long long notrace sched_clock(void) -{ - u32 cyc = 0; - if (clksrc.reserved) - cyc = __omap_dm_timer_read_counter(&clksrc, 1); + return __omap_dm_timer_read_counter(clksrc.io_base, 1); - return cyc_to_sched_clock(&cd, cyc, (u32)~0); + return 0; } /* Setup free-running counter for clocksource */ @@ -301,7 +289,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id, __omap_dm_timer_load_start(&clksrc, OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); - init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); + setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate); if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) pr_err("Could not register clocksource %s\n", diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index cfe348e..a5ec7f8f 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -18,7 +18,7 @@ #include <linux/err.h> #include <linux/init.h> -#include <plat/common.h> +#include "common.h" #include "prm-regbits-34xx.h" #include "voltage.h" diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 2740a96..d70b930 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -18,7 +18,7 @@ #include <linux/err.h> #include <linux/init.h> -#include <plat/common.h> +#include "common.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 1f8fdf7..8a36342 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -27,7 +27,7 @@ #include <linux/slab.h> #include <linux/clk.h> -#include <plat/common.h> +#include "common.h" #include "prm-regbits-34xx.h" #include "prm-regbits-44xx.h" diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 071101d..474559d 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -18,7 +18,7 @@ #include <linux/err.h> #include <linux/init.h> -#include <plat/common.h> +#include "common.h" #include <plat/cpu.h> #include "prm-regbits-34xx.h" diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index c4584e9..4e11d02 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -21,7 +21,7 @@ #include <linux/err.h> #include <linux/init.h> -#include <plat/common.h> +#include "common.h" #include "prm-regbits-44xx.h" #include "prm44xx.h" diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 66bd700..807391d 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -1,7 +1,7 @@ #include <linux/kernel.h> #include <linux/init.h> -#include <plat/common.h> +#include "common.h" #include "voltage.h" #include "vp.h" diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index 260c554..bd89f80 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -19,7 +19,7 @@ #include <linux/err.h> #include <linux/init.h> -#include <plat/common.h> +#include "common.h" #include "prm-regbits-34xx.h" #include "voltage.h" diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index b4e7704..8c031d1 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -19,7 +19,7 @@ #include <linux/err.h> #include <linux/init.h> -#include <plat/common.h> +#include "common.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 22ace0b..41127e8 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -18,6 +18,7 @@ #include <linux/mbus.h> #include <linux/mv643xx_i2c.h> #include <linux/ata_platform.h> +#include <linux/delay.h> #include <net/dsa.h> #include <asm/page.h> #include <asm/setup.h> @@ -304,6 +305,17 @@ void __init orion5x_init(void) orion5x_wdt_init(); } +void orion5x_restart(char mode, const char *cmd) +{ + /* + * Enable and issue soft reset + */ + orion5x_setbits(RSTOUTn_MASK, (1 << 2)); + orion5x_setbits(CPU_SOFT_RESET, 1); + mdelay(200); + orion5x_clrbits(CPU_SOFT_RESET, 1); +} + /* * Many orion-based systems have buggy bootloader implementations. * This is a common fixup for bogus memory tags. diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index 909489f..37ef18d 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -39,6 +39,7 @@ void orion5x_spi_init(void); void orion5x_uart0_init(void); void orion5x_uart1_init(void); void orion5x_xor_init(void); +void orion5x_restart(char, const char *); /* * PCIe/PCI functions. diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c index 8c83009..d75dcfa 100644 --- a/arch/arm/mach-orion5x/d2net-setup.c +++ b/arch/arm/mach-orion5x/d2net-setup.c @@ -343,6 +343,7 @@ MACHINE_START(D2NET, "LaCie d2 Network") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END #endif @@ -355,6 +356,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END #endif diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index 4b79a80..a104d5a 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -364,4 +364,5 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 343f60e..91b0f47 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -736,4 +736,5 @@ MACHINE_START(DNS323, "D-Link DNS-323") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c index 70a4e92..355e962 100644 --- a/arch/arm/mach-orion5x/edmini_v2-setup.c +++ b/arch/arm/mach-orion5x/edmini_v2-setup.c @@ -258,4 +258,5 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h index c519610..e9d9afd 100644 --- a/arch/arm/mach-orion5x/include/mach/io.h +++ b/arch/arm/mach-orion5x/include/mach/io.h @@ -15,31 +15,6 @@ #define IO_SPACE_LIMIT 0xffffffff -static inline void __iomem * -__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype) -{ - void __iomem *retval; - unsigned long offs = paddr - ORION5X_REGS_PHYS_BASE; - if (mtype == MT_DEVICE && size && offs < ORION5X_REGS_SIZE && - size <= ORION5X_REGS_SIZE && offs + size <= ORION5X_REGS_SIZE) { - retval = (void __iomem *)ORION5X_REGS_VIRT_BASE + offs; - } else { - retval = __arm_ioremap(paddr, size, mtype); - } - - return retval; -} - -static inline void -__arch_iounmap(void __iomem *addr) -{ - if (addr < (void __iomem *)ORION5X_REGS_VIRT_BASE || - addr >= (void __iomem *)(ORION5X_REGS_VIRT_BASE + ORION5X_REGS_SIZE)) - __iounmap(addr); -} - -#define __arch_ioremap __arch_ioremap -#define __arch_iounmap __arch_iounmap #define __io(a) __typesafe_io(a) #define __mem_pci(a) (a) diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h index a1d6e46..825a265 100644 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ b/arch/arm/mach-orion5x/include/mach/system.h @@ -11,23 +11,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/bridge-regs.h> - static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * Enable and issue soft reset - */ - orion5x_setbits(RSTOUTn_MASK, (1 << 2)); - orion5x_setbits(CPU_SOFT_RESET, 1); - mdelay(200); - orion5x_clrbits(CPU_SOFT_RESET, 1); -} - - #endif diff --git a/arch/arm/mach-orion5x/include/mach/vmalloc.h b/arch/arm/mach-orion5x/include/mach/vmalloc.h deleted file mode 100644 index 06b50ae..0000000 --- a/arch/arm/mach-orion5x/include/mach/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/vmalloc.h - */ - -#define VMALLOC_END 0xfd800000UL diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index d3cd3f6..47587b8 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -386,6 +386,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END #endif @@ -399,5 +400,6 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END #endif diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c index 9503fff..5272131 100644 --- a/arch/arm/mach-orion5x/ls-chl-setup.c +++ b/arch/arm/mach-orion5x/ls-chl-setup.c @@ -140,7 +140,7 @@ static struct mv_sata_platform_data lschl_sata_data = { static void lschl_power_off(void) { - arm_machine_restart('h', NULL); + orion5x_restart('h', NULL); } /***************************************************************************** @@ -325,4 +325,5 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c index ed6d772..9a8697b 100644 --- a/arch/arm/mach-orion5x/ls_hgl-setup.c +++ b/arch/arm/mach-orion5x/ls_hgl-setup.c @@ -186,7 +186,7 @@ static struct mv_sata_platform_data ls_hgl_sata_data = { static void ls_hgl_power_off(void) { - arm_machine_restart('h', NULL); + orion5x_restart('h', NULL); } @@ -272,4 +272,5 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c index 743f7f1..09c7365 100644 --- a/arch/arm/mach-orion5x/lsmini-setup.c +++ b/arch/arm/mach-orion5x/lsmini-setup.c @@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = { static void lsmini_power_off(void) { - arm_machine_restart('h', NULL); + orion5x_restart('h', NULL); } @@ -274,5 +274,6 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END #endif diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 6020e26b..65faaa3 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -267,5 +267,6 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II") .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, - .fixup = tag_fixup_mem32 + .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index 201ae36..c87fde4 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c @@ -234,5 +234,6 @@ MACHINE_START(MV2120, "HP Media Vault mv2120") .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, - .fixup = tag_fixup_mem32 + .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c index 6197c79..0180c39 100644 --- a/arch/arm/mach-orion5x/net2big-setup.c +++ b/arch/arm/mach-orion5x/net2big-setup.c @@ -426,5 +426,6 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index ebd6767..292038f 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -175,4 +175,5 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index 05db2d3..c44eaba 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -187,4 +187,5 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index e47fa05..96438b6 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -311,4 +311,5 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c index 6431725..2c5fab0 100644 --- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c @@ -128,4 +128,5 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c index 29f1526..632a861 100644 --- a/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -364,4 +364,5 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 31e51f9..5d64087 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -178,7 +178,7 @@ static struct hw_pci qnap_ts209_pci __initdata = { static int __init qnap_ts209_pci_init(void) { - if (machine_is_ts_x09()) + if (machine_is_ts209()) pci_common_init(&qnap_ts209_pci); return 0; @@ -329,4 +329,5 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index 0fbcc14..4e6ff75 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c @@ -318,4 +318,5 @@ MACHINE_START(TS409, "QNAP TS-409") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index b35e200..c96f374 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -627,4 +627,5 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") .init_early = orion5x_init_early, .init_irq = orion5x_init_irq, .timer = &orion5x_timer, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index b8be7d8..078c03f 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -179,4 +179,5 @@ MACHINE_START(WNR854T, "Netgear WNR854T") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index faf81a0..46a9778 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -267,4 +267,5 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") .init_irq = orion5x_init_irq, .timer = &orion5x_timer, .fixup = tag_fixup_mem32, + .restart = orion5x_restart, MACHINE_END diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile index c550b63..e5ec4a8 100644 --- a/arch/arm/mach-picoxcell/Makefile +++ b/arch/arm/mach-picoxcell/Makefile @@ -1,3 +1,2 @@ obj-y := common.o obj-y += time.o -obj-y += io.o diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c index 34d0834..febee47 100644 --- a/arch/arm/mach-picoxcell/common.c +++ b/arch/arm/mach-picoxcell/common.c @@ -11,16 +11,30 @@ #include <linux/irqdomain.h> #include <linux/of.h> #include <linux/of_address.h> +#include <linux/of_irq.h> #include <linux/of_platform.h> #include <asm/mach/arch.h> #include <asm/hardware/vic.h> +#include <asm/mach/map.h> #include <mach/map.h> #include <mach/picoxcell_soc.h> #include "common.h" +static struct map_desc io_map __initdata = { + .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE), + .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE), + .length = PICOXCELL_PERIPH_LENGTH, + .type = MT_DEVICE, +}; + +static void __init picoxcell_map_io(void) +{ + iotable_init(&io_map, 1); +} + static void __init picoxcell_init_machine(void) { of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); @@ -33,22 +47,20 @@ static const char *picoxcell_dt_match[] = { }; static const struct of_device_id vic_of_match[] __initconst = { - { .compatible = "arm,pl192-vic" }, + { .compatible = "arm,pl192-vic", .data = vic_of_init, }, { /* Sentinel */ } }; static void __init picoxcell_init_irq(void) { - vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0); - vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0); - irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0); - irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32); + of_irq_init(vic_of_match); } DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") .map_io = picoxcell_map_io, - .nr_irqs = ARCH_NR_IRQS, + .nr_irqs = NR_IRQS_LEGACY, .init_irq = picoxcell_init_irq, + .handle_irq = vic_handle_irq, .timer = &picoxcell_timer, .init_machine = picoxcell_init_machine, .dt_compat = picoxcell_dt_match, diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h index 5263f0f..83d55ab 100644 --- a/arch/arm/mach-picoxcell/common.h +++ b/arch/arm/mach-picoxcell/common.h @@ -13,6 +13,5 @@ #include <asm/mach/time.h> extern struct sys_timer picoxcell_timer; -extern void picoxcell_map_io(void); #endif /* __PICOXCELL_COMMON_H__ */ diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S index a6b09f7..9b505ac 100644 --- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S +++ b/arch/arm/mach-picoxcell/include/mach/entry-macro.S @@ -9,11 +9,8 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <mach/irqs.h> -#include <mach/map.h> + .macro disable_fiq + .endm -#define VA_VIC0 IO_ADDRESS(PICOXCELL_VIC0_BASE) -#define VA_VIC1 IO_ADDRESS(PICOXCELL_VIC1_BASE) - -#include <asm/entry-macro-vic2.S> + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h index 4d13ed97..59eac1e 100644 --- a/arch/arm/mach-picoxcell/include/mach/irqs.h +++ b/arch/arm/mach-picoxcell/include/mach/irqs.h @@ -1,8 +1,6 @@ /* * Copyright (c) 2011 Picochip Ltd., Jamie Iles * - * This file contains the hardware definitions of the picoXcell SoC devices. - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -16,10 +14,7 @@ #ifndef __MACH_IRQS_H #define __MACH_IRQS_H -#define ARCH_NR_IRQS 64 -#define NR_IRQS (128 + ARCH_NR_IRQS) - -#define IRQ_VIC0_BASE 0 -#define IRQ_VIC1_BASE 32 +/* We dynamically allocate our irq_desc's. */ +#define NR_IRQS 0 #endif /* __MACH_IRQS_H */ diff --git a/arch/arm/mach-picoxcell/include/mach/memory.h b/arch/arm/mach-picoxcell/include/mach/memory.h deleted file mode 100644 index 40a8c17..0000000 --- a/arch/arm/mach-picoxcell/include/mach/memory.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h index 67c589b..1a5d8cb 100644 --- a/arch/arm/mach-picoxcell/include/mach/system.h +++ b/arch/arm/mach-picoxcell/include/mach/system.h @@ -23,9 +23,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(int mode, const char *cmd) -{ - /* Watchdog reset to go here. */ -} - #endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-picoxcell/include/mach/vmalloc.h b/arch/arm/mach-picoxcell/include/mach/vmalloc.h deleted file mode 100644 index 0216cc4..0000000 --- a/arch/arm/mach-picoxcell/include/mach/vmalloc.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (c) 2011 Picochip Ltd., Jamie Iles - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#define VMALLOC_END 0xfe000000UL diff --git a/arch/arm/mach-picoxcell/io.c b/arch/arm/mach-picoxcell/io.c deleted file mode 100644 index 39e9b9e..0000000 --- a/arch/arm/mach-picoxcell/io.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2011 Picochip Ltd., Jamie Iles - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * All enquiries to support@picochip.com - */ -#include <linux/io.h> -#include <linux/mm.h> -#include <linux/module.h> -#include <linux/of.h> - -#include <asm/mach/map.h> - -#include <mach/map.h> -#include <mach/picoxcell_soc.h> - -#include "common.h" - -void __init picoxcell_map_io(void) -{ - struct map_desc io_map = { - .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE), - .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE), - .length = PICOXCELL_PERIPH_LENGTH, - .type = MT_DEVICE, - }; - - iotable_init(&io_map, 1); -} diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c index 90a554f..6c89cf8 100644 --- a/arch/arm/mach-picoxcell/time.c +++ b/arch/arm/mach-picoxcell/time.c @@ -11,7 +11,6 @@ #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> -#include <linux/sched.h> #include <asm/mach/time.h> #include <asm/sched_clock.h> @@ -66,21 +65,11 @@ static void picoxcell_add_clocksource(struct device_node *source_timer) dw_apb_clocksource_register(cs); } -static DEFINE_CLOCK_DATA(cd); static void __iomem *sched_io_base; -unsigned long long notrace sched_clock(void) +unsigned u32 notrace picoxcell_read_sched_clock(void) { - cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0; - - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace picoxcell_update_sched_clock(void) -{ - cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0; - - update_sched_clock(&cd, cyc, (u32)~0); + return __raw_readl(sched_io_base); } static const struct of_device_id picoxcell_rtc_ids[] __initconst = { @@ -100,7 +89,7 @@ static void picoxcell_init_sched_clock(void) timer_get_base_and_rate(sched_timer, &sched_io_base, &rate); of_node_put(sched_timer); - init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate); + setup_sched_clock(picoxcell_read_sched_clock, 32, rate); } static const struct of_device_id picoxcell_timer_ids[] __initconst = { diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c index cdb95e7..4cfb40b 100644 --- a/arch/arm/mach-pnx4008/core.c +++ b/arch/arm/mach-pnx4008/core.c @@ -260,6 +260,11 @@ void __init pnx4008_map_io(void) iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc)); } +static void pnx4008_restart(char mode, const char *cmd) +{ + soft_restart(0); +} + extern struct sys_timer pnx4008_timer; MACHINE_START(PNX4008, "Philips PNX4008") @@ -269,4 +274,5 @@ MACHINE_START(PNX4008, "Philips PNX4008") .init_irq = pnx4008_init_irq, .init_machine = pnx4008_init, .timer = &pnx4008_timer, + .restart = pnx4008_restart, MACHINE_END diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h index 5dda2bb..60cfe71 100644 --- a/arch/arm/mach-pnx4008/include/mach/system.h +++ b/arch/arm/mach-pnx4008/include/mach/system.h @@ -21,18 +21,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <linux/io.h> -#include <mach/hardware.h> -#include <mach/platform.h> - static void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - cpu_reset(0); -} - #endif diff --git a/arch/arm/mach-pnx4008/include/mach/vmalloc.h b/arch/arm/mach-pnx4008/include/mach/vmalloc.h deleted file mode 100644 index 184913c..0000000 --- a/arch/arm/mach-pnx4008/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-pnx4008/include/mach/vmalloc.h - * - * Author: Vitaly Wool <source@mvista.com> - * - * 2006 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 8MB value just means that there will be a 8MB "hole" after the - * physical memory until the kernel virtual memory starts. That means that - * any out-of-bounds memory accesses will hopefully be caught. - * The vmalloc() routines leaves a hole of 4kB between each vmalloced - * area for the same reason. ;) - */ -#define VMALLOC_END 0xd0000000UL diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h index 83e5d212..b28a930 100644 --- a/arch/arm/mach-prima2/common.h +++ b/arch/arm/mach-prima2/common.h @@ -16,6 +16,7 @@ extern struct sys_timer sirfsoc_timer; extern void __init sirfsoc_of_irq_init(void); extern void __init sirfsoc_of_clk_init(void); +extern void sirfsoc_restart(char, const char *); #ifndef CONFIG_DEBUG_LL static inline void sirfsoc_map_lluart(void) {} diff --git a/arch/arm/mach-prima2/include/mach/map.h b/arch/arm/mach-prima2/include/mach/map.h index 66b1ae2..6f24353 100644 --- a/arch/arm/mach-prima2/include/mach/map.h +++ b/arch/arm/mach-prima2/include/mach/map.h @@ -9,8 +9,10 @@ #ifndef __MACH_PRIMA2_MAP_H__ #define __MACH_PRIMA2_MAP_H__ -#include <mach/vmalloc.h> +#include <linux/const.h> -#define SIRFSOC_VA(x) (VMALLOC_END + ((x) & 0x00FFF000)) +#define SIRFSOC_VA_BASE _AC(0xFEC00000, UL) + +#define SIRFSOC_VA(x) (SIRFSOC_VA_BASE + ((x) & 0x00FFF000)) #endif diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h index 0dbd257..2c7d2a9 100644 --- a/arch/arm/mach-prima2/include/mach/system.h +++ b/arch/arm/mach-prima2/include/mach/system.h @@ -9,21 +9,9 @@ #ifndef __MACH_SYSTEM_H__ #define __MACH_SYSTEM_H__ -#include <linux/bitops.h> -#include <mach/hardware.h> - -#define SIRFSOC_SYS_RST_BIT BIT(31) - -extern void __iomem *sirfsoc_rstc_base; - static inline void arch_idle(void) { cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base); -} - #endif diff --git a/arch/arm/mach-prima2/include/mach/vmalloc.h b/arch/arm/mach-prima2/include/mach/vmalloc.h deleted file mode 100644 index c9f90fe..0000000 --- a/arch/arm/mach-prima2/include/mach/vmalloc.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * arch/arm/ach-prima2/include/mach/vmalloc.h - * - * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -#ifndef __MACH_VMALLOC_H -#define __MACH_VMALLOC_H - -#include <linux/const.h> - -#define VMALLOC_END _AC(0xFEC00000, UL) - -#endif diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c index a12b689..02b9c05 100644 --- a/arch/arm/mach-prima2/prima2.c +++ b/arch/arm/mach-prima2/prima2.c @@ -40,4 +40,5 @@ MACHINE_START(PRIMA2_EVB, "prima2cb") .dma_zone_size = SZ_256M, .init_machine = sirfsoc_mach_init, .dt_compat = prima2cb_dt_match, + .restart = sirfsoc_restart, MACHINE_END diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c index 492cfa8..762adb7 100644 --- a/arch/arm/mach-prima2/rstc.c +++ b/arch/arm/mach-prima2/rstc.c @@ -68,3 +68,10 @@ int sirfsoc_reset_device(struct device *dev) return 0; } + +#define SIRFSOC_SYS_RST_BIT BIT(31) + +void sirfsoc_restart(char mode, const char *cmd) +{ + writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base); +} diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 11f2223..5971c46 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -829,4 +829,5 @@ MACHINE_START(BALLOON3, "Balloon3") .timer = &pxa_timer, .init_machine = balloon3_init, .atag_offset = 0x100, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c index 5516317..c91727d 100644 --- a/arch/arm/mach-pxa/capc7117.c +++ b/arch/arm/mach-pxa/capc7117.c @@ -153,5 +153,6 @@ MACHINE_START(CAPC7117, .init_irq = pxa3xx_init_irq, .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, - .init_machine = capc7117_init + .init_machine = capc7117_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index 9344a0e..8fa4ad2 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -524,4 +524,5 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX") #ifdef CONFIG_PCI .dma_zone_size = SZ_64M, #endif + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 684acf6..4b981b8 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -858,4 +858,5 @@ MACHINE_START(CM_X300, "CM-X300 module") .timer = &pxa_timer, .init_machine = cm_x300_init, .fixup = cm_x300_fixup, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index f0fe9a5..29d5d54 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c @@ -313,6 +313,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") @@ -322,5 +323,6 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 0a6222e..0846d21 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c @@ -189,5 +189,6 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") .init_irq = pxa3xx_init_irq, .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index 56ab7a6..6ad3359 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -259,5 +259,6 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") .init_irq = pxa3xx_init_irq, .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3812ba0..66600f0 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -655,7 +655,7 @@ static void corgi_poweroff(void) /* Green LED off tells the bootloader to halt */ gpio_set_value(CORGI_GPIO_LED_GREEN, 0); - arm_machine_restart('h', NULL); + pxa_restart('h', NULL); } static void corgi_restart(char mode, const char *cmd) @@ -664,13 +664,12 @@ static void corgi_restart(char mode, const char *cmd) /* Green LED on tells the bootloader to reboot */ gpio_set_value(CORGI_GPIO_LED_GREEN, 1); - arm_machine_restart('h', cmd); + pxa_restart('h', cmd); } static void __init corgi_init(void) { pm_power_off = corgi_poweroff; - arm_pm_restart = corgi_restart; /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ PCFR |= PCFR_OPDE; @@ -726,6 +725,7 @@ MACHINE_START(CORGI, "SHARP Corgi") .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, + .restart = corgi_restart, MACHINE_END #endif @@ -737,6 +737,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd") .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, + .restart = corgi_restart, MACHINE_END #endif @@ -748,6 +749,7 @@ MACHINE_START(HUSKY, "SHARP Husky") .handle_irq = pxa25x_handle_irq, .init_machine = corgi_init, .timer = &pxa_timer, + .restart = corgi_restart, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 5e2cf39..fb5a51d 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -278,4 +278,5 @@ MACHINE_START(CSB726, "Cogent CSB726") .handle_irq = pxa27x_handle_irq, .init_machine = csb726_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 3358f4d..d80c0ba 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -1305,6 +1305,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = em_x270_init, + .restart = pxa_restart, MACHINE_END MACHINE_START(EXEDA, "Compulab eXeda") @@ -1314,4 +1315,5 @@ MACHINE_START(EXEDA, "Compulab eXeda") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = em_x270_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index e556a1e..f79a610 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c @@ -196,6 +196,7 @@ MACHINE_START(E330, "Toshiba e330") .fixup = eseries_fixup, .init_machine = e330_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif @@ -246,6 +247,7 @@ MACHINE_START(E350, "Toshiba e350") .fixup = eseries_fixup, .init_machine = e350_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif @@ -369,6 +371,7 @@ MACHINE_START(E400, "Toshiba e400") .fixup = eseries_fixup, .init_machine = e400_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif @@ -558,6 +561,7 @@ MACHINE_START(E740, "Toshiba e740") .fixup = eseries_fixup, .init_machine = e740_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif @@ -750,6 +754,7 @@ MACHINE_START(E750, "Toshiba e750") .fixup = eseries_fixup, .init_machine = e750_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif @@ -955,5 +960,6 @@ MACHINE_START(E800, "Toshiba e800") .fixup = eseries_fixup, .init_machine = e800_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index 8308eee..15ab253 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -804,6 +804,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a780_init, + .restart = pxa_restart, MACHINE_END #endif @@ -870,6 +871,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e680_init, + .restart = pxa_restart, MACHINE_END #endif @@ -936,6 +938,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a1200_init, + .restart = pxa_restart, MACHINE_END #endif @@ -1127,6 +1130,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = a910_init, + .restart = pxa_restart, MACHINE_END #endif @@ -1193,6 +1197,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e6_init, + .restart = pxa_restart, MACHINE_END #endif @@ -1233,5 +1238,6 @@ MACHINE_START(EZX_E2, "Motorola EZX E2") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = e2_init, + .restart = pxa_restart, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 92a2e85..0d729e6 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -57,3 +57,5 @@ void __init pxa_set_ffuart_info(void *info); void __init pxa_set_btuart_info(void *info); void __init pxa_set_stuart_info(void *info); void __init pxa_set_hwuart_info(void *info); + +void pxa_restart(char, const char *); diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index ffdd70d..ac3b1ce 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c @@ -239,4 +239,5 @@ MACHINE_START(GUMSTIX, "Gumstix") .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = gumstix_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index 4b5e110..fde6b4c 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c @@ -209,4 +209,5 @@ MACHINE_START(H5400, "HP iPAQ H5000") .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = h5000_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index f2c3245..26d069a 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c @@ -164,4 +164,5 @@ MACHINE_START(HIMALAYA, "HTC Himalaya") .handle_irq = pxa25x_handle_irq, .init_machine = himalaya_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index 82e9976..fb9b62d 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c @@ -845,4 +845,5 @@ MACHINE_START(H4700, "HP iPAQ HX4700") .handle_irq = pxa27x_handle_irq, .init_machine = hx4700_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c index 33e81e8..6740019 100644 --- a/arch/arm/mach-pxa/icontrol.c +++ b/arch/arm/mach-pxa/icontrol.c @@ -196,5 +196,6 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") .init_irq = pxa3xx_init_irq, .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, - .init_machine = icontrol_init + .init_machine = icontrol_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index bb98ff5..8af1840 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -199,4 +199,5 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = idp_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S index a73bc86..260c0c1 100644 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ b/arch/arm/mach-pxa/include/mach/entry-macro.S @@ -7,45 +7,9 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <mach/irqs.h> .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mrc p15, 0, \tmp, c0, c0, 0 @ CPUID - mov \tmp, \tmp, lsr #13 - and \tmp, \tmp, #0x7 @ Core G - cmp \tmp, #1 - bhi 1002f - - @ Core Generation 1 (PXA25x) - mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 - add \base, \base, #0x00d00000 - ldr \irqstat, [\base, #0] @ ICIP - ldr \irqnr, [\base, #4] @ ICMR - - ands \irqnr, \irqstat, \irqnr - beq 1001f - rsb \irqstat, \irqnr, #0 - and \irqstat, \irqstat, \irqnr - clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #(31 + PXA_IRQ(0)) - b 1001f -1002: - @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx) - mrc p6, 0, \irqstat, c5, c0, 0 @ ICHP - tst \irqstat, #0x80000000 - beq 1001f - bic \irqstat, \irqstat, #0x80000000 - mov \irqnr, \irqstat, lsr #16 - add \irqnr, \irqnr, #(PXA_IRQ(0)) -1001: - .endm diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h index d1fce8b..c5afacd 100644 --- a/arch/arm/mach-pxa/include/mach/system.h +++ b/arch/arm/mach-pxa/include/mach/system.h @@ -9,15 +9,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ - -#include <asm/proc-fns.h> -#include "hardware.h" -#include "pxa2xx-regs.h" - static inline void arch_idle(void) { cpu_do_idle(); } - - -void arch_reset(char mode, const char *cmd); diff --git a/arch/arm/mach-pxa/include/mach/vmalloc.h b/arch/arm/mach-pxa/include/mach/vmalloc.h deleted file mode 100644 index bfecfbf..0000000 --- a/arch/arm/mach-pxa/include/mach/vmalloc.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/vmalloc.h - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VMALLOC_END (0xe8000000UL) diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index d21e28b4..1fb86ed 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -445,4 +445,5 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = littleton_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 565dd2f..cee9ce2 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -505,4 +505,5 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = lpd270_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 2fb2b50..6ebd276 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -556,4 +556,5 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = lubbock_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index e340ea0..3d6baf9 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -760,4 +760,5 @@ MACHINE_START(MAGICIAN, "HTC Magician") .handle_irq = pxa27x_handle_irq, .init_machine = magician_init, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index ea62a99..1aebaf7 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -622,4 +622,5 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = mainstone_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 23f90c7..6518a30 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -696,13 +696,13 @@ static void mioa701_machine_exit(void); static void mioa701_poweroff(void) { mioa701_machine_exit(); - arm_machine_restart('s', NULL); + pxa_restart('s', NULL); } static void mioa701_restart(char c, const char *cmd) { mioa701_machine_exit(); - arm_machine_restart('s', cmd); + pxa_restart('s', cmd); } static struct gpio global_gpios[] = { @@ -734,7 +734,6 @@ static void __init mioa701_machine_init(void) pxa_set_udc_info(&mioa701_udc_info); pxa_set_ac97_info(&mioa701_ac97_info); pm_power_off = mioa701_poweroff; - arm_pm_restart = mioa701_restart; platform_add_devices(devices, ARRAY_SIZE(devices)); gsm_init(); @@ -752,9 +751,11 @@ static void mioa701_machine_exit(void) MACHINE_START(MIOA701, "MIO A701") .atag_offset = 0x100, + .restart_mode = 's', .map_io = &pxa27x_map_io, .init_irq = &pxa27x_init_irq, .handle_irq = &pxa27x_handle_irq, .init_machine = mioa701_machine_init, .timer = &pxa_timer, + .restart = mioa701_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index 4af5d51..169bf8f 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c @@ -98,5 +98,6 @@ MACHINE_START(NEC_MP900, "MobilePro900/C") .init_irq = pxa25x_init_irq, .handle_irq = pxa25x_handle_irq, .init_machine = mp900c_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 3d4a281..1fa80f4f 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c @@ -347,5 +347,6 @@ MACHINE_START(PALMLD, "Palm LifeDrive") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, - .init_machine = palmld_init + .init_machine = palmld_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index 99d6bcf..5ba1431 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c @@ -208,5 +208,6 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, - .init_machine = palmt5_init + .init_machine = palmt5_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 2c24c67..29b51b4 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -542,5 +542,6 @@ MACHINE_START(PALMTC, "Palm Tungsten|C") .init_irq = pxa25x_init_irq, .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, - .init_machine = palmtc_init + .init_machine = palmtc_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 9376da0..5ebf49acb 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c @@ -361,5 +361,6 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2") .init_irq = pxa25x_init_irq, .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, - .init_machine = palmte2_init + .init_machine = palmte2_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 94e9708..ec82491 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c @@ -452,6 +452,7 @@ MACHINE_START(TREO680, "Palm Treo 680") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = treo680_init, + .restart = pxa_restart, MACHINE_END #endif @@ -464,5 +465,6 @@ MACHINE_START(CENTRO, "Palm Centro 685") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = centro_init, + .restart = pxa_restart, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 4e3e459..6170d76 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -369,5 +369,6 @@ MACHINE_START(PALMTX, "Palm T|X") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, - .init_machine = palmtx_init + .init_machine = palmtx_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 68e18ba..b2dff9d 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c @@ -404,5 +404,6 @@ MACHINE_START(PALMZ72, "Palm Zire72") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, - .init_machine = palmz72_init + .init_machine = palmz72_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 0b825a3..fe90544 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c @@ -265,4 +265,5 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = pcm027_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 8ee4b6c..69036e4 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -417,12 +417,7 @@ static struct i2c_board_info __initdata poodle_i2c_devices[] = { static void poodle_poweroff(void) { - arm_machine_restart('h', NULL); -} - -static void poodle_restart(char mode, const char *cmd) -{ - arm_machine_restart('h', cmd); + pxa_restart('h', NULL); } static void __init poodle_init(void) @@ -430,7 +425,6 @@ static void __init poodle_init(void) int ret = 0; pm_power_off = poodle_poweroff; - arm_pm_restart = poodle_restart; PCFR |= PCFR_OPDE; @@ -472,4 +466,5 @@ MACHINE_START(POODLE, "SHARP Poodle") .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = poodle_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index 78d6437..22818c7 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -1093,6 +1093,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") .init_irq = pxa3xx_init_irq, .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif @@ -1104,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") .init_irq = pxa3xx_init_irq, .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif @@ -1115,5 +1117,6 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") .init_irq = pxa3xx_init_irq, .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 01e9d64..c8497b0 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -81,14 +81,17 @@ static void do_hw_reset(void) OSMR3 = OSCR + 368640; /* ... in 100 ms */ } -void arch_reset(char mode, const char *cmd) +void pxa_restart(char mode, const char *cmd) { + local_irq_disable(); + local_fiq_disable(); + clear_reset_status(RESET_STATUS_ALL); switch (mode) { case 's': /* Jump into ROM at address 0 */ - cpu_reset(0); + soft_restart(0); break; case 'g': do_gpio_reset(); diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 423ec89..0fe354e 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -602,4 +602,5 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = saar_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index d1cdd6a..febc809 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c @@ -111,5 +111,6 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = saarb_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 1b39cec..abf355d 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -926,7 +926,7 @@ static inline void spitz_i2c_init(void) {} ******************************************************************************/ static void spitz_poweroff(void) { - arm_machine_restart('g', NULL); + pxa_restart('g', NULL); } static void spitz_restart(char mode, const char *cmd) @@ -943,7 +943,6 @@ static void __init spitz_init(void) { init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); pm_power_off = spitz_poweroff; - arm_pm_restart = spitz_restart; PMCR = 0x00; @@ -982,33 +981,39 @@ static void __init spitz_fixup(struct tag *tags, char **cmdline, #ifdef CONFIG_MACH_SPITZ MACHINE_START(SPITZ, "SHARP Spitz") + .restart_mode = 'g', .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, + .restart = spitz_restart, MACHINE_END #endif #ifdef CONFIG_MACH_BORZOI MACHINE_START(BORZOI, "SHARP Borzoi") + .restart_mode = 'g', .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, + .restart = spitz_restart, MACHINE_END #endif #ifdef CONFIG_MACH_AKITA MACHINE_START(AKITA, "SHARP Akita") + .restart_mode = 'g', .fixup = spitz_fixup, .map_io = pxa27x_map_io, .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .init_machine = spitz_init, .timer = &pxa_timer, + .restart = spitz_restart, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index 940ca56..d8a2467 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c @@ -1005,6 +1005,7 @@ MACHINE_START(INTELMOTE2, "IMOTE 2") .timer = &pxa_timer, .init_machine = imote2_init, .atag_offset = 0x100, + .restart = pxa_restart, MACHINE_END #endif @@ -1017,5 +1018,6 @@ MACHINE_START(STARGATE2, "Stargate 2") .timer = &pxa_timer, .init_machine = stargate2_init, .atag_offset = 0x100, + .restart = pxa_restart, MACHINE_END #endif diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index 43bdcb9..9fb38e8 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c @@ -495,4 +495,5 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = tavorevb_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index 46c60b3..f7d9305 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c @@ -132,4 +132,5 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = evb3_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index de68470..b503049 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c @@ -16,7 +16,6 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/clockchips.h> -#include <linux/sched.h> #include <asm/div64.h> #include <asm/mach/irq.h> @@ -32,18 +31,10 @@ * long as there is always less than 582 seconds between successive * calls to sched_clock() which should always be the case in practice. */ -static DEFINE_CLOCK_DATA(cd); -unsigned long long notrace sched_clock(void) +static u32 notrace pxa_read_sched_clock(void) { - u32 cyc = OSCR; - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace pxa_update_sched_clock(void) -{ - u32 cyc = OSCR; - update_sched_clock(&cd, cyc, (u32)~0); + return OSCR; } @@ -119,7 +110,7 @@ static void __init pxa_timer_init(void) OIER = 0; OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; - init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); + setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4); ckevt_pxa_osmr0.max_delta_ns = diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 1ddb982..7ce5c43 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -905,7 +905,7 @@ static struct platform_device *devices[] __initdata = { static void tosa_poweroff(void) { - arm_machine_restart('g', NULL); + pxa_restart('g', NULL); } static void tosa_restart(char mode, const char *cmd) @@ -935,7 +935,6 @@ static void __init tosa_init(void) init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0); pm_power_off = tosa_poweroff; - arm_pm_restart = tosa_restart; PCFR |= PCFR_OPDE; @@ -970,6 +969,7 @@ static void __init fixup_tosa(struct tag *tags, char **cmdline, } MACHINE_START(TOSA, "SHARP Tosa") + .restart_mode = 'g', .fixup = fixup_tosa, .map_io = pxa25x_map_io, .nr_irqs = TOSA_NR_IRQS, @@ -977,4 +977,5 @@ MACHINE_START(TOSA, "SHARP Tosa") .handle_irq = pxa25x_handle_irq, .init_machine = tosa_init, .timer = &pxa_timer, + .restart = tosa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 1aaed2b..0f30af6 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -561,6 +561,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") @@ -571,4 +572,5 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index d9a653a..023d6ca 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -998,4 +998,5 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, .init_machine = viper_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 9edeec6..1f5cfa9 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -721,5 +721,6 @@ MACHINE_START(VPAC270, "Voipac PXA270") .init_irq = pxa27x_init_irq, .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, - .init_machine = vpac270_init + .init_machine = vpac270_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index 70e1730..4bbe9a3 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -185,5 +185,6 @@ MACHINE_START(XCEP, "Iskratel XCEP") .init_irq = pxa25x_init_irq, .handle_irq = pxa25x_handle_irq, .timer = &pxa_timer, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index 4246618..b647684 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -725,4 +725,5 @@ MACHINE_START(ZIPIT2, "Zipit Z2") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = z2_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 68de9c1..a4dd1c3 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -911,5 +911,6 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") .handle_irq = pxa27x_handle_irq, .timer = &pxa_timer, .init_machine = zeus_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index a4c8075..98eec80 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -430,4 +430,5 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") .handle_irq = pxa3xx_handle_irq, .timer = &pxa_timer, .init_machine = zylonite_init, + .restart = pxa_restart, MACHINE_END diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index dba6d0c..c593be4 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -12,6 +12,8 @@ config REALVIEW_EB_A9MP bool "Support Multicore Cortex-A9 Tile" depends on MACH_REALVIEW_EB select CPU_V7 + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 help Enable support for the Cortex-A9MPCore tile fitted to the Realview(R) Emulation Baseboard platform. @@ -21,6 +23,8 @@ config REALVIEW_EB_ARM11MP depends on MACH_REALVIEW_EB select CPU_V6K select ARCH_HAS_BARRIERS if SMP + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 help Enable support for the ARM11MPCore tile fitted to the Realview(R) Emulation Baseboard platform. @@ -39,6 +43,8 @@ config MACH_REALVIEW_PB11MP select CPU_V6K select ARM_GIC select HAVE_PATA_PLATFORM + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_BARRIERS if SMP help Include support for the ARM(R) RealView(R) Platform Baseboard for @@ -51,6 +57,7 @@ config MACH_REALVIEW_PB1176 select CPU_V6 select ARM_GIC select HAVE_TCM + select MIGHT_HAVE_CACHE_L2X0 help Include support for the ARM(R) RealView(R) Platform Baseboard for ARM1176JZF-S. @@ -78,6 +85,8 @@ config MACH_REALVIEW_PBX bool "Support RealView(R) Platform Baseboard Explore" select ARM_GIC select HAVE_PATA_PLATFORM + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET select ZONE_DMA if SPARSEMEM help diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 47259c8..735b57a 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h @@ -65,6 +65,5 @@ extern int realview_usb_register(struct resource *res); extern void realview_init_early(void); extern void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo); -extern void (*realview_reset)(char); #endif diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S index 4071164..e8a5179 100644 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ b/arch/arm/mach-realview/include/mach/entry-macro.S @@ -7,8 +7,6 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <asm/hardware/entry-macro-gic.S> .macro disable_fiq .endm diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h index 6657ff23..471b671 100644 --- a/arch/arm/mach-realview/include/mach/system.h +++ b/arch/arm/mach-realview/include/mach/system.h @@ -21,12 +21,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <linux/io.h> -#include <mach/hardware.h> -#include <mach/platform.h> - -void (*realview_reset)(char mode); - static inline void arch_idle(void) { /* @@ -36,15 +30,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - if (realview_reset) - realview_reset(mode); - dsb(); -} - #endif diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h deleted file mode 100644 index a2a4c68..0000000 --- a/arch/arm/mach-realview/include/mach/vmalloc.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-realview/include/mach/vmalloc.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xf8000000UL diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 026c66a..f92a920 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -91,8 +91,8 @@ static struct map_desc realview_eb_io_desc[] __initdata = { static struct map_desc realview_eb11mp_io_desc[] __initdata = { { - .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE), + .virtual = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE), + .pfn = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE), .length = SZ_4K, .type = MT_DEVICE, }, { @@ -415,7 +415,7 @@ static struct sys_timer realview_eb_timer = { .init = realview_eb_timer_init, }; -static void realview_eb_reset(char mode) +static void realview_eb_restart(char mode, const char *cmd) { void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); @@ -427,6 +427,7 @@ static void realview_eb_reset(char mode) __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); if (core_tile_eb11mp()) __raw_writel(0x0008, reset_ctrl); + dsb(); } static void __init realview_eb_init(void) @@ -458,7 +459,6 @@ static void __init realview_eb_init(void) #ifdef CONFIG_LEDS leds_event = realview_leds_event; #endif - realview_reset = realview_eb_reset; } MACHINE_START(REALVIEW_EB, "ARM-RealView EB") @@ -469,8 +469,10 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB") .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_eb_timer, + .handle_irq = gic_handle_irq, .init_machine = realview_eb_init, #ifdef CONFIG_ZONE_DMA .dma_zone_size = SZ_256M, #endif + .restart = realview_eb_restart, MACHINE_END diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index c057540..8ec37b2 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -336,12 +336,13 @@ static struct sys_timer realview_pb1176_timer = { .init = realview_pb1176_timer_init, }; -static void realview_pb1176_reset(char mode) +static void realview_pb1176_restart(char mode, const char *cmd) { void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); + dsb(); } static void realview_pb1176_fixup(struct tag *tags, char **from, @@ -381,7 +382,6 @@ static void __init realview_pb1176_init(void) #ifdef CONFIG_LEDS leds_event = realview_leds_event; #endif - realview_reset = realview_pb1176_reset; } MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") @@ -392,8 +392,10 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pb1176_timer, + .handle_irq = gic_handle_irq, .init_machine = realview_pb1176_init, #ifdef CONFIG_ZONE_DMA .dma_zone_size = SZ_256M, #endif + .restart = realview_pb1176_restart, MACHINE_END diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 671ad6d..f035fda 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c @@ -315,7 +315,7 @@ static struct sys_timer realview_pb11mp_timer = { .init = realview_pb11mp_timer_init, }; -static void realview_pb11mp_reset(char mode) +static void realview_pb11mp_restart(char mode, const char *cmd) { void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); @@ -327,6 +327,7 @@ static void realview_pb11mp_reset(char mode) __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); __raw_writel(0x0000, reset_ctrl); __raw_writel(0x0004, reset_ctrl); + dsb(); } static void __init realview_pb11mp_init(void) @@ -355,7 +356,6 @@ static void __init realview_pb11mp_init(void) #ifdef CONFIG_LEDS leds_event = realview_leds_event; #endif - realview_reset = realview_pb11mp_reset; } MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") @@ -366,8 +366,10 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pb11mp_timer, + .handle_irq = gic_handle_irq, .init_machine = realview_pb11mp_init, #ifdef CONFIG_ZONE_DMA .dma_zone_size = SZ_256M, #endif + .restart = realview_pb11mp_restart, MACHINE_END diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index cbf22df..0109c8b 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c @@ -271,7 +271,7 @@ static struct sys_timer realview_pba8_timer = { .init = realview_pba8_timer_init, }; -static void realview_pba8_reset(char mode) +static void realview_pba8_restart(char mode, const char *cmd) { void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); @@ -283,6 +283,7 @@ static void realview_pba8_reset(char mode) __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); __raw_writel(0x0000, reset_ctrl); __raw_writel(0x0004, reset_ctrl); + dsb(); } static void __init realview_pba8_init(void) @@ -305,7 +306,6 @@ static void __init realview_pba8_init(void) #ifdef CONFIG_LEDS leds_event = realview_leds_event; #endif - realview_reset = realview_pba8_reset; } MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") @@ -316,8 +316,10 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pba8_timer, + .handle_irq = gic_handle_irq, .init_machine = realview_pba8_init, #ifdef CONFIG_ZONE_DMA .dma_zone_size = SZ_256M, #endif + .restart = realview_pba8_restart, MACHINE_END diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index 63c4114..0194b3e 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c @@ -98,8 +98,8 @@ static struct map_desc realview_pbx_io_desc[] __initdata = { static struct map_desc realview_local_io_desc[] __initdata = { { - .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_CPU_BASE), + .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_SCU_BASE), + .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_SCU_BASE), .length = SZ_4K, .type = MT_DEVICE, }, { @@ -339,7 +339,7 @@ static void realview_pbx_fixup(struct tag *tags, char **from, #endif } -static void realview_pbx_reset(char mode) +static void realview_pbx_restart(char mode, const char *cmd) { void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); @@ -351,6 +351,7 @@ static void realview_pbx_reset(char mode) __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); __raw_writel(0x00F0, reset_ctrl); __raw_writel(0x00F4, reset_ctrl); + dsb(); } static void __init realview_pbx_init(void) @@ -388,7 +389,6 @@ static void __init realview_pbx_init(void) #ifdef CONFIG_LEDS leds_event = realview_leds_event; #endif - realview_reset = realview_pbx_reset; } MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") @@ -399,8 +399,10 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pbx_timer, + .handle_irq = gic_handle_irq, .init_machine = realview_pbx_init, #ifdef CONFIG_ZONE_DMA .dma_zone_size = SZ_256M, #endif + .restart = realview_pbx_restart, MACHINE_END diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h index 45c7b93..359bab9 100644 --- a/arch/arm/mach-rpc/include/mach/system.h +++ b/arch/arm/mach-rpc/include/mach/system.h @@ -7,21 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/io.h> -#include <mach/hardware.h> -#include <asm/hardware/iomd.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - iomd_writeb(0, IOMD_ROMCR0); - - /* - * Jump into the ROM - */ - cpu_reset(0); -} diff --git a/arch/arm/mach-rpc/include/mach/vmalloc.h b/arch/arm/mach-rpc/include/mach/vmalloc.h deleted file mode 100644 index fb70022..0000000 --- a/arch/arm/mach-rpc/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-rpc/include/mach/vmalloc.h - * - * Copyright (C) 1997 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VMALLOC_END 0xdc000000UL diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index 8559598..3d44a59 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c @@ -24,6 +24,7 @@ #include <asm/elf.h> #include <asm/mach-types.h> #include <mach/hardware.h> +#include <asm/hardware/iomd.h> #include <asm/page.h> #include <asm/domain.h> #include <asm/setup.h> @@ -214,6 +215,16 @@ static int __init rpc_init(void) arch_initcall(rpc_init); +static void rpc_restart(char mode, const char *cmd) +{ + iomd_writeb(0, IOMD_ROMCR0); + + /* + * Jump into the ROM + */ + soft_restart(0); +} + extern struct sys_timer ioc_timer; MACHINE_START(RISCPC, "Acorn-RiscPC") @@ -224,4 +235,5 @@ MACHINE_START(RISCPC, "Acorn-RiscPC") .map_io = rpc_map_io, .init_irq = rpc_init_irq, .timer = &ioc_timer, + .restart = rpc_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/common.h b/arch/arm/mach-s3c2410/common.h new file mode 100644 index 0000000..f65dc80 --- /dev/null +++ b/arch/arm/mach-s3c2410/common.h @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Header for S3C2410 machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H +#define __ARCH_ARM_MACH_S3C2410_COMMON_H + +void s3c2410_restart(char mode, const char *cmd); + +#endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */ diff --git a/arch/arm/mach-s3c2410/include/mach/reset.h b/arch/arm/mach-s3c2410/include/mach/reset.h deleted file mode 100644 index f8c9387..0000000 --- a/arch/arm/mach-s3c2410/include/mach/reset.h +++ /dev/null @@ -1,22 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/reset.h - * - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 CPU reset controls -*/ - -#ifndef __ASM_ARCH_RESET_H -#define __ASM_ARCH_RESET_H __FILE__ - -/* This allows the over-ride of the default reset code -*/ - -extern void (*s3c24xx_reset_hook)(void); - -#endif /* __ASM_ARCH_RESET_H */ diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h deleted file mode 100644 index 6faadce..0000000 --- a/arch/arm/mach-s3c2410/include/mach/system-reset.h +++ /dev/null @@ -1,32 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/system-reset.h - * - * Copyright (c) 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 - System define for arch_reset() function - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <mach/hardware.h> -#include <plat/watchdog-reset.h> - -extern void (*s3c24xx_reset_hook)(void); - -static void -arch_reset(char mode, const char *cmd) -{ - if (mode == 's') { - cpu_reset(0); - } - - if (s3c24xx_reset_hook) - s3c24xx_reset_hook(); - - arch_wdt_reset(); - - /* we'll take a jump through zero as a poor second */ - cpu_reset(0); -} diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h index a8cbca6..5e215c1 100644 --- a/arch/arm/mach-s3c2410/include/mach/system.h +++ b/arch/arm/mach-s3c2410/include/mach/system.h @@ -15,12 +15,10 @@ #include <mach/map.h> #include <mach/idle.h> -#include <mach/reset.h> #include <mach/regs-clock.h> void (*s3c24xx_idle)(void); -void (*s3c24xx_reset_hook)(void); void s3c24xx_default_idle(void) { @@ -54,5 +52,3 @@ static void arch_idle(void) else s3c24xx_default_idle(); } - -#include <mach/system-reset.h> diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h deleted file mode 100644 index 7a311e8..0000000 --- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/vmalloc.h - * - * from arch/arm/mach-iop3xx/include/mach/vmalloc.h - * - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 vmalloc definition -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END 0xF6000000UL - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 7983894..4220cc6 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c @@ -63,6 +63,8 @@ #include <linux/mtd/map.h> #include <linux/mtd/physmap.h> +#include "common.h" + static struct resource amlm5900_nor_resource = { .start = 0x00000000, .end = 0x01000000 - 1, @@ -241,4 +243,5 @@ MACHINE_START(AML_M5900, "AML_M5900") .init_irq = s3c24xx_init_irq, .init_machine = amlm5900_init, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 71b9558..feeaf73 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -66,6 +66,7 @@ #include "usb-simtec.h" #include "nor-simtec.h" +#include "common.h" #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" @@ -640,4 +641,5 @@ MACHINE_START(BAST, "Simtec-BAST") .init_irq = s3c24xx_init_irq, .init_machine = bast_init, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 05a7d16..ad9d865 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -70,6 +70,8 @@ #include <sound/uda1380.h> +#include "common.h" + #define H1940_LATCH ((void __force __iomem *)0xF8000000) #define H1940_PA_LATCH S3C2410_CS2 @@ -751,4 +753,5 @@ MACHINE_START(H1940, "IPAQ-H1940") .init_irq = h1940_init_irq, .init_machine = h1940_init, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 1dc3e32..383d00c 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c @@ -51,6 +51,8 @@ #include <plat/s3c2410.h> #include <plat/udc.h> +#include "common.h" + static struct map_desc n30_iodesc[] __initdata = { /* nothing here yet */ }; @@ -591,6 +593,7 @@ MACHINE_START(N30, "Acer-N30") .init_machine = n30_init, .init_irq = s3c24xx_init_irq, .map_io = n30_map_io, + .restart = s3c2410_restart, MACHINE_END MACHINE_START(N35, "Acer-N35") @@ -601,4 +604,5 @@ MACHINE_START(N35, "Acer-N35") .init_machine = n30_init, .init_irq = s3c24xx_init_irq, .map_io = n30_map_io, + .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index f03f3fd..5f1e0ee 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c @@ -38,6 +38,8 @@ #include <plat/iic.h> #include <plat/cpu.h> +#include "common.h" + static struct map_desc otom11_iodesc[] __initdata = { /* Device area */ { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE }, @@ -121,4 +123,5 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1") .init_machine = otom11_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index 4518521..58f2c17 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c @@ -62,6 +62,8 @@ #include <plat/cpu.h> #include <plat/pm.h> +#include "common.h" + static struct map_desc qt2410_iodesc[] __initdata = { { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } }; @@ -350,6 +352,5 @@ MACHINE_START(QT2410, "QT2410") .init_irq = s3c24xx_init_irq, .init_machine = qt2410_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END - - diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index 99c9dfd..bdc27e7 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c @@ -54,6 +54,8 @@ #include <plat/common-smdk.h> +#include "common.h" + static struct map_desc smdk2410_iodesc[] __initdata = { /* nothing here yet */ }; @@ -116,6 +118,5 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc .init_irq = s3c24xx_init_irq, .init_machine = smdk2410_init, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END - - diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c index e0d0b6f..1114666f 100644 --- a/arch/arm/mach-s3c2410/mach-tct_hammer.c +++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c @@ -54,6 +54,8 @@ #include <linux/mtd/map.h> #include <linux/mtd/physmap.h> +#include "common.h" + static struct resource tct_hammer_nor_resource = { .start = 0x00000000, .end = 0x01000000 - 1, @@ -151,4 +153,5 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER") .init_irq = s3c24xx_init_irq, .init_machine = tct_hammer_init, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index 0f0a9a1..dbe668a 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -53,6 +53,7 @@ #include "usb-simtec.h" #include "nor-simtec.h" +#include "common.h" /* macros for virtual address mods for the io space entries */ #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) @@ -381,4 +382,5 @@ MACHINE_START(VR1000, "Thorcom-VR1000") .init_machine = vr1000_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, + .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index af74927..dad5963 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -42,6 +42,7 @@ #include <plat/clock.h> #include <plat/pll.h> #include <plat/pm.h> +#include <plat/watchdog-reset.h> #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> @@ -189,3 +190,15 @@ int __init s3c2410a_init(void) s3c2410_sysdev.cls = &s3c2410a_sysclass; return s3c2410_init(); } + +void s3c2410_restart(char mode, const char *cmd) +{ + if (mode == 's') { + soft_restart(0); + } + + arch_wdt_reset(); + + /* we'll take a jump through zero as a poor second */ + soft_restart(0); +} diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c index 286ef17..ae73ba3 100644 --- a/arch/arm/mach-s3c2412/mach-jive.c +++ b/arch/arm/mach-s3c2412/mach-jive.c @@ -48,6 +48,7 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> +#include <plat/s3c2412.h> #include <plat/gpio-cfg.h> #include <plat/clock.h> #include <plat/devs.h> @@ -661,4 +662,5 @@ MACHINE_START(JIVE, "JIVE") .map_io = jive_map_io, .init_machine = jive_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2412_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index f1eec1b..b11451b 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -134,6 +134,7 @@ MACHINE_START(S3C2413, "S3C2413") .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2412_restart, MACHINE_END MACHINE_START(SMDK2412, "SMDK2412") @@ -145,6 +146,7 @@ MACHINE_START(SMDK2412, "SMDK2412") .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2412_restart, MACHINE_END MACHINE_START(SMDK2413, "SMDK2413") @@ -156,4 +158,5 @@ MACHINE_START(SMDK2413, "SMDK2413") .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2412_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index 1bbb1ef..94bfaa1 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c @@ -162,4 +162,5 @@ MACHINE_START(VSTMS, "VSTMS") .init_machine = vstms_init, .map_io = vstms_map_io, .timer = &s3c24xx_timer, + .restart = s3c2412_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 57a1e01..867ce2e 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -32,7 +32,6 @@ #include <asm/proc-fns.h> #include <asm/irq.h> -#include <mach/reset.h> #include <mach/idle.h> #include <plat/cpu-freq.h> @@ -131,8 +130,11 @@ static void s3c2412_idle(void) cpu_do_idle(); } -static void s3c2412_hard_reset(void) +void s3c2412_restart(char mode, const char *cmd) { + if (mode == 's') + soft_restart(0); + /* errata "Watch-dog/Software Reset Problem" specifies that * this reset must be done with the SYSCLK sourced from * EXTCLK instead of FOUT to avoid a glitch in the reset @@ -164,10 +166,6 @@ void __init s3c2412_map_io(void) s3c24xx_idle = s3c2412_idle; - /* set custom reset hook */ - - s3c24xx_reset_hook = s3c2412_hard_reset; - /* register our io-tables */ iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c index a9eee53..66b7173 100644 --- a/arch/arm/mach-s3c2416/mach-smdk2416.c +++ b/arch/arm/mach-s3c2416/mach-smdk2416.c @@ -251,4 +251,5 @@ MACHINE_START(SMDK2416, "SMDK2416") .map_io = smdk2416_map_io, .init_machine = smdk2416_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2416_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index ee214bc..4606223 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c @@ -44,7 +44,6 @@ #include <asm/proc-fns.h> #include <asm/irq.h> -#include <mach/reset.h> #include <mach/idle.h> #include <mach/regs-s3c2443-clock.h> @@ -76,8 +75,11 @@ static struct sys_device s3c2416_sysdev = { .cls = &s3c2416_sysclass, }; -static void s3c2416_hard_reset(void) +void s3c2416_restart(char mode, const char *cmd) { + if (mode == 's') + soft_restart(0); + __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); } @@ -85,7 +87,6 @@ int __init s3c2416_init(void) { printk(KERN_INFO "S3C2416: Initializing architecture\n"); - s3c24xx_reset_hook = s3c2416_hard_reset; /* s3c24xx_idle = s3c2416_idle; */ /* change WDT IRQ number */ diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h new file mode 100644 index 0000000..db8a98a --- /dev/null +++ b/arch/arm/mach-s3c2440/common.h @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Header for S3C2440 machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H +#define __ARCH_ARM_MACH_S3C2440_COMMON_H + +void s3c2440_restart(char mode, const char *cmd); + +#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index d8f36c0..2456955 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -55,6 +55,8 @@ #include <plat/cpu.h> #include <plat/audio-simtec.h> +#include "common.h" + #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" static struct map_desc anubis_iodesc[] __initdata = { @@ -485,4 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis") .init_machine = anubis_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c index aa86ca8..d6a9763 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c2440/mach-at2440evb.c @@ -49,6 +49,8 @@ #include <plat/cpu.h> #include <plat/mci.h> +#include "common.h" + static struct map_desc at2440evb_iodesc[] __initdata = { /* Nothing here */ }; @@ -220,4 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB") .init_machine = at2440evb_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index de1e0ff..5859e60 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c @@ -90,6 +90,7 @@ #include <plat/iic.h> #include <plat/ts.h> +#include "common.h" static struct pcf50633 *gta02_pcf; @@ -600,4 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02") .init_irq = s3c24xx_init_irq, .init_machine = gta02_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index 91fe0b4..437322f 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c @@ -60,6 +60,8 @@ #include <sound/s3c24xx_uda134x.h> +#include "common.h" + #define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) static struct map_desc mini2440_iodesc[] __initdata = { @@ -681,4 +683,5 @@ MACHINE_START(MINI2440, "MINI2440") .init_machine = mini2440_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 61c0bf1..40eaf84 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -47,6 +47,8 @@ #include <plat/devs.h> #include <plat/cpu.h> +#include "common.h" + static struct map_desc nexcoder_iodesc[] __initdata = { /* nothing here yet */ }; @@ -156,4 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") .init_machine = nexcoder_init, .init_irq = s3c24xx_init_irq, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index d7e47b2..4c480ef 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -54,6 +54,8 @@ #include <plat/devs.h> #include <plat/cpu.h> +#include "common.h" + /* onboard perihperal map */ static struct map_desc osiris_iodesc[] __initdata = { @@ -434,4 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS") .init_irq = s3c24xx_init_irq, .init_machine = osiris_init, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c index 4267cd5..f892e8b 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c2440/mach-rx1950.c @@ -62,6 +62,8 @@ #include <sound/uda1380.h> +#include "common.h" + #define LCD_PWM_PERIOD 192960 #define LCD_PWM_DUTY 127353 @@ -820,4 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950") .init_irq = s3c24xx_init_irq, .init_machine = rx1950_init_machine, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index 3d5e2e6..88d648a 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c @@ -51,6 +51,8 @@ #include <plat/cpu.h> #include <plat/pm.h> +#include "common.h" + static struct map_desc rx3715_iodesc[] __initdata = { /* dump ISA space somewhere unused */ @@ -211,4 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715") .init_irq = rx3715_init_irq, .init_machine = rx3715_init_machine, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index 36eeb41..1deb60d 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -47,6 +47,8 @@ #include <plat/common-smdk.h> +#include "common.h" + static struct map_desc smdk2440_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ @@ -181,4 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440") .map_io = smdk2440_map_io, .init_machine = smdk2440_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2440_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index 37f8cc6..42d73f1 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c @@ -35,6 +35,7 @@ #include <plat/cpu.h> #include <plat/s3c244x.h> #include <plat/pm.h> +#include <plat/watchdog-reset.h> #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> @@ -73,3 +74,15 @@ void __init s3c2440_map_io(void) s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; } + +void s3c2440_restart(char mode, const char *cmd) +{ + if (mode == 's') { + soft_restart(0); + } + + arch_wdt_reset(); + + /* we'll take a jump through zero as a poor second */ + soft_restart(0); +} diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index bec107e..2092369 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -145,4 +145,5 @@ MACHINE_START(SMDK2443, "SMDK2443") .map_io = smdk2443_map_io, .init_machine = smdk2443_machine_init, .timer = &s3c24xx_timer, + .restart = s3c2443_restart, MACHINE_END diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index a22b771..4568ded 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c @@ -31,7 +31,6 @@ #include <asm/irq.h> #include <mach/regs-s3c2443-clock.h> -#include <mach/reset.h> #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> @@ -57,8 +56,11 @@ static struct sys_device s3c2443_sysdev = { .cls = &s3c2443_sysclass, }; -static void s3c2443_hard_reset(void) +void s3c2443_restart(char mode, const char *cmd) { + if (mode == 's') + soft_restart(0); + __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); } @@ -66,8 +68,6 @@ int __init s3c2443_init(void) { printk("S3C2443: Initialising architecture\n"); - s3c24xx_reset_hook = s3c2443_hard_reset; - s3c_nand_setname("s3c2412-nand"); s3c_fb_setname("s3c2443-fb"); diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index d7d9bb5..1822ac2 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -10,53 +10,49 @@ obj-m := obj-n := obj- := -# Core files -obj-y += cpu.o -obj-y += clock.o +# Core -# Core support for S3C6400 system +obj-y += common.o clock.o + +# Core support obj-$(CONFIG_CPU_S3C6400) += s3c6400.o obj-$(CONFIG_CPU_S3C6410) += s3c6410.o -obj-y += irq.o -obj-y += irq-eint.o +# PM + +obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o # DMA support obj-$(CONFIG_S3C64XX_DMA) += dma.o -# Device setup +# Device support -obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o -obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o -obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o -obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o +obj-y += dev-uart.o +obj-y += dev-audio.o +obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o -# PM +# Device setup -obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_PM) += sleep.o -obj-$(CONFIG_PM) += irq-pm.o +obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o +obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o +obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o +obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o +obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o +obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o +obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o # Machine support -obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o -obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o -obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o -obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o -obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o -obj-$(CONFIG_MACH_NCP) += mach-ncp.o -obj-$(CONFIG_MACH_HMT) += mach-hmt.o -obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o -obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o -obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o -obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o - -# device support - -obj-y += dev-uart.o -obj-y += dev-audio.o +obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o +obj-$(CONFIG_MACH_HMT) += mach-hmt.o +obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o +obj-$(CONFIG_MACH_NCP) += mach-ncp.o +obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o +obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o +obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o +obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o +obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o +obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o +obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 0187cde..31bb27d 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -760,7 +760,7 @@ static struct clk_lookup s3c64xx_clk_lookup[] = { #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) -void __init_or_cpufreq s3c6400_setup_clocks(void) +void __init_or_cpufreq s3c64xx_setup_clocks(void) { struct clk *xtal_clk; unsigned long xtal; @@ -859,7 +859,7 @@ static struct clk *clks[] __initdata = { * as ARMCLK as well as the necessary parent clocks. * * This call does not setup the clocks, which is left to the - * s3c6400_setup_clocks() call which may be needed by the cpufreq + * s3c64xx_setup_clocks() call which may be needed by the cpufreq * or resume code to re-set the clocks if the bootloader has changed * them. */ diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/common.c index 4d203be..35182ba 100644 --- a/arch/arm/mach-s3c64xx/irq-eint.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -1,11 +1,13 @@ -/* arch/arm/plat-s3c64xx/irq-eint.c +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ * - * S3C64XX - Interrupt handling for IRQ_EINT(x) + * Common Codes for S3C64XX machines * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -13,21 +15,183 @@ */ #include <linux/kernel.h> +#include <linux/init.h> +#include <linux/module.h> #include <linux/interrupt.h> +#include <linux/ioport.h> #include <linux/sysdev.h> -#include <linux/gpio.h> -#include <linux/irq.h> +#include <linux/serial_core.h> +#include <linux/platform_device.h> #include <linux/io.h> +#include <linux/dma-mapping.h> +#include <linux/irq.h> +#include <linux/gpio.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> #include <asm/hardware/vic.h> -#include <plat/regs-irqtype.h> +#include <mach/map.h> +#include <mach/hardware.h> #include <mach/regs-gpio.h> -#include <plat/gpio-cfg.h> -#include <mach/map.h> #include <plat/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> #include <plat/pm.h> +#include <plat/gpio-cfg.h> +#include <plat/irq-uart.h> +#include <plat/irq-vic-timer.h> +#include <plat/regs-irqtype.h> +#include <plat/regs-serial.h> +#include <plat/watchdog-reset.h> + +#include "common.h" + +/* uart registration process */ + +void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); +} + +/* table of supported CPUs */ + +static const char name_s3c6400[] = "S3C6400"; +static const char name_s3c6410[] = "S3C6410"; + +static struct cpu_table cpu_ids[] __initdata = { + { + .idcode = S3C6400_CPU_ID, + .idmask = S3C64XX_CPU_MASK, + .map_io = s3c6400_map_io, + .init_clocks = s3c6400_init_clocks, + .init_uarts = s3c64xx_init_uarts, + .init = s3c6400_init, + .name = name_s3c6400, + }, { + .idcode = S3C6410_CPU_ID, + .idmask = S3C64XX_CPU_MASK, + .map_io = s3c6410_map_io, + .init_clocks = s3c6410_init_clocks, + .init_uarts = s3c64xx_init_uarts, + .init = s3c6410_init, + .name = name_s3c6410, + }, +}; + +/* minimal IO mapping */ + +/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */ +#define UART_OFFS (S3C_PA_UART & 0xfffff) + +static struct map_desc s3c_iodesc[] __initdata = { + { + .virtual = (unsigned long)S3C_VA_SYS, + .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_MEM, + .pfn = __phys_to_pfn(S3C64XX_PA_SROM), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS), + .pfn = __phys_to_pfn(S3C_PA_UART), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC0, + .pfn = __phys_to_pfn(S3C64XX_PA_VIC0), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC1, + .pfn = __phys_to_pfn(S3C64XX_PA_VIC1), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_TIMER, + .pfn = __phys_to_pfn(S3C_PA_TIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C64XX_VA_GPIO, + .pfn = __phys_to_pfn(S3C64XX_PA_GPIO), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C64XX_VA_MODEM, + .pfn = __phys_to_pfn(S3C64XX_PA_MODEM), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_WATCHDOG, + .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_USB_HSPHY, + .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY), + .length = SZ_1K, + .type = MT_DEVICE, + }, +}; + +struct sysdev_class s3c64xx_sysclass = { + .name = "s3c64xx-core", +}; + +static struct sys_device s3c64xx_sysdev = { + .cls = &s3c64xx_sysclass, +}; + +/* read cpu identification code */ + +void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) +{ + /* initialise the io descriptors we need for initialisation */ + iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); + iotable_init(mach_desc, size); + init_consistent_dma_size(SZ_8M); + + /* detect cpu id */ + s3c64xx_init_cpu(); + + s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); +} + +static __init int s3c64xx_sysdev_init(void) +{ + sysdev_class_register(&s3c64xx_sysclass); + return sysdev_register(&s3c64xx_sysdev); +} +core_initcall(s3c64xx_sysdev_init); + +/* + * setup the sources the vic should advertise resume + * for, even though it is not doing the wake + * (set_irq_wake needs to be valid) + */ +#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) +#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \ + 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \ + 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \ + 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \ + 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE)) + +void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) +{ + printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); + + /* initialise the pair of VICs */ + vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); + vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); + + /* add the timer sub-irqs */ + s3c_init_vic_timer_irq(5, IRQ_TIMER0); +} #define eint_offset(irq) ((irq) - IRQ_EINT(0)) #define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) @@ -209,5 +373,13 @@ static int __init s3c64xx_init_irq_eint(void) return 0; } - arch_initcall(s3c64xx_init_irq_eint); + +void s3c64xx_restart(char mode, const char *cmd) +{ + if (mode != 's') + arch_wdt_reset(); + + /* if all else fails, or mode was for soft, jump to 0 */ + soft_restart(0); +} diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h new file mode 100644 index 0000000..8dc8ab6 --- /dev/null +++ b/arch/arm/mach-s3c64xx/common.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * Common Header for S3C64XX machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H +#define __ARCH_ARM_MACH_S3C64XX_COMMON_H + +void s3c64xx_init_irq(u32 vic0, u32 vic1); +void s3c64xx_init_io(struct map_desc *mach_desc, int size); + +void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); +void s3c64xx_setup_clocks(void); + +void s3c64xx_restart(char mode, const char *cmd); + +extern struct syscore_ops s3c64xx_irq_syscore_ops; +extern struct sysdev_class s3c64xx_sysclass; + +#ifdef CONFIG_CPU_S3C6400 + +extern int s3c6400_init(void); +extern void s3c6400_init_irq(void); +extern void s3c6400_map_io(void); +extern void s3c6400_init_clocks(int xtal); + +#else +#define s3c6400_init_clocks NULL +#define s3c6400_map_io NULL +#define s3c6400_init NULL +#endif + +#ifdef CONFIG_CPU_S3C6410 + +extern int s3c6410_init(void); +extern void s3c6410_init_irq(void); +extern void s3c6410_map_io(void); +extern void s3c6410_init_clocks(int xtal); + +#else +#define s3c6410_init_clocks NULL +#define s3c6410_map_io NULL +#define s3c6410_init NULL +#endif + +#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */ diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c deleted file mode 100644 index de085b7..0000000 --- a/arch/arm/mach-s3c64xx/cpu.c +++ /dev/null @@ -1,161 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/cpu.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C64XX CPU Support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/sysdev.h> -#include <linux/serial_core.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/dma-mapping.h> - -#include <mach/hardware.h> -#include <mach/map.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <plat/regs-serial.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/clock.h> - -#include <plat/s3c6400.h> -#include <plat/s3c6410.h> - -/* table of supported CPUs */ - -static const char name_s3c6400[] = "S3C6400"; -static const char name_s3c6410[] = "S3C6410"; - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = S3C6400_CPU_ID, - .idmask = S3C64XX_CPU_MASK, - .map_io = s3c6400_map_io, - .init_clocks = s3c6400_init_clocks, - .init_uarts = s3c6400_init_uarts, - .init = s3c6400_init, - .name = name_s3c6400, - }, { - .idcode = S3C6410_CPU_ID, - .idmask = S3C64XX_CPU_MASK, - .map_io = s3c6410_map_io, - .init_clocks = s3c6410_init_clocks, - .init_uarts = s3c6410_init_uarts, - .init = s3c6410_init, - .name = name_s3c6410, - }, -}; - -/* minimal IO mapping */ - -/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */ -#define UART_OFFS (S3C_PA_UART & 0xfffff) - -static struct map_desc s3c_iodesc[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_MEM, - .pfn = __phys_to_pfn(S3C64XX_PA_SROM), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS), - .pfn = __phys_to_pfn(S3C_PA_UART), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC0, - .pfn = __phys_to_pfn(S3C64XX_PA_VIC0), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC1, - .pfn = __phys_to_pfn(S3C64XX_PA_VIC1), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(S3C_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C64XX_VA_GPIO, - .pfn = __phys_to_pfn(S3C64XX_PA_GPIO), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C64XX_VA_MODEM, - .pfn = __phys_to_pfn(S3C64XX_PA_MODEM), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_USB_HSPHY, - .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY), - .length = SZ_1K, - .type = MT_DEVICE, - }, -}; - - -struct sysdev_class s3c64xx_sysclass = { - .name = "s3c64xx-core", -}; - -static struct sys_device s3c64xx_sysdev = { - .cls = &s3c64xx_sysclass, -}; - -/* uart registration process */ - -void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); -} - -/* read cpu identification code */ - -void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) -{ - /* initialise the io descriptors we need for initialisation */ - iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); - iotable_init(mach_desc, size); - init_consistent_dma_size(SZ_8M); - - /* detect cpu id */ - s3c64xx_init_cpu(); - - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); -} - -static __init int s3c64xx_sysdev_init(void) -{ - sysdev_class_register(&s3c64xx_sysclass); - return sysdev_register(&s3c64xx_sysdev); -} - -core_initcall(s3c64xx_sysdev_init); diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S index dd36260..dc2bc15 100644 --- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S @@ -12,7 +12,8 @@ * warranty of any kind, whether express or implied. */ -#include <mach/map.h> -#include <mach/irqs.h> + .macro disable_fiq + .endm -#include <asm/entry-macro-vic2.S> + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h index 2e58cb7..353ed43 100644 --- a/arch/arm/mach-s3c64xx/include/mach/system.h +++ b/arch/arm/mach-s3c64xx/include/mach/system.h @@ -11,20 +11,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H __FILE__ -#include <plat/watchdog-reset.h> - static void arch_idle(void) { /* nothing here yet */ } -static void arch_reset(char mode, const char *cmd) -{ - if (mode != 's') - arch_wdt_reset(); - - /* if all else fails, or mode was for soft, jump to 0 */ - cpu_reset(0); -} - #endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h deleted file mode 100644 index 23f75e5..0000000 --- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h - * - * from arch/arm/mach-iop3xx/include/mach/vmalloc.h - * - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C6400 vmalloc definition -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END 0xF6000000UL - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c deleted file mode 100644 index b07357e..0000000 --- a/arch/arm/mach-s3c64xx/irq.c +++ /dev/null @@ -1,47 +0,0 @@ -/* arch/arm/plat-s3c64xx/irq.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C64XX - Interrupt handling - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/serial_core.h> -#include <linux/irq.h> -#include <linux/io.h> - -#include <asm/hardware/vic.h> - -#include <mach/map.h> -#include <plat/irq-vic-timer.h> -#include <plat/irq-uart.h> -#include <plat/cpu.h> - -/* setup the sources the vic should advertise resume for, even though it - * is not doing the wake (set_irq_wake needs to be valid) */ -#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE)) -#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \ - 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \ - 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \ - 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \ - 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE)) - -void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) -{ - printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); - - /* initialise the pair of VICs */ - vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); - vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); - - /* add the timer sub-irqs */ - s3c_init_vic_timer_irq(5, IRQ_TIMER0); -} diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 8eba88e..b86f277 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -30,6 +30,7 @@ #include <video/platform_lcd.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> @@ -45,13 +46,14 @@ #include <plat/fb.h> #include <plat/regs-fb-v4.h> -#include <plat/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <mach/regs-gpio.h> #include <mach/regs-modem.h> +#include "common.h" + /* DM9000 */ #define ANW6410_PA_DM9000 (0x18000000) @@ -236,7 +238,9 @@ MACHINE_START(ANW6410, "A&W6410") .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = anw6410_map_io, .init_machine = anw6410_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index d04b654..f1c848a 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -37,6 +37,7 @@ #include <linux/mfd/wm831x/irq.h> #include <linux/mfd/wm831x/gpio.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> @@ -50,7 +51,6 @@ #include <mach/regs-gpio-memport.h> -#include <plat/s3c6410.h> #include <plat/regs-serial.h> #include <plat/regs-fb-v4.h> #include <plat/fb.h> @@ -66,6 +66,8 @@ #include <plat/iic.h> #include <plat/pm.h> +#include "common.h" + /* serial port setup */ #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) @@ -711,7 +713,9 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410") /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = crag6410_map_io, .init_machine = crag6410_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index 952f75f..521e07b 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -29,6 +29,7 @@ #include <mach/hardware.h> #include <mach/map.h> +#include <asm/hardware/vic.h> #include <asm/irq.h> #include <asm/mach-types.h> @@ -37,12 +38,13 @@ #include <plat/fb.h> #include <plat/nand.h> -#include <plat/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/regs-fb-v4.h> +#include "common.h" + #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) @@ -267,7 +269,9 @@ MACHINE_START(HMT, "Airgoo-HMT") /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = hmt_map_io, .init_machine = hmt_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 1bc85c3..c34c2ab 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c @@ -24,6 +24,7 @@ #include <linux/serial_core.h> #include <linux/types.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -33,7 +34,6 @@ #include <mach/regs-modem.h> #include <mach/regs-srom.h> -#include <plat/s3c6410.h> #include <plat/adc.h> #include <plat/cpu.h> #include <plat/devs.h> @@ -45,6 +45,8 @@ #include <video/platform_lcd.h> +#include "common.h" + #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) @@ -345,7 +347,9 @@ MACHINE_START(MINI6410, "MINI6410") /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = mini6410_map_io, .init_machine = mini6410_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index cb13cba..0efa2ba 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -25,6 +25,7 @@ #include <video/platform_lcd.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> @@ -39,12 +40,13 @@ #include <plat/iic.h> #include <plat/fb.h> -#include <plat/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/regs-fb-v4.h> +#include "common.h" + #define UCON S3C2410_UCON_DEFAULT #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE @@ -99,7 +101,9 @@ MACHINE_START(NCP, "NCP") /* Maintainer: Samsung Electronics */ .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = ncp_map_io, .init_machine = ncp_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index 87281e4..be2a9a2 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c @@ -25,6 +25,7 @@ #include <linux/serial_core.h> #include <linux/types.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -34,7 +35,6 @@ #include <mach/regs-modem.h> #include <mach/regs-srom.h> -#include <plat/s3c6410.h> #include <plat/adc.h> #include <plat/cpu.h> #include <plat/devs.h> @@ -46,6 +46,8 @@ #include <video/platform_lcd.h> +#include "common.h" + #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) @@ -326,7 +328,9 @@ MACHINE_START(REAL6410, "REAL6410") .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = real6410_map_io, .init_machine = real6410_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c index cb1ebeb..ce31db1 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq.c +++ b/arch/arm/mach-s3c64xx/mach-smartq.c @@ -40,6 +40,8 @@ #include <video/platform_lcd.h> +#include "common.h" + #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c index 94c831d..3f42431 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c @@ -17,19 +17,20 @@ #include <linux/leds.h> #include <linux/platform_device.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/map.h> #include <mach/regs-gpio.h> -#include <plat/s3c6410.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/fb.h> #include <plat/gpio-cfg.h> #include <plat/regs-fb-v4.h> +#include "common.h" #include "mach-smartq.h" static struct gpio_led smartq5_leds[] = { @@ -148,7 +149,9 @@ MACHINE_START(SMARTQ5, "SmartQ 5") /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = smartq_map_io, .init_machine = smartq5_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c index f112547..e5c09b6 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c @@ -17,19 +17,20 @@ #include <linux/leds.h> #include <linux/platform_device.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/map.h> #include <mach/regs-gpio.h> -#include <plat/s3c6410.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/fb.h> #include <plat/gpio-cfg.h> #include <plat/regs-fb-v4.h> +#include "common.h" #include "mach-smartq.h" static struct gpio_led smartq7_leds[] = { @@ -164,7 +165,9 @@ MACHINE_START(SMARTQ7, "SmartQ 7") /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = smartq_map_io, .init_machine = smartq7_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index 73450c2..5f09653 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -22,6 +22,7 @@ #include <asm/mach-types.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> @@ -31,12 +32,13 @@ #include <plat/regs-serial.h> -#include <plat/s3c6400.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/iic.h> +#include "common.h" + #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE @@ -88,7 +90,9 @@ MACHINE_START(SMDK6400, "SMDK6400") .atag_offset = 0x100, .init_irq = s3c6400_init_irq, + .handle_irq = vic_handle_irq, .map_io = smdk6400_map_io, .init_machine = smdk6400_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 8bc8edd..ca6fc20 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -43,6 +43,7 @@ #include <video/platform_lcd.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> @@ -63,7 +64,6 @@ #include <plat/fb.h> #include <plat/gpio-cfg.h> -#include <plat/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> @@ -73,6 +73,8 @@ #include <plat/backlight.h> #include <plat/regs-fb-v4.h> +#include "common.h" + #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE @@ -700,7 +702,9 @@ MACHINE_START(SMDK6410, "SMDK6410") .atag_offset = 0x100, .init_irq = s3c6410_init_irq, + .handle_irq = vic_handle_irq, .map_io = smdk6410_map_io, .init_machine = smdk6410_machine_init, .timer = &s3c24xx_timer, + .restart = s3c64xx_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 51c00f2..b1e1571 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c @@ -38,7 +38,8 @@ #include <plat/sdhci.h> #include <plat/iic-core.h> #include <plat/onenand-core.h> -#include <plat/s3c6400.h> + +#include "common.h" void __init s3c6400_map_io(void) { @@ -60,7 +61,7 @@ void __init s3c6400_map_io(void) void __init s3c6400_init_clocks(int xtal) { s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); - s3c6400_setup_clocks(); + s3c64xx_setup_clocks(); } void __init s3c6400_init_irq(void) diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 4117003..fba71bd 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -41,8 +41,8 @@ #include <plat/adc-core.h> #include <plat/iic-core.h> #include <plat/onenand-core.h> -#include <plat/s3c6400.h> -#include <plat/s3c6410.h> + +#include "common.h" void __init s3c6410_map_io(void) { @@ -66,7 +66,7 @@ void __init s3c6410_init_clocks(int xtal) { printk(KERN_DEBUG "%s: initialising clocks\n", __func__); s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); - s3c6400_setup_clocks(); + s3c64xx_setup_clocks(); } void __init s3c6410_init_irq(void) diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile index b44cc04..12bb951 100644 --- a/arch/arm/mach-s5p64x0/Makefile +++ b/arch/arm/mach-s5p64x0/Makefile @@ -10,14 +10,16 @@ obj-m := obj-n := obj- := -# Core support for S5P64X0 system +# Core -obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o -obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o +obj-y += common.o clock.o obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o + obj-$(CONFIG_PM) += pm.o irq-pm.o +obj-y += dma.o + # machine support obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o @@ -27,6 +29,7 @@ obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o obj-y += dev-audio.o +obj-y += setup-i2c0.o obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index c041ad7..4b3023e 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c @@ -31,7 +31,8 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/s5p6440.h> + +#include "common.h" static u32 epll_div[][5] = { { 36000000, 0, 48, 1, 4 }, diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index b5087cb..5bf607c 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c @@ -31,7 +31,8 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/s5p6450.h> + +#include "common.h" static struct clksrc_clk clk_mout_dpll = { .clk = { diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c index b52c6e2..b289b72 100644 --- a/arch/arm/mach-s5p64x0/clock.c +++ b/arch/arm/mach-s5p64x0/clock.c @@ -30,8 +30,8 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/s5p6440.h> -#include <plat/s5p6450.h> + +#include "common.h" struct clksrc_clk clk_mout_apll = { .clk = { diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c new file mode 100644 index 0000000..146fae1 --- /dev/null +++ b/arch/arm/mach-s5p64x0/common.c @@ -0,0 +1,446 @@ +/* + * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Codes for S5P64X0 machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/init.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/sysdev.h> +#include <linux/serial_core.h> +#include <linux/platform_device.h> +#include <linux/sched.h> +#include <linux/dma-mapping.h> +#include <linux/gpio.h> +#include <linux/irq.h> + +#include <asm/irq.h> +#include <asm/proc-fns.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <mach/map.h> +#include <mach/hardware.h> +#include <mach/regs-clock.h> +#include <mach/regs-gpio.h> + +#include <plat/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/pm.h> +#include <plat/sdhci.h> +#include <plat/adc-core.h> +#include <plat/fb-core.h> +#include <plat/gpio-cfg.h> +#include <plat/regs-irqtype.h> +#include <plat/regs-serial.h> +#include <plat/watchdog-reset.h> + +#include "common.h" + +static const char name_s5p6440[] = "S5P6440"; +static const char name_s5p6450[] = "S5P6450"; + +static struct cpu_table cpu_ids[] __initdata = { + { + .idcode = S5P6440_CPU_ID, + .idmask = S5P64XX_CPU_MASK, + .map_io = s5p6440_map_io, + .init_clocks = s5p6440_init_clocks, + .init_uarts = s5p6440_init_uarts, + .init = s5p64x0_init, + .name = name_s5p6440, + }, { + .idcode = S5P6450_CPU_ID, + .idmask = S5P64XX_CPU_MASK, + .map_io = s5p6450_map_io, + .init_clocks = s5p6450_init_clocks, + .init_uarts = s5p6450_init_uarts, + .init = s5p64x0_init, + .name = name_s5p6450, + }, +}; + +/* Initial IO mappings */ + +static struct map_desc s5p64x0_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_CHIPID, + .pfn = __phys_to_pfn(S5P64X0_PA_CHIPID), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_SYS, + .pfn = __phys_to_pfn(S5P64X0_PA_SYSCON), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_TIMER, + .pfn = __phys_to_pfn(S5P64X0_PA_TIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_WATCHDOG, + .pfn = __phys_to_pfn(S5P64X0_PA_WDT), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(S5P64X0_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GPIO, + .pfn = __phys_to_pfn(S5P64X0_PA_GPIO), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC0, + .pfn = __phys_to_pfn(S5P64X0_PA_VIC0), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC1, + .pfn = __phys_to_pfn(S5P64X0_PA_VIC1), + .length = SZ_16K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc s5p6440_iodesc[] __initdata = { + { + .virtual = (unsigned long)S3C_VA_UART, + .pfn = __phys_to_pfn(S5P6440_PA_UART(0)), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc s5p6450_iodesc[] __initdata = { + { + .virtual = (unsigned long)S3C_VA_UART, + .pfn = __phys_to_pfn(S5P6450_PA_UART(0)), + .length = SZ_512K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_UART + SZ_512K, + .pfn = __phys_to_pfn(S5P6450_PA_UART(5)), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static void s5p64x0_idle(void) +{ + unsigned long val; + + if (!need_resched()) { + val = __raw_readl(S5P64X0_PWR_CFG); + val &= ~(0x3 << 5); + val |= (0x1 << 5); + __raw_writel(val, S5P64X0_PWR_CFG); + + cpu_do_idle(); + } + local_irq_enable(); +} + +/* + * s5p64x0_map_io + * + * register the standard CPU IO areas + */ + +void __init s5p64x0_init_io(struct map_desc *mach_desc, int size) +{ + /* initialize the io descriptors we need for initialization */ + iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); + if (mach_desc) + iotable_init(mach_desc, size); + + /* detect cpu id and rev. */ + s5p_init_cpu(S5P64X0_SYS_ID); + + s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); +} + +void __init s5p6440_map_io(void) +{ + /* initialize any device information early */ + s3c_adc_setname("s3c64xx-adc"); + s3c_fb_setname("s5p64x0-fb"); + + s5p64x0_default_sdhci0(); + s5p64x0_default_sdhci1(); + s5p6440_default_sdhci2(); + + iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); + init_consistent_dma_size(SZ_8M); +} + +void __init s5p6450_map_io(void) +{ + /* initialize any device information early */ + s3c_adc_setname("s3c64xx-adc"); + s3c_fb_setname("s5p64x0-fb"); + + s5p64x0_default_sdhci0(); + s5p64x0_default_sdhci1(); + s5p6450_default_sdhci2(); + + iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); + init_consistent_dma_size(SZ_8M); +} + +/* + * s5p64x0_init_clocks + * + * register and setup the CPU clocks + */ + +void __init s5p6440_init_clocks(int xtal) +{ + printk(KERN_DEBUG "%s: initializing clocks\n", __func__); + + s3c24xx_register_baseclocks(xtal); + s5p_register_clocks(xtal); + s5p6440_register_clocks(); + s5p6440_setup_clocks(); +} + +void __init s5p6450_init_clocks(int xtal) +{ + printk(KERN_DEBUG "%s: initializing clocks\n", __func__); + + s3c24xx_register_baseclocks(xtal); + s5p_register_clocks(xtal); + s5p6450_register_clocks(); + s5p6450_setup_clocks(); +} + +/* + * s5p64x0_init_irq + * + * register the CPU interrupts + */ + +void __init s5p6440_init_irq(void) +{ + /* S5P6440 supports 2 VIC */ + u32 vic[2]; + + /* + * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)] + * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22] + */ + vic[0] = 0xff800ae7; + vic[1] = 0xffbf23e5; + + s5p_init_irq(vic, ARRAY_SIZE(vic)); +} + +void __init s5p6450_init_irq(void) +{ + /* S5P6450 supports only 2 VIC */ + u32 vic[2]; + + /* + * VIC0 is missing IRQ_VIC0[(13-15), (21-22)] + * VIC1 is missing IRQ VIC1[12, 14, 23] + */ + vic[0] = 0xff9f1fff; + vic[1] = 0xff7fafff; + + s5p_init_irq(vic, ARRAY_SIZE(vic)); +} + +struct sysdev_class s5p64x0_sysclass = { + .name = "s5p64x0-core", +}; + +static struct sys_device s5p64x0_sysdev = { + .cls = &s5p64x0_sysclass, +}; + +static int __init s5p64x0_core_init(void) +{ + return sysdev_class_register(&s5p64x0_sysclass); +} +core_initcall(s5p64x0_core_init); + +int __init s5p64x0_init(void) +{ + printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); + + /* set idle function */ + pm_idle = s5p64x0_idle; + + return sysdev_register(&s5p64x0_sysdev); +} + +/* uart registration process */ +void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + int uart; + + for (uart = 0; uart < no; uart++) { + s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart); + s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; + } + + s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); +} + +void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); +} + +#define eint_offset(irq) ((irq) - IRQ_EINT(0)) + +static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type) +{ + int offs = eint_offset(data->irq); + int shift; + u32 ctrl, mask; + u32 newvalue = 0; + + if (offs > 15) + return -EINVAL; + + switch (type) { + case IRQ_TYPE_NONE: + printk(KERN_WARNING "No edge setting!\n"); + break; + case IRQ_TYPE_EDGE_RISING: + newvalue = S3C2410_EXTINT_RISEEDGE; + break; + case IRQ_TYPE_EDGE_FALLING: + newvalue = S3C2410_EXTINT_FALLEDGE; + break; + case IRQ_TYPE_EDGE_BOTH: + newvalue = S3C2410_EXTINT_BOTHEDGE; + break; + case IRQ_TYPE_LEVEL_LOW: + newvalue = S3C2410_EXTINT_LOWLEV; + break; + case IRQ_TYPE_LEVEL_HIGH: + newvalue = S3C2410_EXTINT_HILEV; + break; + default: + printk(KERN_ERR "No such irq type %d", type); + return -EINVAL; + } + + shift = (offs / 2) * 4; + mask = 0x7 << shift; + + ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask; + ctrl |= newvalue << shift; + __raw_writel(ctrl, S5P64X0_EINT0CON0); + + /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ + if (soc_is_s5p6450()) + s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); + else + s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); + + return 0; +} + +/* + * s5p64x0_irq_demux_eint + * + * This function demuxes the IRQ from the group0 external interrupts, + * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into + * the specific handlers s5p64x0_irq_demux_eintX_Y. + */ +static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end) +{ + u32 status = __raw_readl(S5P64X0_EINT0PEND); + u32 mask = __raw_readl(S5P64X0_EINT0MASK); + unsigned int irq; + + status &= ~mask; + status >>= start; + status &= (1 << (end - start + 1)) - 1; + + for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { + if (status & 1) + generic_handle_irq(irq); + status >>= 1; + } +} + +static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc) +{ + s5p64x0_irq_demux_eint(0, 3); +} + +static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc) +{ + s5p64x0_irq_demux_eint(4, 11); +} + +static void s5p64x0_irq_demux_eint12_15(unsigned int irq, + struct irq_desc *desc) +{ + s5p64x0_irq_demux_eint(12, 15); +} + +static int s5p64x0_alloc_gc(void) +{ + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE, + S5P_VA_GPIO, handle_level_irq); + if (!gc) { + printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0" + "external interrupts failed\n", __func__); + return -EINVAL; + } + + ct = gc->chip_types; + ct->chip.irq_ack = irq_gc_ack_set_bit; + ct->chip.irq_mask = irq_gc_mask_set_bit; + ct->chip.irq_unmask = irq_gc_mask_clr_bit; + ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; + ct->chip.irq_set_wake = s3c_irqext_wake; + ct->regs.ack = EINT0PEND_OFFSET; + ct->regs.mask = EINT0MASK_OFFSET; + irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, + IRQ_NOREQUEST | IRQ_NOPROBE, 0); + return 0; +} + +static int __init s5p64x0_init_irq_eint(void) +{ + int ret = s5p64x0_alloc_gc(); + irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3); + irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11); + irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15); + + return ret; +} +arch_initcall(s5p64x0_init_irq_eint); + +void s5p64x0_restart(char mode, const char *cmd) +{ + if (mode != 's') + arch_wdt_reset(); + + soft_restart(0); +} diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h new file mode 100644 index 0000000..f8a60fd --- /dev/null +++ b/arch/arm/mach-s5p64x0/common.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Header for S5P64X0 machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H +#define __ARCH_ARM_MACH_S5P64X0_COMMON_H + +void s5p6440_init_irq(void); +void s5p6450_init_irq(void); +void s5p64x0_init_io(struct map_desc *mach_desc, int size); + +void s5p6440_register_clocks(void); +void s5p6440_setup_clocks(void); + +void s5p6450_register_clocks(void); +void s5p6450_setup_clocks(void); + +void s5p64x0_restart(char mode, const char *cmd); + +#ifdef CONFIG_CPU_S5P6440 + +extern int s5p64x0_init(void); +extern void s5p6440_map_io(void); +extern void s5p6440_init_clocks(int xtal); + +extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +#else +#define s5p6440_init_clocks NULL +#define s5p6440_init_uarts NULL +#define s5p6440_map_io NULL +#define s5p64x0_init NULL +#endif + +#ifdef CONFIG_CPU_S5P6450 + +extern int s5p64x0_init(void); +extern void s5p6450_map_io(void); +extern void s5p6450_init_clocks(int xtal); + +extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +#else +#define s5p6450_init_clocks NULL +#define s5p6450_init_uarts NULL +#define s5p6450_map_io NULL +#define s5p64x0_init NULL +#endif + +#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */ diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c deleted file mode 100644 index f6e24f3..0000000 --- a/arch/arm/mach-s5p64x0/cpu.c +++ /dev/null @@ -1,224 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/cpu.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/sysdev.h> -#include <linux/serial_core.h> -#include <linux/platform_device.h> -#include <linux/sched.h> -#include <linux/dma-mapping.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> -#include <asm/proc-fns.h> -#include <asm/irq.h> - -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/regs-serial.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/clock.h> -#include <plat/s5p6440.h> -#include <plat/s5p6450.h> -#include <plat/adc-core.h> -#include <plat/fb-core.h> -#include <plat/sdhci.h> - -/* Initial IO mappings */ - -static struct map_desc s5p64x0_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_GPIO, - .pfn = __phys_to_pfn(S5P64X0_PA_GPIO), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC0, - .pfn = __phys_to_pfn(S5P64X0_PA_VIC0), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC1, - .pfn = __phys_to_pfn(S5P64X0_PA_VIC1), - .length = SZ_16K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc s5p6440_iodesc[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S5P6440_PA_UART(0)), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc s5p6450_iodesc[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S5P6450_PA_UART(0)), - .length = SZ_512K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART + SZ_512K, - .pfn = __phys_to_pfn(S5P6450_PA_UART(5)), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static void s5p64x0_idle(void) -{ - unsigned long val; - - if (!need_resched()) { - val = __raw_readl(S5P64X0_PWR_CFG); - val &= ~(0x3 << 5); - val |= (0x1 << 5); - __raw_writel(val, S5P64X0_PWR_CFG); - - cpu_do_idle(); - } - local_irq_enable(); -} - -/* - * s5p64x0_map_io - * - * register the standard CPU IO areas - */ - -void __init s5p6440_map_io(void) -{ - /* initialize any device information early */ - s3c_adc_setname("s3c64xx-adc"); - s3c_fb_setname("s5p64x0-fb"); - - s5p64x0_default_sdhci0(); - s5p64x0_default_sdhci1(); - s5p6440_default_sdhci2(); - - iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); - iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); - init_consistent_dma_size(SZ_8M); -} - -void __init s5p6450_map_io(void) -{ - /* initialize any device information early */ - s3c_adc_setname("s3c64xx-adc"); - s3c_fb_setname("s5p64x0-fb"); - - s5p64x0_default_sdhci0(); - s5p64x0_default_sdhci1(); - s5p6450_default_sdhci2(); - - iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); - iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); - init_consistent_dma_size(SZ_8M); -} - -/* - * s5p64x0_init_clocks - * - * register and setup the CPU clocks - */ - -void __init s5p6440_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5p6440_register_clocks(); - s5p6440_setup_clocks(); -} - -void __init s5p6450_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5p6450_register_clocks(); - s5p6450_setup_clocks(); -} - -/* - * s5p64x0_init_irq - * - * register the CPU interrupts - */ - -void __init s5p6440_init_irq(void) -{ - /* S5P6440 supports 2 VIC */ - u32 vic[2]; - - /* - * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)] - * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22] - */ - vic[0] = 0xff800ae7; - vic[1] = 0xffbf23e5; - - s5p_init_irq(vic, ARRAY_SIZE(vic)); -} - -void __init s5p6450_init_irq(void) -{ - /* S5P6450 supports only 2 VIC */ - u32 vic[2]; - - /* - * VIC0 is missing IRQ_VIC0[(13-15), (21-22)] - * VIC1 is missing IRQ VIC1[12, 14, 23] - */ - vic[0] = 0xff9f1fff; - vic[1] = 0xff7fafff; - - s5p_init_irq(vic, ARRAY_SIZE(vic)); -} - -struct sysdev_class s5p64x0_sysclass = { - .name = "s5p64x0-core", -}; - -static struct sys_device s5p64x0_sysdev = { - .cls = &s5p64x0_sysclass, -}; - -static int __init s5p64x0_core_init(void) -{ - return sysdev_class_register(&s5p64x0_sysclass); -} -core_initcall(s5p64x0_core_init); - -int __init s5p64x0_init(void) -{ - printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); - - /* set idle function */ - pm_idle = s5p64x0_idle; - - return sysdev_register(&s5p64x0_sysdev); -} diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S index 10b62b4..fbb246d 100644 --- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S +++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S @@ -10,7 +10,8 @@ * published by the Free Software Foundation. */ -#include <mach/map.h> -#include <plat/irqs.h> + .macro disable_fiq + .endm -#include <asm/entry-macro-vic2.S> + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h index 60f5753..cf26e09 100644 --- a/arch/arm/mach-s5p64x0/include/mach/system.h +++ b/arch/arm/mach-s5p64x0/include/mach/system.h @@ -13,8 +13,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H __FILE__ -#include <plat/system-reset.h> - static void arch_idle(void) { /* nothing here yet */ diff --git a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h deleted file mode 100644 index 38dcc71..0000000 --- a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright 2010 Ben Dooks <ben-linux@fluff.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C6400 vmalloc definition -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END 0xF6000000UL - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c deleted file mode 100644 index 659a66c..0000000 --- a/arch/arm/mach-s5p64x0/init.c +++ /dev/null @@ -1,42 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/init.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - Init support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/serial_core.h> - -#include <mach/map.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/s5p6440.h> -#include <plat/s5p6450.h> -#include <plat/regs-serial.h> - -/* uart registration process */ -void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - int uart; - - for (uart = 0; uart < no; uart++) { - s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart); - s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; - } - - s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); -} - -void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); -} diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c deleted file mode 100644 index 275dc74..0000000 --- a/arch/arm/mach-s5p64x0/irq-eint.c +++ /dev/null @@ -1,155 +0,0 @@ -/* arch/arm/mach-s5p64x0/irq-eint.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd - * http://www.samsung.com/ - * - * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c - * - * S5P64X0 - Interrupt handling for External Interrupts. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/gpio.h> -#include <linux/irq.h> -#include <linux/io.h> - -#include <plat/cpu.h> -#include <plat/regs-irqtype.h> -#include <plat/gpio-cfg.h> -#include <plat/pm.h> - -#include <mach/regs-gpio.h> -#include <mach/regs-clock.h> - -#define eint_offset(irq) ((irq) - IRQ_EINT(0)) - -static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type) -{ - int offs = eint_offset(data->irq); - int shift; - u32 ctrl, mask; - u32 newvalue = 0; - - if (offs > 15) - return -EINVAL; - - switch (type) { - case IRQ_TYPE_NONE: - printk(KERN_WARNING "No edge setting!\n"); - break; - case IRQ_TYPE_EDGE_RISING: - newvalue = S3C2410_EXTINT_RISEEDGE; - break; - case IRQ_TYPE_EDGE_FALLING: - newvalue = S3C2410_EXTINT_FALLEDGE; - break; - case IRQ_TYPE_EDGE_BOTH: - newvalue = S3C2410_EXTINT_BOTHEDGE; - break; - case IRQ_TYPE_LEVEL_LOW: - newvalue = S3C2410_EXTINT_LOWLEV; - break; - case IRQ_TYPE_LEVEL_HIGH: - newvalue = S3C2410_EXTINT_HILEV; - break; - default: - printk(KERN_ERR "No such irq type %d", type); - return -EINVAL; - } - - shift = (offs / 2) * 4; - mask = 0x7 << shift; - - ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask; - ctrl |= newvalue << shift; - __raw_writel(ctrl, S5P64X0_EINT0CON0); - - /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ - if (soc_is_s5p6450()) - s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); - else - s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); - - return 0; -} - -/* - * s5p64x0_irq_demux_eint - * - * This function demuxes the IRQ from the group0 external interrupts, - * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into - * the specific handlers s5p64x0_irq_demux_eintX_Y. - */ -static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end) -{ - u32 status = __raw_readl(S5P64X0_EINT0PEND); - u32 mask = __raw_readl(S5P64X0_EINT0MASK); - unsigned int irq; - - status &= ~mask; - status >>= start; - status &= (1 << (end - start + 1)) - 1; - - for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { - if (status & 1) - generic_handle_irq(irq); - status >>= 1; - } -} - -static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc) -{ - s5p64x0_irq_demux_eint(0, 3); -} - -static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc) -{ - s5p64x0_irq_demux_eint(4, 11); -} - -static void s5p64x0_irq_demux_eint12_15(unsigned int irq, - struct irq_desc *desc) -{ - s5p64x0_irq_demux_eint(12, 15); -} - -static int s5p64x0_alloc_gc(void) -{ - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - - gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE, - S5P_VA_GPIO, handle_level_irq); - if (!gc) { - printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0" - "external interrupts failed\n", __func__); - return -EINVAL; - } - - ct = gc->chip_types; - ct->chip.irq_ack = irq_gc_ack_set_bit; - ct->chip.irq_mask = irq_gc_mask_set_bit; - ct->chip.irq_unmask = irq_gc_mask_clr_bit; - ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; - ct->chip.irq_set_wake = s3c_irqext_wake; - ct->regs.ack = EINT0PEND_OFFSET; - ct->regs.mask = EINT0MASK_OFFSET; - irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); - return 0; -} - -static int __init s5p64x0_init_irq_eint(void) -{ - int ret = s5p64x0_alloc_gc(); - irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3); - irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11); - irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15); - - return ret; -} -arch_initcall(s5p64x0_init_irq_eint); diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index fe168a0..a40e325 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c @@ -28,6 +28,7 @@ #include <video/platform_lcd.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/irq.h> @@ -41,7 +42,6 @@ #include <plat/regs-serial.h> #include <plat/gpio-cfg.h> -#include <plat/s5p6440.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> @@ -55,6 +55,8 @@ #include <plat/regs-fb.h> #include <plat/sdhci.h> +#include "common.h" + #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ S3C2410_UCON_TXIRQMODE | \ @@ -222,7 +224,7 @@ static struct platform_pwm_backlight_data smdk6440_bl_data = { static void __init smdk6440_map_io(void) { - s5p_init_io(NULL, 0, S5P64X0_SYS_ID); + s5p64x0_init_io(NULL, 0); s3c24xx_init_clocks(12000000); s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); s5p_set_timer_source(S5P_PWM3, S5P_PWM4); @@ -267,7 +269,9 @@ MACHINE_START(SMDK6440, "SMDK6440") .atag_offset = 0x100, .init_irq = s5p6440_init_irq, + .handle_irq = vic_handle_irq, .map_io = smdk6440_map_io, .init_machine = smdk6440_machine_init, .timer = &s5p_timer, + .restart = s5p64x0_restart, MACHINE_END diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c index 242a415..efb69e2 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c @@ -28,6 +28,7 @@ #include <video/platform_lcd.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/irq.h> @@ -41,7 +42,6 @@ #include <plat/regs-serial.h> #include <plat/gpio-cfg.h> -#include <plat/s5p6450.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> @@ -55,6 +55,8 @@ #include <plat/regs-fb.h> #include <plat/sdhci.h> +#include "common.h" + #define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ S3C2410_UCON_TXIRQMODE | \ @@ -241,7 +243,7 @@ static struct platform_pwm_backlight_data smdk6450_bl_data = { static void __init smdk6450_map_io(void) { - s5p_init_io(NULL, 0, S5P64X0_SYS_ID); + s5p64x0_init_io(NULL, 0); s3c24xx_init_clocks(19200000); s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); s5p_set_timer_source(S5P_PWM3, S5P_PWM4); @@ -286,7 +288,9 @@ MACHINE_START(SMDK6450, "SMDK6450") .atag_offset = 0x100, .init_irq = s5p6450_init_irq, + .handle_irq = vic_handle_irq, .map_io = smdk6450_map_io, .init_machine = smdk6450_machine_init, .timer = &s5p_timer, + .restart = s5p64x0_restart, MACHINE_END diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index 291e246..118c711 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile @@ -9,27 +9,24 @@ obj-m := obj-n := obj- := -# Core support for S5PC100 system +# Core -obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o -obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o -obj-$(CONFIG_CPU_S5PC100) += dma.o +obj-y += common.o clock.o -# Helper and device support - -obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o -obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o -obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o - -# device support -obj-y += dev-audio.o +obj-y += dma.o # machine support obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o # device support + obj-y += dev-audio.o + +obj-y += setup-i2c0.o +obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o +obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o +obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o +obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o +obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o +obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index eba721b..247194d 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c @@ -27,7 +27,8 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/s5pc100.h> + +#include "common.h" static struct clk s5p_clk_otgphy = { .name = "otg_phy", diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/common.c index fd2708e..73594a2 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/common.c @@ -1,17 +1,16 @@ -/* linux/arch/arm/mach-s5pc100/cpu.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. +/* + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * * Copyright 2009 Samsung Electronics Co. * Byungho Min <bhmin@samsung.com> * - * Based on mach-s3c6410/cpu.c + * Common Codes for S5PC100 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. -*/ + */ #include <linux/kernel.h> #include <linux/types.h> @@ -26,35 +25,73 @@ #include <linux/platform_device.h> #include <linux/sched.h> +#include <asm/irq.h> +#include <asm/proc-fns.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/proc-fns.h> - -#include <mach/hardware.h> #include <mach/map.h> -#include <asm/irq.h> - -#include <plat/regs-serial.h> +#include <mach/hardware.h> #include <mach/regs-clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/clock.h> -#include <plat/ata-core.h> -#include <plat/iic-core.h> #include <plat/sdhci.h> #include <plat/adc-core.h> -#include <plat/onenand-core.h> +#include <plat/ata-core.h> #include <plat/fb-core.h> +#include <plat/iic-core.h> +#include <plat/onenand-core.h> +#include <plat/regs-serial.h> +#include <plat/watchdog-reset.h> + +#include "common.h" + +static const char name_s5pc100[] = "S5PC100"; -#include <plat/s5pc100.h> +static struct cpu_table cpu_ids[] __initdata = { + { + .idcode = S5PC100_CPU_ID, + .idmask = S5PC100_CPU_MASK, + .map_io = s5pc100_map_io, + .init_clocks = s5pc100_init_clocks, + .init_uarts = s5pc100_init_uarts, + .init = s5pc100_init, + .name = name_s5pc100, + }, +}; /* Initial IO mappings */ static struct map_desc s5pc100_iodesc[] __initdata = { { + .virtual = (unsigned long)S5P_VA_CHIPID, + .pfn = __phys_to_pfn(S5PC100_PA_CHIPID), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_SYS, + .pfn = __phys_to_pfn(S5PC100_PA_SYSCON), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_TIMER, + .pfn = __phys_to_pfn(S5PC100_PA_TIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_WATCHDOG, + .pfn = __phys_to_pfn(S5PC100_PA_WATCHDOG), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(S5PC100_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { .virtual = (unsigned long)S5P_VA_SYSTIMER, .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), .length = SZ_16K, @@ -100,15 +137,27 @@ static void s5pc100_idle(void) local_irq_enable(); } -/* s5pc100_map_io +/* + * s5pc100_map_io * - * register the standard cpu IO areas -*/ + * register the standard CPU IO areas + */ -void __init s5pc100_map_io(void) +void __init s5pc100_init_io(struct map_desc *mach_desc, int size) { + /* initialize the io descriptors we need for initialization */ iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); + if (mach_desc) + iotable_init(mach_desc, size); + + /* detect cpu id and rev. */ + s5p_init_cpu(S5P_VA_CHIPID); + s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); +} + +void __init s5pc100_map_io(void) +{ /* initialise device information early */ s5pc100_default_sdhci0(); s5pc100_default_sdhci1(); @@ -155,7 +204,6 @@ static int __init s5pc100_core_init(void) { return sysdev_class_register(&s5pc100_sysclass); } - core_initcall(s5pc100_core_init); int __init s5pc100_init(void) @@ -167,3 +215,18 @@ int __init s5pc100_init(void) return sysdev_register(&s5pc100_sysdev); } + +/* uart registration process */ + +void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); +} + +void s5pc100_restart(char mode, const char *cmd) +{ + if (mode != 's') + arch_wdt_reset(); + + soft_restart(0); +} diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h new file mode 100644 index 0000000..9fbd3ae --- /dev/null +++ b/arch/arm/mach-s5pc100/common.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Header for S5PC100 machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H +#define __ARCH_ARM_MACH_S5PC100_COMMON_H + +void s5pc100_init_io(struct map_desc *mach_desc, int size); +void s5pc100_init_irq(void); + +void s5pc100_register_clocks(void); +void s5pc100_setup_clocks(void); + +void s5pc100_restart(char mode, const char *cmd); + +#ifdef CONFIG_CPU_S5PC100 + +extern int s5pc100_init(void); +extern void s5pc100_map_io(void); +extern void s5pc100_init_clocks(int xtal); +extern void s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +#else +#define s5pc100_init_clocks NULL +#define s5pc100_init_uarts NULL +#define s5pc100_map_io NULL +#define s5pc100_init NULL +#endif + +#endif /* __ARCH_ARM_MACH_S5PC100_COMMON_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index ba76af0..b8c242e 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S @@ -12,39 +12,14 @@ * warranty of any kind, whether express or implied. */ -#include <asm/hardware/vic.h> -#include <mach/map.h> -#include <plat/irqs.h> - .macro disable_fiq .endm .macro get_irqnr_preamble, base, tmp - ldr \base, =VA_VIC0 .endm .macro arch_ret_to_user, tmp1, tmp2 .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - @ check the vic0 - mov \irqnr, # S5P_IRQ_OFFSET + 31 - ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] - teq \irqstat, #0 - - @ otherwise try vic1 - addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) - addeq \irqnr, \irqnr, #32 - ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] - teqeq \irqstat, #0 - - @ otherwise try vic2 - addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) - addeq \irqnr, \irqnr, #32 - ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] - teqeq \irqstat, #0 - - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat .endm diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index a9ea57c..afc96c2 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h @@ -11,8 +11,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H __FILE__ -#include <plat/system-reset.h> - static void arch_idle(void) { /* nothing here yet */ diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h deleted file mode 100644 index 44c8e57..0000000 --- a/arch/arm/mach-s5pc100/include/mach/vmalloc.h +++ /dev/null @@ -1,17 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/vmalloc.h - * - * Copyright 2010 Ben Dooks <ben-linux@fluff.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C6400 vmalloc definition -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END 0xF6000000UL - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pc100/init.c b/arch/arm/mach-s5pc100/init.c deleted file mode 100644 index 19d7b52..0000000 --- a/arch/arm/mach-s5pc100/init.c +++ /dev/null @@ -1,24 +0,0 @@ -/* linux/arch/arm/plat-s5pc100/s5pc100-init.c - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/s5pc100.h> - -/* uart registration process */ -void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); -} diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index 26f5c91..674d229 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c @@ -25,6 +25,7 @@ #include <linux/input.h> #include <linux/pwm_backlight.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -42,7 +43,6 @@ #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> -#include <plat/s5pc100.h> #include <plat/fb.h> #include <plat/iic.h> #include <plat/ata.h> @@ -53,6 +53,8 @@ #include <plat/backlight.h> #include <plat/regs-fb-v4.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -215,7 +217,7 @@ static struct platform_pwm_backlight_data smdkc100_bl_data = { static void __init smdkc100_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s5pc100_init_io(NULL, 0); s3c24xx_init_clocks(12000000); s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); } @@ -250,7 +252,9 @@ MACHINE_START(SMDKC100, "SMDKC100") /* Maintainer: Byungho Min <bhmin@samsung.com> */ .atag_offset = 0x100, .init_irq = s5pc100_init_irq, + .handle_irq = vic_handle_irq, .map_io = smdkc100_map_io, .init_machine = smdkc100_machine_init, .timer = &s3c24xx_timer, + .restart = s5pc100_restart, MACHINE_END diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 471df5d..76a121d 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -10,28 +10,31 @@ obj-m := obj-n := obj- := -# Core support for S5PV210 system +# Core + +obj-y += common.o clock.o -obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o -obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o obj-$(CONFIG_PM) += pm.o +obj-y += dma.o + # machine support obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o -obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o -obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o obj-$(CONFIG_MACH_GONI) += mach-goni.o +obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o +obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o # device support obj-y += dev-audio.o +obj-y += setup-i2c0.o obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o -obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o +obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o +obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index cead513..11db6c0 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c @@ -29,7 +29,8 @@ #include <plat/pll.h> #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> -#include <plat/s5pv210.h> + +#include "common.h" static unsigned long xtal; diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/common.c index 84ec746..b9adefd 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/common.c @@ -1,12 +1,13 @@ -/* linux/arch/arm/mach-s5pv210/cpu.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. +/* + * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * + * Common Codes for S5PV210 + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. -*/ + */ #include <linux/kernel.h> #include <linux/types.h> @@ -21,33 +22,74 @@ #include <linux/platform_device.h> #include <linux/sched.h> #include <linux/dma-mapping.h> +#include <linux/serial_core.h> +#include <asm/proc-fns.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/proc-fns.h> #include <mach/map.h> #include <mach/regs-clock.h> #include <plat/cpu.h> -#include <plat/devs.h> #include <plat/clock.h> -#include <plat/fb-core.h> -#include <plat/s5pv210.h> +#include <plat/devs.h> +#include <plat/sdhci.h> #include <plat/adc-core.h> #include <plat/ata-core.h> +#include <plat/fb-core.h> #include <plat/fimc-core.h> #include <plat/iic-core.h> #include <plat/keypad-core.h> -#include <plat/sdhci.h> -#include <plat/reset.h> #include <plat/tv-core.h> +#include <plat/regs-serial.h> + +#include "common.h" + +static const char name_s5pv210[] = "S5PV210/S5PC110"; + +static struct cpu_table cpu_ids[] __initdata = { + { + .idcode = S5PV210_CPU_ID, + .idmask = S5PV210_CPU_MASK, + .map_io = s5pv210_map_io, + .init_clocks = s5pv210_init_clocks, + .init_uarts = s5pv210_init_uarts, + .init = s5pv210_init, + .name = name_s5pv210, + }, +}; /* Initial IO mappings */ static struct map_desc s5pv210_iodesc[] __initdata = { { + .virtual = (unsigned long)S5P_VA_CHIPID, + .pfn = __phys_to_pfn(S5PV210_PA_CHIPID), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_SYS, + .pfn = __phys_to_pfn(S5PV210_PA_SYSCON), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_TIMER, + .pfn = __phys_to_pfn(S5PV210_PA_TIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_WATCHDOG, + .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(S5PV210_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { .virtual = (unsigned long)S5P_VA_SYSTIMER, .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), .length = SZ_4K, @@ -108,19 +150,32 @@ static void s5pv210_idle(void) local_irq_enable(); } -static void s5pv210_sw_reset(void) +void s5pv210_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); } -/* s5pv210_map_io +/* + * s5pv210_map_io * * register the standard cpu IO areas -*/ + */ -void __init s5pv210_map_io(void) +void __init s5pv210_init_io(struct map_desc *mach_desc, int size) { + /* initialize the io descriptors we need for initialization */ iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); + if (mach_desc) + iotable_init(mach_desc, size); + + /* detect cpu id and rev. */ + s5p_init_cpu(S5P_VA_CHIPID); + + s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); +} + +void __init s5pv210_map_io(void) +{ init_consistent_dma_size(14 << 20); /* initialise device information early */ @@ -186,7 +241,6 @@ static int __init s5pv210_core_init(void) { return sysdev_class_register(&s5pv210_sysclass); } - core_initcall(s5pv210_core_init); int __init s5pv210_init(void) @@ -196,8 +250,12 @@ int __init s5pv210_init(void) /* set idle function */ pm_idle = s5pv210_idle; - /* set sw_reset function */ - s5p_reset_hook = s5pv210_sw_reset; - return sysdev_register(&s5pv210_sysdev); } + +/* uart registration process */ + +void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); +} diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h new file mode 100644 index 0000000..6ed2af5 --- /dev/null +++ b/arch/arm/mach-s5pv210/common.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Common Header for S5PV210 machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H +#define __ARCH_ARM_MACH_S5PV210_COMMON_H + +void s5pv210_init_io(struct map_desc *mach_desc, int size); +void s5pv210_init_irq(void); + +void s5pv210_register_clocks(void); +void s5pv210_setup_clocks(void); + +void s5pv210_restart(char mode, const char *cmd); + +#ifdef CONFIG_CPU_S5PV210 + +extern int s5pv210_init(void); +extern void s5pv210_map_io(void); +extern void s5pv210_init_clocks(int xtal); +extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +#else +#define s5pv210_init_clocks NULL +#define s5pv210_init_uarts NULL +#define s5pv210_map_io NULL +#define s5pv210_init NULL +#endif + +#endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S index 3aa41ac..bebca1b 100644 --- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S @@ -10,45 +10,8 @@ * published by the Free Software Foundation. */ -#include <asm/hardware/vic.h> -#include <mach/map.h> -#include <plat/irqs.h> - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =VA_VIC0 - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - @ check the vic0 - mov \irqnr, # S5P_IRQ_OFFSET + 31 - ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] - teq \irqstat, #0 - - @ otherwise try vic1 - addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) - addeq \irqnr, \irqnr, #32 - ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] - teqeq \irqstat, #0 - - @ otherwise try vic2 - addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) - addeq \irqnr, \irqnr, #32 - ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] - teqeq \irqstat, #0 - - @ otherwise try vic3 - addeq \tmp, \base, #(VA_VIC3 - VA_VIC0) - addeq \irqnr, \irqnr, #32 - ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] - teqeq \irqstat, #0 - - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h index af8a200..bf288ce 100644 --- a/arch/arm/mach-s5pv210/include/mach/system.h +++ b/arch/arm/mach-s5pv210/include/mach/system.h @@ -13,8 +13,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H __FILE__ -#include <plat/system-reset.h> - static void arch_idle(void) { /* nothing here yet */ diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h deleted file mode 100644 index a6c659d..0000000 --- a/arch/arm/mach-s5pv210/include/mach/vmalloc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h - * - * Copyright 2010 Ben Dooks <ben-linux@fluff.org> - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h - * - * S5PV210 vmalloc definition - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H __FILE__ - -#define VMALLOC_END 0xF6000000UL - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c deleted file mode 100644 index 468a5f8..0000000 --- a/arch/arm/mach-s5pv210/init.c +++ /dev/null @@ -1,25 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/init.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/serial_core.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/s5pv210.h> -#include <plat/regs-serial.h> - -/* uart registration process */ -void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); -} diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 5811a96..5e734d0 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c @@ -22,6 +22,7 @@ #include <linux/input.h> #include <linux/gpio.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/setup.h> @@ -32,7 +33,6 @@ #include <plat/gpio-cfg.h> #include <plat/regs-serial.h> -#include <plat/s5pv210.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/fb.h> @@ -41,6 +41,8 @@ #include <plat/s5p-time.h> #include <plat/regs-fb-v4.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -595,8 +597,7 @@ static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { static void aquila_setup_sdhci(void) { - gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); - gpio_direction_output(AQUILA_EXT_FLASH_EN, 1); + gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN"); s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); @@ -644,7 +645,7 @@ static void __init aquila_sound_init(void) static void __init aquila_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s5pv210_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); s5p_set_timer_source(S5P_PWM3, S5P_PWM4); @@ -680,7 +681,9 @@ MACHINE_START(AQUILA, "Aquila") Kyungmin Park <kyungmin.park@samsung.com> */ .atag_offset = 0x100, .init_irq = s5pv210_init_irq, + .handle_irq = vic_handle_irq, .map_io = aquila_map_io, .init_machine = aquila_machine_init, .timer = &s5p_timer, + .restart = s5pv210_restart, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 15edcae..ff91526 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c @@ -27,6 +27,7 @@ #include <linux/gpio.h> #include <linux/interrupt.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/setup.h> @@ -37,7 +38,6 @@ #include <plat/gpio-cfg.h> #include <plat/regs-serial.h> -#include <plat/s5pv210.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/fb.h> @@ -54,6 +54,8 @@ #include <media/s5p_fimc.h> #include <media/noon010pc30.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -227,8 +229,7 @@ static void __init goni_radio_init(void) i2c1_devs[0].irq = gpio_to_irq(gpio); gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */ - gpio_request(gpio, "FM_RST"); - gpio_direction_output(gpio, 1); + gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "FM_RST"); } /* TSP */ @@ -264,8 +265,7 @@ static void __init goni_tsp_init(void) int gpio; gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */ - gpio_request(gpio, "TSP_LDO_ON"); - gpio_direction_output(gpio, 1); + gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON"); gpio_export(gpio, 0); gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */ @@ -890,7 +890,7 @@ static void __init goni_sound_init(void) static void __init goni_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s5pv210_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); s5p_set_timer_source(S5P_PWM3, S5P_PWM4); @@ -956,8 +956,10 @@ MACHINE_START(GONI, "GONI") /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ .atag_offset = 0x100, .init_irq = s5pv210_init_irq, + .handle_irq = vic_handle_irq, .map_io = goni_map_io, .init_machine = goni_machine_init, .timer = &s5p_timer, .reserve = &goni_reserve, + .restart = s5pv210_restart, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index f7266bb..9405da4 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c @@ -15,6 +15,7 @@ #include <linux/i2c.h> #include <linux/sysdev.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/setup.h> @@ -24,7 +25,6 @@ #include <mach/regs-clock.h> #include <plat/regs-serial.h> -#include <plat/s5pv210.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/ata.h> @@ -32,6 +32,8 @@ #include <plat/pm.h> #include <plat/s5p-time.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -109,7 +111,7 @@ static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = { static void __init smdkc110_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s5pv210_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); s5p_set_timer_source(S5P_PWM3, S5P_PWM4); @@ -138,7 +140,9 @@ MACHINE_START(SMDKC110, "SMDKC110") /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ .atag_offset = 0x100, .init_irq = s5pv210_init_irq, + .handle_irq = vic_handle_irq, .map_io = smdkc110_map_io, .init_machine = smdkc110_machine_init, .timer = &s5p_timer, + .restart = s5pv210_restart, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 8662ef6..f6feef4 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c @@ -20,6 +20,7 @@ #include <linux/delay.h> #include <linux/pwm_backlight.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/setup.h> @@ -33,7 +34,6 @@ #include <plat/regs-serial.h> #include <plat/regs-srom.h> #include <plat/gpio-cfg.h> -#include <plat/s5pv210.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/adc.h> @@ -47,6 +47,8 @@ #include <plat/backlight.h> #include <plat/regs-fb-v4.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -153,15 +155,12 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd, { if (power) { #if !defined(CONFIG_BACKLIGHT_PWM) - gpio_request(S5PV210_GPD0(3), "GPD0"); - gpio_direction_output(S5PV210_GPD0(3), 1); + gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_HIGH, "GPD0"); gpio_free(S5PV210_GPD0(3)); #endif /* fire nRESET on power up */ - gpio_request(S5PV210_GPH0(6), "GPH0"); - - gpio_direction_output(S5PV210_GPH0(6), 1); + gpio_request_one(S5PV210_GPH0(6), GPIOF_OUT_INIT_HIGH, "GPH0"); gpio_set_value(S5PV210_GPH0(6), 0); mdelay(10); @@ -172,8 +171,7 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd, gpio_free(S5PV210_GPH0(6)); } else { #if !defined(CONFIG_BACKLIGHT_PWM) - gpio_request(S5PV210_GPD0(3), "GPD0"); - gpio_direction_output(S5PV210_GPD0(3), 0); + gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_LOW, "GPD0"); gpio_free(S5PV210_GPD0(3)); #endif } @@ -278,7 +276,7 @@ static struct platform_pwm_backlight_data smdkv210_bl_data = { static void __init smdkv210_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s5pv210_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); s5p_set_timer_source(S5P_PWM2, S5P_PWM4); @@ -316,7 +314,9 @@ MACHINE_START(SMDKV210, "SMDKV210") /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ .atag_offset = 0x100, .init_irq = s5pv210_init_irq, + .handle_irq = vic_handle_irq, .map_io = smdkv210_map_io, .init_machine = smdkv210_machine_init, .timer = &s5p_timer, + .restart = s5pv210_restart, MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c index 97cc066..74e99bc 100644 --- a/arch/arm/mach-s5pv210/mach-torbreck.c +++ b/arch/arm/mach-s5pv210/mach-torbreck.c @@ -14,6 +14,7 @@ #include <linux/init.h> #include <linux/serial_core.h> +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/setup.h> @@ -23,12 +24,13 @@ #include <mach/regs-clock.h> #include <plat/regs-serial.h> -#include <plat/s5pv210.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/iic.h> #include <plat/s5p-time.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -102,7 +104,7 @@ static struct i2c_board_info torbreck_i2c_devs2[] __initdata = { static void __init torbreck_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s5pv210_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); s5p_set_timer_source(S5P_PWM3, S5P_PWM4); @@ -127,7 +129,9 @@ MACHINE_START(TORBRECK, "TORBRECK") /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ .atag_offset = 0x100, .init_irq = s5pv210_init_irq, + .handle_irq = vic_handle_irq, .map_io = torbreck_map_io, .init_machine = torbreck_machine_init, .timer = &s5p_timer, + .restart = s5pv210_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 3dd133f..6b93e20 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -455,4 +455,5 @@ MACHINE_START(ASSABET, "Intel-Assabet") #ifdef CONFIG_SA1111 .dma_zone_size = SZ_1M, #endif + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index bda83e1..b07a2c0 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c @@ -309,4 +309,5 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4") #ifdef CONFIG_SA1111 .dma_zone_size = SZ_1M, #endif + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index 7f3da4b..11bb6d0 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c @@ -139,4 +139,5 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") .init_irq = cerf_init_irq, .timer = &sa1100_timer, .init_machine = cerf_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 2965cc9..b9060e2 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c @@ -387,4 +387,5 @@ MACHINE_START(COLLIE, "Sharp-Collie") .init_irq = sa1100_init_irq, .timer = &sa1100_timer, .init_machine = collie_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 3eff179..480d2ea 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -126,6 +126,17 @@ static void sa1100_power_off(void) PMCR = PMCR_SF; } +void sa11x0_restart(char mode, const char *cmd) +{ + if (mode == 's') { + /* Jump into ROM at address 0 */ + soft_restart(0); + } else { + /* Use on-chip reset capability */ + RSRR = RSRR_SWR; + } +} + static void sa11x0_register_device(struct platform_device *dev, void *data) { int err; diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h index b7a9a60..33268cf 100644 --- a/arch/arm/mach-sa1100/generic.h +++ b/arch/arm/mach-sa1100/generic.h @@ -10,6 +10,7 @@ extern struct sys_timer sa1100_timer; extern void __init sa1100_map_io(void); extern void __init sa1100_init_irq(void); extern void __init sa1100_init_gpio(void); +extern void sa11x0_restart(char, const char *); #define SET_BANK(__nr,__start,__size) \ mi->bank[__nr].start = (__start), \ diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c index b30733a..1e6b3c1 100644 --- a/arch/arm/mach-sa1100/h3100.c +++ b/arch/arm/mach-sa1100/h3100.c @@ -89,5 +89,6 @@ MACHINE_START(H3100, "Compaq iPAQ H3100") .init_irq = sa1100_init_irq, .timer = &sa1100_timer, .init_machine = h3100_mach_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index 6fd324d..6b58e74 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c @@ -130,5 +130,6 @@ MACHINE_START(H3600, "Compaq iPAQ H3600") .init_irq = sa1100_init_irq, .timer = &sa1100_timer, .init_machine = h3600_mach_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c index 30f4a55..c01bb36 100644 --- a/arch/arm/mach-sa1100/hackkit.c +++ b/arch/arm/mach-sa1100/hackkit.c @@ -200,4 +200,5 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board") .init_irq = sa1100_init_irq, .timer = &sa1100_timer, .init_machine = hackkit_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h index ba9da9f..e17b208 100644 --- a/arch/arm/mach-sa1100/include/mach/system.h +++ b/arch/arm/mach-sa1100/include/mach/system.h @@ -3,20 +3,7 @@ * * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> */ -#include <mach/hardware.h> - static inline void arch_idle(void) { cpu_do_idle(); } - -static inline void arch_reset(char mode, const char *cmd) -{ - if (mode == 's') { - /* Jump into ROM at address 0 */ - cpu_reset(0); - } else { - /* Use on-chip reset capability */ - RSRR = RSRR_SWR; - } -} diff --git a/arch/arm/mach-sa1100/include/mach/vmalloc.h b/arch/arm/mach-sa1100/include/mach/vmalloc.h deleted file mode 100644 index b3d0023..0000000 --- a/arch/arm/mach-sa1100/include/mach/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -/* - * arch/arm/mach-sa1100/include/mach/vmalloc.h - */ -#define VMALLOC_END (0xe8000000UL) diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 77198fe..ee121d6 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c @@ -373,4 +373,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720") #ifdef CONFIG_SA1111 .dma_zone_size = SZ_1M, #endif + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c index 5bc59d0..af4e276 100644 --- a/arch/arm/mach-sa1100/lart.c +++ b/arch/arm/mach-sa1100/lart.c @@ -66,4 +66,5 @@ MACHINE_START(LART, "LART") .init_irq = sa1100_init_irq, .init_machine = lart_init, .timer = &sa1100_timer, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c index 032f388..85f6ee6 100644 --- a/arch/arm/mach-sa1100/nanoengine.c +++ b/arch/arm/mach-sa1100/nanoengine.c @@ -19,6 +19,7 @@ #include <asm/mach-types.h> #include <asm/setup.h> +#include <asm/page.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> @@ -116,4 +117,5 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine") .init_irq = sa1100_init_irq, .timer = &sa1100_timer, .init_machine = nanoengine_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 65161f2..9307df0 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c @@ -150,4 +150,5 @@ MACHINE_START(PLEB, "PLEB") .init_irq = sa1100_init_irq, .timer = &sa1100_timer, .init_machine = pleb_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c index 1cccbf5..318b2b7 100644 --- a/arch/arm/mach-sa1100/shannon.c +++ b/arch/arm/mach-sa1100/shannon.c @@ -87,4 +87,5 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") .init_irq = sa1100_init_irq, .timer = &sa1100_timer, .init_machine = shannon_init, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 4790f3f..e17c04d 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -396,4 +396,5 @@ MACHINE_START(SIMPAD, "Simpad") .map_io = simpad_map_io, .init_irq = sa1100_init_irq, .timer = &sa1100_timer, + .restart = sa11x0_restart, MACHINE_END diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index fa66024..69e3353 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -12,7 +12,6 @@ #include <linux/errno.h> #include <linux/interrupt.h> #include <linux/irq.h> -#include <linux/sched.h> /* just for sched_clock() - funny that */ #include <linux/timex.h> #include <linux/clockchips.h> @@ -20,29 +19,9 @@ #include <asm/sched_clock.h> #include <mach/hardware.h> -/* - * This is the SA11x0 sched_clock implementation. - */ -static DEFINE_CLOCK_DATA(cd); - -/* - * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz, - * NSEC_PER_SEC, 60). - * This gives a resolution of about 271ns and a wrap period of about 19min. - */ -#define SC_MULT 2275555556u -#define SC_SHIFT 23 - -unsigned long long notrace sched_clock(void) -{ - u32 cyc = OSCR; - return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); -} - -static void notrace sa1100_update_sched_clock(void) +static u32 notrace sa1100_read_sched_clock(void) { - u32 cyc = OSCR; - update_sched_clock(&cd, cyc, (u32)~0); + return OSCR; } #define MIN_OSCR_DELTA 2 @@ -109,8 +88,7 @@ static void __init sa1100_timer_init(void) OIER = 0; OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; - init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32, - 3686400, SC_MULT, SC_SHIFT); + setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4); ckevt_sa1100_osmr0.max_delta_ns = diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index feda3ca..a851c25 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -26,10 +26,9 @@ #define ROMCARD_SIZE 0x08000000 #define ROMCARD_START 0x10000000 -void arch_reset(char mode, const char *cmd) +static void shark_restart(char mode, const char *cmd) { short temp; - local_irq_disable(); /* Reset the Machine via pc[3] of the sequoia chipset */ outw(0x09,0x24); temp=inw(0x26); @@ -157,4 +156,5 @@ MACHINE_START(SHARK, "Shark") .init_irq = shark_init_irq, .timer = &shark_timer, .dma_zone_size = SZ_4M, + .restart = shark_restart, MACHINE_END diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h index 21c373b..1b2f2c5 100644 --- a/arch/arm/mach-shark/include/mach/system.h +++ b/arch/arm/mach-shark/include/mach/system.h @@ -6,9 +6,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -/* Found in arch/mach-shark/core.c */ -extern void arch_reset(char mode, const char *cmd); - static inline void arch_idle(void) { } diff --git a/arch/arm/mach-shark/include/mach/vmalloc.h b/arch/arm/mach-shark/include/mach/vmalloc.h deleted file mode 100644 index b10df98..0000000 --- a/arch/arm/mach-shark/include/mach/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -/* - * arch/arm/mach-shark/include/mach/vmalloc.h - */ -#define VMALLOC_END 0xd0000000UL diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 737bdc6..5ca1f9d 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -28,7 +28,6 @@ pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o obj-$(CONFIG_ARCH_SH7367) += entry-intc.o obj-$(CONFIG_ARCH_SH7377) += entry-intc.o obj-$(CONFIG_ARCH_SH7372) += entry-intc.o -obj-$(CONFIG_ARCH_SH73A0) += entry-gic.o # PM objects obj-$(CONFIG_SUSPEND) += suspend.o diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index b862e9f..a4e6ca0 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c @@ -466,8 +466,6 @@ static struct map_desc ag5evm_io_desc[] __initdata = { static void __init ag5evm_map_io(void) { iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc)); - /* DMA memory at 0xf6000000 - 0xffdfffff */ - init_consistent_dma_size(158 << 20); /* setup early devices and console here as well */ sh73a0_add_early_devices(); @@ -607,8 +605,9 @@ struct sys_timer ag5evm_timer = { MACHINE_START(AG5EVM, "ag5evm") .map_io = ag5evm_map_io, + .nr_irqs = NR_IRQS_LEGACY, .init_irq = sh73a0_init_irq, - .handle_irq = shmobile_handle_irq_gic, + .handle_irq = gic_handle_irq, .init_machine = ag5evm_init, .timer = &ag5evm_timer, MACHINE_END diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 4c865ec..6a6f9f7 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -1172,8 +1172,6 @@ static struct map_desc ap4evb_io_desc[] __initdata = { static void __init ap4evb_map_io(void) { iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); - /* DMA memory at 0xf6000000 - 0xffdfffff */ - init_consistent_dma_size(158 << 20); /* setup early devices and console here as well */ sh7372_add_early_devices(); diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c index 8b620bf..72d5572 100644 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ b/arch/arm/mach-shmobile/board-g3evm.c @@ -261,8 +261,6 @@ static struct map_desc g3evm_io_desc[] __initdata = { static void __init g3evm_map_io(void) { iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc)); - /* DMA memory at 0xf6000000 - 0xffdfffff */ - init_consistent_dma_size(158 << 20); /* setup early devices and console here as well */ sh7367_add_early_devices(); diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c index 7719ddc..2220b88 100644 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ b/arch/arm/mach-shmobile/board-g4evm.c @@ -275,8 +275,6 @@ static struct map_desc g4evm_io_desc[] __initdata = { static void __init g4evm_map_io(void) { iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc)); - /* DMA memory at 0xf6000000 - 0xffdfffff */ - init_consistent_dma_size(158 << 20); /* setup early devices and console here as well */ sh7377_add_early_devices(); diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c index bd9a784..857ceee 100644 --- a/arch/arm/mach-shmobile/board-kota2.c +++ b/arch/arm/mach-shmobile/board-kota2.c @@ -33,6 +33,7 @@ #include <linux/input/sh_keysc.h> #include <linux/gpio_keys.h> #include <linux/leds.h> +#include <linux/platform_data/leds-renesas-tpu.h> #include <linux/mmc/host.h> #include <linux/mmc/sh_mmcif.h> #include <linux/mfd/tmio.h> @@ -56,7 +57,7 @@ static struct resource smsc9220_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gic_spi(33), /* PINTA2 @ PORT144 */ + .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */ .flags = IORESOURCE_IRQ, }, }; @@ -157,10 +158,6 @@ static struct platform_device gpio_keys_device = { #define GPIO_LED(n, g) { .name = n, .gpio = g } static struct gpio_led gpio_leds[] = { - GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */ - GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */ - GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */ - GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */ GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ @@ -179,6 +176,119 @@ static struct platform_device gpio_leds_device = { }, }; +/* TPU LED */ +static struct led_renesas_tpu_config led_renesas_tpu12_pdata = { + .name = "V2513", + .pin_gpio_fn = GPIO_FN_TPU1TO2, + .pin_gpio = GPIO_PORT153, + .channel_offset = 0x90, + .timer_bit = 2, + .max_brightness = 1000, +}; + +static struct resource tpu12_resources[] = { + [0] = { + .name = "TPU12", + .start = 0xe6610090, + .end = 0xe66100b5, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu12_device = { + .name = "leds-renesas-tpu", + .id = 12, + .dev = { + .platform_data = &led_renesas_tpu12_pdata, + }, + .num_resources = ARRAY_SIZE(tpu12_resources), + .resource = tpu12_resources, +}; + +static struct led_renesas_tpu_config led_renesas_tpu41_pdata = { + .name = "V2514", + .pin_gpio_fn = GPIO_FN_TPU4TO1, + .pin_gpio = GPIO_PORT199, + .channel_offset = 0x50, + .timer_bit = 1, + .max_brightness = 1000, +}; + +static struct resource tpu41_resources[] = { + [0] = { + .name = "TPU41", + .start = 0xe6640050, + .end = 0xe6640075, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu41_device = { + .name = "leds-renesas-tpu", + .id = 41, + .dev = { + .platform_data = &led_renesas_tpu41_pdata, + }, + .num_resources = ARRAY_SIZE(tpu41_resources), + .resource = tpu41_resources, +}; + +static struct led_renesas_tpu_config led_renesas_tpu21_pdata = { + .name = "V2515", + .pin_gpio_fn = GPIO_FN_TPU2TO1, + .pin_gpio = GPIO_PORT197, + .channel_offset = 0x50, + .timer_bit = 1, + .max_brightness = 1000, +}; + +static struct resource tpu21_resources[] = { + [0] = { + .name = "TPU21", + .start = 0xe6620050, + .end = 0xe6620075, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu21_device = { + .name = "leds-renesas-tpu", + .id = 21, + .dev = { + .platform_data = &led_renesas_tpu21_pdata, + }, + .num_resources = ARRAY_SIZE(tpu21_resources), + .resource = tpu21_resources, +}; + +static struct led_renesas_tpu_config led_renesas_tpu30_pdata = { + .name = "KEYLED", + .pin_gpio_fn = GPIO_FN_TPU3TO0, + .pin_gpio = GPIO_PORT163, + .channel_offset = 0x10, + .timer_bit = 0, + .max_brightness = 1000, +}; + +static struct resource tpu30_resources[] = { + [0] = { + .name = "TPU30", + .start = 0xe6630010, + .end = 0xe6630035, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device leds_tpu30_device = { + .name = "leds-renesas-tpu", + .id = 30, + .dev = { + .platform_data = &led_renesas_tpu30_pdata, + }, + .num_resources = ARRAY_SIZE(tpu30_resources), + .resource = tpu30_resources, +}; + /* MMCIF */ static struct resource mmcif_resources[] = { [0] = { @@ -291,6 +401,10 @@ static struct platform_device *kota2_devices[] __initdata = { &keysc_device, &gpio_keys_device, &gpio_leds_device, + &leds_tpu12_device, + &leds_tpu41_device, + &leds_tpu21_device, + &leds_tpu30_device, &mmcif_device, &sdhi0_device, &sdhi1_device, @@ -317,18 +431,6 @@ static void __init kota2_map_io(void) shmobile_setup_console(); } -#define PINTER0A 0xe69000a0 -#define PINTCR0A 0xe69000b0 - -void __init kota2_init_irq(void) -{ - sh73a0_init_irq(); - - /* setup PINT: enable PINTA2 as active low */ - __raw_writel(1 << 29, PINTER0A); - __raw_writew(2 << 10, PINTCR0A); -} - static void __init kota2_init(void) { sh73a0_pinmux_init(); @@ -447,8 +549,9 @@ struct sys_timer kota2_timer = { MACHINE_START(KOTA2, "kota2") .map_io = kota2_map_io, - .init_irq = kota2_init_irq, - .handle_irq = shmobile_handle_irq_gic, + .nr_irqs = NR_IRQS_LEGACY, + .init_irq = sh73a0_init_irq, + .handle_irq = gic_handle_irq, .init_machine = kota2_init, .timer = &kota2_timer, MACHINE_END diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 9c5e598..ed52566 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -1390,8 +1390,6 @@ static struct map_desc mackerel_io_desc[] __initdata = { static void __init mackerel_map_io(void) { iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc)); - /* DMA memory at 0xf6000000 - 0xffdfffff */ - init_consistent_dma_size(158 << 20); /* setup early devices and console here as well */ sh7372_add_early_devices(); diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 61a846b..1370a89 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -113,6 +113,12 @@ static struct clk main_clk = { .ops = &main_clk_ops, }; +/* Divide Main clock by two */ +static struct clk main_div2_clk = { + .ops = &div2_clk_ops, + .parent = &main_clk, +}; + /* PLL0, PLL1, PLL2, PLL3 */ static unsigned long pll_recalc(struct clk *clk) { @@ -181,6 +187,7 @@ static struct clk *main_clks[] = { &extal1_div2_clk, &extal2_div2_clk, &main_clk, + &main_div2_clk, &pll0_clk, &pll1_clk, &pll2_clk, @@ -243,7 +250,7 @@ static struct clk div6_clks[DIV6_NR] = { [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0), [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0), [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0), - [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0), + [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT), [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0), [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0), [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0), @@ -268,6 +275,7 @@ enum { MSTP001, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, MSTP314, MSTP313, MSTP312, MSTP311, + MSTP303, MSTP302, MSTP301, MSTP300, MSTP411, MSTP410, MSTP403, MSTP_NR }; @@ -301,6 +309,10 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ + [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */ + [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */ + [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */ + [MSTP300] = MSTP(&main_div2_clk, SMSTPCR3, 0, 0), /* TPU4 */ [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ @@ -350,6 +362,10 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ + CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ + CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ + CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ + CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */ CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ diff --git a/arch/arm/mach-shmobile/entry-gic.S b/arch/arm/mach-shmobile/entry-gic.S deleted file mode 100644 index e20239b..0000000 --- a/arch/arm/mach-shmobile/entry-gic.S +++ /dev/null @@ -1,18 +0,0 @@ -/* - * ARM Interrupt demux handler using GIC - * - * Copyright (C) 2010 Magnus Damm - * Copyright (C) 2011 Paul Mundt - * Copyright (C) 2010 - 2011 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <asm/assembler.h> -#include <asm/entry-macro-multi.S> -#include <asm/hardware/gic.h> -#include <asm/hardware/entry-macro-gic.S> - - arch_irq_handler shmobile_handle_irq_gic diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 834bd6c..4bf82c1 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -7,7 +7,6 @@ extern void shmobile_secondary_vector(void); struct clk; extern int clk_init(void); extern void shmobile_handle_irq_intc(struct pt_regs *); -extern void shmobile_handle_irq_gic(struct pt_regs *); extern struct platform_suspend_ops shmobile_suspend_ops; struct cpuidle_driver; extern void (*shmobile_cpuidle_modes[])(void); diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S index 8d4a416..2a57b29 100644 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S @@ -18,14 +18,5 @@ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - .endm - - .macro test_for_ipi, irqnr, irqstat, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h index 7bf0890..de795b4 100644 --- a/arch/arm/mach-shmobile/include/mach/gpio.h +++ b/arch/arm/mach-shmobile/include/mach/gpio.h @@ -12,8 +12,6 @@ #include <linux/kernel.h> #include <linux/errno.h> - -#define ARCH_NR_GPIOS 1024 #include <linux/sh_pfc.h> #ifdef CONFIG_GPIOLIB diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h index 76a687e..956ac18 100644 --- a/arch/arm/mach-shmobile/include/mach/system.h +++ b/arch/arm/mach-shmobile/include/mach/system.h @@ -8,7 +8,7 @@ static inline void arch_idle(void) static inline void arch_reset(char mode, const char *cmd) { - cpu_reset(0); + soft_restart(0); } #endif diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h deleted file mode 100644 index 2b8fd8b..0000000 --- a/arch/arm/mach-shmobile/include/mach/vmalloc.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_MACH_VMALLOC_H -#define __ASM_MACH_VMALLOC_H - -/* Vmalloc at ... - 0xe5ffffff */ -#define VMALLOC_END 0xe6000000UL - -#endif /* __ASM_MACH_VMALLOC_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S index 53da422..de3bb41 100644 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S @@ -11,35 +11,8 @@ * warranty of any kind, whether express or implied. */ -#include <asm/hardware/vic.h> -#include <mach/hardware.h> - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status - teq \irqstat, #0 - beq 1001f @ this will set/reset - @ zero register - /* - * Following code will find bit position of least significang - * bit set in irqstat, using following equation - * least significant bit set in n = (n & ~(n-1)) - */ - sub \tmp, \irqstat, #1 @ tmp = irqstat - 1 - mvn \tmp, \tmp @ tmp = ~tmp - and \irqstat, \irqstat, \tmp @ irqstat &= tmp - /* Now, irqstat is = bit no. of 1st bit set in vic irq status */ - clz \tmp, \irqstat @ tmp = leading zeros - rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1 - -1001: /* EQ will be set if no irqs pending */ - .endm diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index b8f31c3..14276e5 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h @@ -42,6 +42,8 @@ void __init spear3xx_map_io(void); void __init spear3xx_init_irq(void); void __init spear3xx_init(void); +void spear_restart(char, const char *); + /* pad mux declarations */ #define PMX_FIRDA_MASK (1 << 14) #define PMX_I2C_MASK (1 << 13) diff --git a/arch/arm/mach-spear3xx/include/mach/vmalloc.h b/arch/arm/mach-spear3xx/include/mach/vmalloc.h deleted file mode 100644 index df977b3..0000000 --- a/arch/arm/mach-spear3xx/include/mach/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/vmalloc.h - * - * Defining Vmalloc area for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_VMALLOC_H -#define __MACH_VMALLOC_H - -#include <plat/vmalloc.h> - -#endif /* __MACH_VMALLOC_H */ diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c index a5ff98e..3462ab9 100644 --- a/arch/arm/mach-spear3xx/spear300_evb.c +++ b/arch/arm/mach-spear3xx/spear300_evb.c @@ -11,6 +11,7 @@ * warranty of any kind, whether express or implied. */ +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include <mach/generic.h> @@ -67,6 +68,8 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB") .atag_offset = 0x100, .map_io = spear3xx_map_io, .init_irq = spear3xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &spear3xx_timer, .init_machine = spear300_evb_init, + .restart = spear_restart, MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c index 45d180d..f92c499 100644 --- a/arch/arm/mach-spear3xx/spear310_evb.c +++ b/arch/arm/mach-spear3xx/spear310_evb.c @@ -11,6 +11,7 @@ * warranty of any kind, whether express or implied. */ +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include <mach/generic.h> @@ -73,6 +74,8 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB") .atag_offset = 0x100, .map_io = spear3xx_map_io, .init_irq = spear3xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &spear3xx_timer, .init_machine = spear310_evb_init, + .restart = spear_restart, MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c index 2287984..105334a 100644 --- a/arch/arm/mach-spear3xx/spear320_evb.c +++ b/arch/arm/mach-spear3xx/spear320_evb.c @@ -11,6 +11,7 @@ * warranty of any kind, whether express or implied. */ +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include <mach/generic.h> @@ -71,6 +72,8 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB") .atag_offset = 0x100, .map_io = spear3xx_map_io, .init_irq = spear3xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &spear3xx_timer, .init_machine = spear320_evb_init, + .restart = spear_restart, MACHINE_END diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S index 8a0b0ed..d490a91 100644 --- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S +++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S @@ -11,44 +11,8 @@ * warranty of any kind, whether express or implied. */ -#include <asm/hardware/vic.h> -#include <mach/hardware.h> - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status - mov \irqnr, #0 - teq \irqstat, #0 - bne 1001f - ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status - teq \irqstat, #0 - beq 1002f @ this will set/reset - @ zero register - mov \irqnr, #32 -1001: - /* - * Following code will find bit position of least significang - * bit set in irqstat, using following equation - * least significant bit set in n = (n & ~(n-1)) - */ - sub \tmp, \irqstat, #1 @ tmp = irqstat - 1 - mvn \tmp, \tmp @ tmp = ~tmp - and \irqstat, \irqstat, \tmp @ irqstat &= tmp - /* Now, irqstat is = bit no. of 1st bit set in vic irq status */ - clz \tmp, \irqstat @ tmp = leading zeros - - rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1 - add \irqnr, \irqnr, \tmp - -1002: /* EQ will be set if no irqs pending */ - .endm diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h index 183f023..116b993 100644 --- a/arch/arm/mach-spear6xx/include/mach/generic.h +++ b/arch/arm/mach-spear6xx/include/mach/generic.h @@ -41,6 +41,8 @@ void __init spear6xx_init(void); void __init spear600_init(void); void __init spear6xx_clk_init(void); +void spear_restart(char, const char *); + /* Add spear600 machine device structure declarations here */ #endif /* __MACH_GENERIC_H */ diff --git a/arch/arm/mach-spear6xx/include/mach/vmalloc.h b/arch/arm/mach-spear6xx/include/mach/vmalloc.h deleted file mode 100644 index 4a0b56c..0000000 --- a/arch/arm/mach-spear6xx/include/mach/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear6xx/include/mach/vmalloc.h - * - * Defining Vmalloc area for SPEAr6xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Rajeev Kumar<rajeev-dlh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_VMALLOC_H -#define __MACH_VMALLOC_H - -#include <plat/vmalloc.h> - -#endif /* __MACH_VMALLOC_H */ diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c index 8238fe3..c6e4254 100644 --- a/arch/arm/mach-spear6xx/spear600_evb.c +++ b/arch/arm/mach-spear6xx/spear600_evb.c @@ -11,6 +11,7 @@ * warranty of any kind, whether express or implied. */ +#include <asm/hardware/vic.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include <mach/generic.h> @@ -46,6 +47,8 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB") .atag_offset = 0x100, .map_io = spear6xx_map_io, .init_irq = spear6xx_init_irq, + .handle_irq = vic_handle_irq, .timer = &spear6xx_timer, .init_machine = spear600_evb_init, + .restart = spear_restart, MACHINE_END diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig deleted file mode 100644 index ad86415..0000000 --- a/arch/arm/mach-tcc8k/Kconfig +++ /dev/null @@ -1,11 +0,0 @@ -if ARCH_TCC8K - -comment "TCC8000 systems:" - -config MACH_TCC8000_SDK - bool "Telechips TCC8000-SDK development kit" - default y - help - Support for the Telechips TCC8000-SDK board. - -endif diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile deleted file mode 100644 index 9bacf31..0000000 --- a/arch/arm/mach-tcc8k/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# Makefile for TCC8K boards and common files. -# - -# Common support -obj-y += clock.o irq.o time.o io.o devices.o - -# Board specific support -obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot deleted file mode 100644 index 5e02d41..0000000 --- a/arch/arm/mach-tcc8k/Makefile.boot +++ /dev/null @@ -1,3 +0,0 @@ - zreladdr-y += 0x20008000 -params_phys-y := 0x20000100 -initrd_phys-y := 0x20800000 diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c deleted file mode 100644 index 777a5bb..0000000 --- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/delay.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> - -#include <asm/mach-types.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> - -#include <mach/clock.h> -#include <mach/tcc-nand.h> -#include <mach/tcc8k-regs.h> - -#include "common.h" - -#define XI_FREQUENCY 12000000 -#define XTI_FREQUENCY 32768 - -#ifdef CONFIG_MTD_NAND_TCC -/* NAND */ -static struct tcc_nand_platform_data tcc8k_sdk_nand_data = { - .width = 1, - .hw_ecc = 0, -}; -#endif - -static void __init tcc8k_init(void) -{ -#ifdef CONFIG_MTD_NAND_TCC - tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data; - platform_device_register(&tcc_nand_device); -#endif -} - -static void __init tcc8k_init_timer(void) -{ - tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY); -} - -static struct sys_timer tcc8k_timer = { - .init = tcc8k_init_timer, -}; - -static void __init tcc8k_map_io(void) -{ - tcc8k_map_common_io(); - - /* set PLL0 clock to 96MHz, adapt UART0 divisor */ - __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS); - __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS); - - /* set PLL1 clock to 192MHz */ - __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS); - - /* set PLL2 clock to 48MHz */ - __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS); - - /* with CPU freq higher than 150 MHz, need extra DTCM wait */ - __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS); - - /* PLL locking time as specified */ - udelay(300); -} - -MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board") - .atag_offset = 0x100, - .map_io = tcc8k_map_io, - .init_irq = tcc8k_init_irq, - .init_machine = tcc8k_init, - .timer = &tcc8k_timer, -MACHINE_END diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c deleted file mode 100644 index e7cdae5..0000000 --- a/arch/arm/mach-tcc8k/clock.c +++ /dev/null @@ -1,580 +0,0 @@ -/* - * Lowlevel clock handling for Telechips TCC8xxx SoCs - * - * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GPL v2 - */ - -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/module.h> -#include <linux/spinlock.h> -#include <linux/clkdev.h> - -#include <mach/clock.h> -#include <mach/irqs.h> -#include <mach/tcc8k-regs.h> - -#include "common.h" - -#define BCLKCTR0 (CKC_BASE + BCLKCTR0_OFFS) -#define BCLKCTR1 (CKC_BASE + BCLKCTR1_OFFS) - -#define ACLKREF (CKC_BASE + ACLKREF_OFFS) -#define ACLKUART0 (CKC_BASE + ACLKUART0_OFFS) -#define ACLKUART1 (CKC_BASE + ACLKUART1_OFFS) -#define ACLKUART2 (CKC_BASE + ACLKUART2_OFFS) -#define ACLKUART3 (CKC_BASE + ACLKUART3_OFFS) -#define ACLKUART4 (CKC_BASE + ACLKUART4_OFFS) -#define ACLKI2C (CKC_BASE + ACLKI2C_OFFS) -#define ACLKADC (CKC_BASE + ACLKADC_OFFS) -#define ACLKUSBH (CKC_BASE + ACLKUSBH_OFFS) -#define ACLKLCD (CKC_BASE + ACLKLCD_OFFS) -#define ACLKSDH0 (CKC_BASE + ACLKSDH0_OFFS) -#define ACLKSDH1 (CKC_BASE + ACLKSDH1_OFFS) -#define ACLKSPI0 (CKC_BASE + ACLKSPI0_OFFS) -#define ACLKSPI1 (CKC_BASE + ACLKSPI1_OFFS) -#define ACLKSPDIF (CKC_BASE + ACLKSPDIF_OFFS) -#define ACLKC3DEC (CKC_BASE + ACLKC3DEC_OFFS) -#define ACLKCAN0 (CKC_BASE + ACLKCAN0_OFFS) -#define ACLKCAN1 (CKC_BASE + ACLKCAN1_OFFS) -#define ACLKGSB0 (CKC_BASE + ACLKGSB0_OFFS) -#define ACLKGSB1 (CKC_BASE + ACLKGSB1_OFFS) -#define ACLKGSB2 (CKC_BASE + ACLKGSB2_OFFS) -#define ACLKGSB3 (CKC_BASE + ACLKGSB3_OFFS) -#define ACLKTCT (CKC_BASE + ACLKTCT_OFFS) -#define ACLKTCX (CKC_BASE + ACLKTCX_OFFS) -#define ACLKTCZ (CKC_BASE + ACLKTCZ_OFFS) - -#define ACLK_MAX_DIV (0xfff + 1) - -/* Crystal frequencies */ -static unsigned long xi_rate, xti_rate; - -static void __iomem *pll_cfg_addr(int pll) -{ - switch (pll) { - case 0: return (CKC_BASE + PLL0CFG_OFFS); - case 1: return (CKC_BASE + PLL1CFG_OFFS); - case 2: return (CKC_BASE + PLL2CFG_OFFS); - default: - BUG(); - } -} - -static int pll_enable(int pll, int enable) -{ - u32 reg; - void __iomem *addr = pll_cfg_addr(pll); - - reg = __raw_readl(addr); - if (enable) - reg &= ~PLLxCFG_PD; - else - reg |= PLLxCFG_PD; - - __raw_writel(reg, addr); - return 0; -} - -static int xi_enable(int enable) -{ - u32 reg; - - reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS); - if (enable) - reg |= CLKCTRL_XE; - else - reg &= ~CLKCTRL_XE; - - __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS); - return 0; -} - -static int root_clk_enable(enum root_clks src) -{ - switch (src) { - case CLK_SRC_PLL0: return pll_enable(0, 1); - case CLK_SRC_PLL1: return pll_enable(1, 1); - case CLK_SRC_PLL2: return pll_enable(2, 1); - case CLK_SRC_XI: return xi_enable(1); - default: - BUG(); - } - return 0; -} - -static int root_clk_disable(enum root_clks src) -{ - switch (src) { - case CLK_SRC_PLL0: return pll_enable(0, 0); - case CLK_SRC_PLL1: return pll_enable(1, 0); - case CLK_SRC_PLL2: return pll_enable(2, 0); - case CLK_SRC_XI: return xi_enable(0); - default: - BUG(); - } - return 0; -} - -static int enable_clk(struct clk *clk) -{ - u32 reg; - - if (clk->root_id != CLK_SRC_NOROOT) - return root_clk_enable(clk->root_id); - - if (clk->aclkreg) { - reg = __raw_readl(clk->aclkreg); - reg |= ACLK_EN; - __raw_writel(reg, clk->aclkreg); - } - if (clk->bclkctr) { - reg = __raw_readl(clk->bclkctr); - reg |= 1 << clk->bclk_shift; - __raw_writel(reg, clk->bclkctr); - } - return 0; -} - -static void disable_clk(struct clk *clk) -{ - u32 reg; - - if (clk->root_id != CLK_SRC_NOROOT) { - root_clk_disable(clk->root_id); - return; - } - - if (clk->bclkctr) { - reg = __raw_readl(clk->bclkctr); - reg &= ~(1 << clk->bclk_shift); - __raw_writel(reg, clk->bclkctr); - } - if (clk->aclkreg) { - reg = __raw_readl(clk->aclkreg); - reg &= ~ACLK_EN; - __raw_writel(reg, clk->aclkreg); - } -} - -static unsigned long get_rate_pll(int pll) -{ - u32 reg; - unsigned long s, m, p; - void __iomem *addr = pll_cfg_addr(pll); - - reg = __raw_readl(addr); - s = (reg >> 16) & 0x07; - m = (reg >> 8) & 0xff; - p = reg & 0x3f; - - return (m * xi_rate) / (p * (1 << s)); -} - -static unsigned long get_rate_pll_div(int pll) -{ - u32 reg; - unsigned long div = 0; - void __iomem *addr; - - switch (pll) { - case 0: - addr = CKC_BASE + CLKDIVC0_OFFS; - reg = __raw_readl(addr); - if (reg & CLKDIVC0_P0E) - div = (reg >> 24) & 0x3f; - break; - case 1: - addr = CKC_BASE + CLKDIVC0_OFFS; - reg = __raw_readl(addr); - if (reg & CLKDIVC0_P1E) - div = (reg >> 16) & 0x3f; - break; - case 2: - addr = CKC_BASE + CLKDIVC1_OFFS; - reg = __raw_readl(addr); - if (reg & CLKDIVC1_P2E) - div = reg & 0x3f; - break; - } - return get_rate_pll(pll) / (div + 1); -} - -static unsigned long get_rate_xi_div(void) -{ - unsigned long div = 0; - u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS); - - if (reg & CLKDIVC0_XE) - div = (reg >> 8) & 0x3f; - - return xi_rate / (div + 1); -} - -static unsigned long get_rate_xti_div(void) -{ - unsigned long div = 0; - u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS); - - if (reg & CLKDIVC0_XTE) - div = reg & 0x3f; - - return xti_rate / (div + 1); -} - -static unsigned long root_clk_get_rate(enum root_clks src) -{ - switch (src) { - case CLK_SRC_PLL0: return get_rate_pll(0); - case CLK_SRC_PLL1: return get_rate_pll(1); - case CLK_SRC_PLL2: return get_rate_pll(2); - case CLK_SRC_PLL0DIV: return get_rate_pll_div(0); - case CLK_SRC_PLL1DIV: return get_rate_pll_div(1); - case CLK_SRC_PLL2DIV: return get_rate_pll_div(2); - case CLK_SRC_XI: return xi_rate; - case CLK_SRC_XTI: return xti_rate; - case CLK_SRC_XIDIV: return get_rate_xi_div(); - case CLK_SRC_XTIDIV: return get_rate_xti_div(); - default: return 0; - } -} - -static unsigned long aclk_get_rate(struct clk *clk) -{ - u32 reg; - unsigned long div; - unsigned int src; - - reg = __raw_readl(clk->aclkreg); - div = reg & 0x0fff; - src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK; - return root_clk_get_rate(src) / (div + 1); -} - -static unsigned long aclk_best_div(struct clk *clk, unsigned long rate) -{ - unsigned long div, src, freq, r1, r2; - - if (!rate) - return ACLK_MAX_DIV; - - src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT; - src &= CLK_SRC_MASK; - freq = root_clk_get_rate(src); - div = freq / rate; - if (!div) - return 1; - if (div >= ACLK_MAX_DIV) - return ACLK_MAX_DIV; - r1 = freq / div; - r2 = freq / (div + 1); - if ((rate - r2) < (r1 - rate)) - return div + 1; - - return div; -} - -static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate) -{ - unsigned int src; - - src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT; - src &= CLK_SRC_MASK; - - return root_clk_get_rate(src) / aclk_best_div(clk, rate); -} - -static int aclk_set_rate(struct clk *clk, unsigned long rate) -{ - u32 reg; - - reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK; - reg |= aclk_best_div(clk, rate) - 1; - __raw_writel(reg, clk->aclkreg); - return 0; -} - -static unsigned long get_rate_sys(struct clk *clk) -{ - unsigned int src; - - src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK; - return root_clk_get_rate(src); -} - -static unsigned long get_rate_bus(struct clk *clk) -{ - unsigned int reg, sdiv, bdiv, rate; - - reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS); - rate = get_rate_sys(clk); - sdiv = (reg >> 20) & 3; - if (sdiv) - rate /= sdiv + 1; - bdiv = (reg >> 4) & 0xff; - if (bdiv) - rate /= bdiv + 1; - return rate; -} - -static unsigned long get_rate_cpu(struct clk *clk) -{ - unsigned int reg, div, fsys, fbus; - - fbus = get_rate_bus(clk); - reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS); - if (reg & (1 << 29)) - return fbus; - fsys = get_rate_sys(clk); - div = (reg >> 16) & 0x0f; - return fbus + ((fsys - fbus) * (div + 1)) / 16; -} - -static unsigned long get_rate_root(struct clk *clk) -{ - return root_clk_get_rate(clk->root_id); -} - -static int aclk_set_parent(struct clk *clock, struct clk *parent) -{ - u32 reg; - - if (clock->parent == parent) - return 0; - - clock->parent = parent; - - if (!parent) - return 0; - - if (parent->root_id == CLK_SRC_NOROOT) - return 0; - reg = __raw_readl(clock->aclkreg); - reg &= ~ACLK_SEL_MASK; - reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK; - __raw_writel(reg, clock->aclkreg); - - return 0; -} - -#define DEFINE_ROOT_CLOCK(name, ri, p) \ - static struct clk name = { \ - .root_id = ri, \ - .get_rate = get_rate_root, \ - .enable = enable_clk, \ - .disable = disable_clk, \ - .parent = p, \ - }; - -#define DEFINE_SPECIAL_CLOCK(name, gr, p) \ - static struct clk name = { \ - .root_id = CLK_SRC_NOROOT, \ - .get_rate = gr, \ - .parent = p, \ - }; - -#define DEFINE_ACLOCK(name, bc, bs, ar) \ - static struct clk name = { \ - .root_id = CLK_SRC_NOROOT, \ - .bclkctr = bc, \ - .bclk_shift = bs, \ - .aclkreg = ar, \ - .get_rate = aclk_get_rate, \ - .set_rate = aclk_set_rate, \ - .round_rate = aclk_round_rate, \ - .enable = enable_clk, \ - .disable = disable_clk, \ - .set_parent = aclk_set_parent, \ - }; - -#define DEFINE_BCLOCK(name, bc, bs, gr, p) \ - static struct clk name = { \ - .root_id = CLK_SRC_NOROOT, \ - .bclkctr = bc, \ - .bclk_shift = bs, \ - .get_rate = gr, \ - .enable = enable_clk, \ - .disable = disable_clk, \ - .parent = p, \ - }; - -DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL) -DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL) -DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi) -DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti) -DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi) -DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi) -DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi) -DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0) -DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1) -DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2) - -/* The following 3 clocks are special and are initialized explicitly later */ -DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL) -DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys) -DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys) - -DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT) -DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX) -DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ) -DEFINE_ACLOCK(ref, NULL, 0, ACLKREF) -DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0) -DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1) -DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2) -DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3) -DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4) -DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C) -DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC) -DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH) -DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD) -DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0) -DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1) -DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0) -DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1) -DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF) -DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC) -DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0) -DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1) -DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0) -DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1) -DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2) -DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3) -DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH) - -DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL) -DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL) -DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL) -DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL) -DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL) -DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL) -DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL) -DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL) -DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL) -DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL) -DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL) -DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL) -DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL) -DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL) -DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL) -DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL) -DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL) -DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL) -DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL) -DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL) -DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL) -DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL) - -#define _REGISTER_CLOCK(d, n, c) \ - { \ - .dev_id = d, \ - .con_id = n, \ - .clk = &c, \ - }, - -static struct clk_lookup lookups[] = { - _REGISTER_CLOCK(NULL, "bus", bus) - _REGISTER_CLOCK(NULL, "cpu", cpu) - _REGISTER_CLOCK(NULL, "tct", tct) - _REGISTER_CLOCK(NULL, "tcx", tcx) - _REGISTER_CLOCK(NULL, "tcz", tcz) - _REGISTER_CLOCK(NULL, "ref", ref) - _REGISTER_CLOCK(NULL, "dai0", dai0) - _REGISTER_CLOCK(NULL, "pic", pic) - _REGISTER_CLOCK(NULL, "tc", tc) - _REGISTER_CLOCK(NULL, "gpio", gpio) - _REGISTER_CLOCK(NULL, "usbd", usbd) - _REGISTER_CLOCK("tcc-uart.0", NULL, uart0) - _REGISTER_CLOCK("tcc-uart.2", NULL, uart2) - _REGISTER_CLOCK("tcc-i2c", NULL, i2c) - _REGISTER_CLOCK("tcc-uart.3", NULL, uart3) - _REGISTER_CLOCK(NULL, "ecc", ecc) - _REGISTER_CLOCK(NULL, "adc", adc) - _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0) - _REGISTER_CLOCK(NULL, "gdma0", gdma0) - _REGISTER_CLOCK(NULL, "lcd", lcd) - _REGISTER_CLOCK(NULL, "rtc", rtc) - _REGISTER_CLOCK(NULL, "nfc", nfc) - _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0) - _REGISTER_CLOCK(NULL, "g2d", g2d) - _REGISTER_CLOCK(NULL, "gdma1", gdma1) - _REGISTER_CLOCK("tcc-uart.1", NULL, uart1) - _REGISTER_CLOCK("tcc-spi.0", NULL, spi0) - _REGISTER_CLOCK(NULL, "mscl", mscl) - _REGISTER_CLOCK("tcc-spi.1", NULL, spi1) - _REGISTER_CLOCK(NULL, "bdma", bdma) - _REGISTER_CLOCK(NULL, "adma0", adma0) - _REGISTER_CLOCK(NULL, "spdif", spdif) - _REGISTER_CLOCK(NULL, "scfg", scfg) - _REGISTER_CLOCK(NULL, "cid", cid) - _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1) - _REGISTER_CLOCK("tcc-uart.4", NULL, uart4) - _REGISTER_CLOCK(NULL, "dai1", dai1) - _REGISTER_CLOCK(NULL, "adma1", adma1) - _REGISTER_CLOCK(NULL, "c3dec", c3dec) - _REGISTER_CLOCK("tcc-can.0", NULL, can0) - _REGISTER_CLOCK("tcc-can.1", NULL, can1) - _REGISTER_CLOCK(NULL, "gps", gps) - _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0) - _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1) - _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2) - _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3) - _REGISTER_CLOCK(NULL, "gdma2", gdma2) - _REGISTER_CLOCK(NULL, "gdma3", gdma3) - _REGISTER_CLOCK(NULL, "ddrc", ddrc) - _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1) -}; - -static struct clk *root_clk_by_index(enum root_clks src) -{ - switch (src) { - case CLK_SRC_PLL0: return &pll0; - case CLK_SRC_PLL1: return &pll1; - case CLK_SRC_PLL2: return &pll2; - case CLK_SRC_PLL0DIV: return &pll0div; - case CLK_SRC_PLL1DIV: return &pll1div; - case CLK_SRC_PLL2DIV: return &pll2div; - case CLK_SRC_XI: return ξ - case CLK_SRC_XTI: return &xti; - case CLK_SRC_XIDIV: return &xidiv; - case CLK_SRC_XTIDIV: return &xtidiv; - default: return NULL; - } -} - -static void find_aclk_parent(struct clk *clk) -{ - unsigned int src; - struct clk *clock; - - if (!clk->aclkreg) - return; - - src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT; - src &= CLK_SRC_MASK; - - clock = root_clk_by_index(src); - if (!clock) - return; - - clk->parent = clock; - clk->set_parent = aclk_set_parent; -} - -void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq) -{ - int i; - - xi_rate = xi_freq; - xti_rate = xti_freq; - - /* fixup parents and add the clock */ - for (i = 0; i < ARRAY_SIZE(lookups); i++) { - find_aclk_parent(lookups[i].clk); - clkdev_add(&lookups[i]); - } - tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32); -} diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h deleted file mode 100644 index 705690a..0000000 --- a/arch/arm/mach-tcc8k/common.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef MACH_TCC8K_COMMON_H -#define MACH_TCC8K_COMMON_H - -#include <linux/platform_device.h> - -extern struct platform_device tcc_nand_device; - -struct clk; - -extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq); -extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq); -extern void tcc8k_init_irq(void); -extern void tcc8k_map_common_io(void); - -#endif diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c deleted file mode 100644 index 6722ad7..0000000 --- a/arch/arm/mach-tcc8k/devices.c +++ /dev/null @@ -1,239 +0,0 @@ -/* - * linux/arch/arm/mach-tcc8k/devices.c - * - * Copyright (C) Telechips, Inc. - * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of GPL v2. - * - */ - -#include <linux/dma-mapping.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/kernel.h> -#include <linux/module.h> - -#include <asm/mach/map.h> - -#include <mach/tcc8k-regs.h> -#include <mach/irqs.h> - -#include "common.h" - -static u64 tcc8k_dmamask = DMA_BIT_MASK(32); - -#ifdef CONFIG_MTD_NAND_TCC -/* NAND controller */ -static struct resource tcc_nand_resources[] = { - { - .start = (resource_size_t)NFC_BASE, - .end = (resource_size_t)NFC_BASE + 0x7f, - .flags = IORESOURCE_MEM, - }, { - .start = INT_NFC, - .end = INT_NFC, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device tcc_nand_device = { - .name = "tcc_nand", - .id = 0, - .num_resources = ARRAY_SIZE(tcc_nand_resources), - .resource = tcc_nand_resources, -}; -#endif - -#ifdef CONFIG_MMC_TCC8K -/* MMC controller */ -static struct resource tcc8k_mmc0_resource[] = { - { - .start = INT_SD0, - .end = INT_SD0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource tcc8k_mmc1_resource[] = { - { - .start = INT_SD1, - .end = INT_SD1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device tcc8k_mmc0_device = { - .name = "tcc-mmc", - .id = 0, - .num_resources = ARRAY_SIZE(tcc8k_mmc0_resource), - .resource = tcc8k_mmc0_resource, - .dev = { - .dma_mask = &tcc8k_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -struct platform_device tcc8k_mmc1_device = { - .name = "tcc-mmc", - .id = 1, - .num_resources = ARRAY_SIZE(tcc8k_mmc1_resource), - .resource = tcc8k_mmc1_resource, - .dev = { - .dma_mask = &tcc8k_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -static inline void tcc8k_init_mmc(void) -{ - u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS); - - reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS; - __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS); - - platform_device_register(&tcc8k_mmc0_device); - platform_device_register(&tcc8k_mmc1_device); -} -#else -static inline void tcc8k_init_mmc(void) { } -#endif - -#ifdef CONFIG_USB_OHCI_HCD -static int tcc8k_ohci_init(struct device *dev) -{ - u32 reg; - - /* Use GPIO PK19 as VBUS control output */ - reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS); - reg &= ~(1 << 19); - __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS); - reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS); - reg &= ~(1 << 19); - __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS); - - reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS); - reg |= (1 << 19); - __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS); - /* Turn on VBUS */ - reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS); - reg |= (1 << 19); - __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS); - - return 0; -} - -static struct resource tcc8k_ohci0_resources[] = { - [0] = { - .start = (resource_size_t)USBH0_BASE, - .end = (resource_size_t)USBH0_BASE + 0x5c, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = INT_USBH0, - .end = INT_USBH0, - .flags = IORESOURCE_IRQ, - } -}; - -static struct resource tcc8k_ohci1_resources[] = { - [0] = { - .start = (resource_size_t)USBH1_BASE, - .end = (resource_size_t)USBH1_BASE + 0x5c, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = INT_USBH1, - .end = INT_USBH1, - .flags = IORESOURCE_IRQ, - } -}; - -static struct tccohci_platform_data tcc8k_ohci0_platform_data = { - .controller = 0, - .port_mode = PMM_PERPORT_MODE, - .init = tcc8k_ohci_init, -}; - -static struct tccohci_platform_data tcc8k_ohci1_platform_data = { - .controller = 1, - .port_mode = PMM_PERPORT_MODE, - .init = tcc8k_ohci_init, -}; - -static struct platform_device ohci0_device = { - .name = "tcc-ohci", - .id = 0, - .dev = { - .dma_mask = &tcc8k_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &tcc8k_ohci0_platform_data, - }, - .num_resources = ARRAY_SIZE(tcc8k_ohci0_resources), - .resource = tcc8k_ohci0_resources, -}; - -static struct platform_device ohci1_device = { - .name = "tcc-ohci", - .id = 1, - .dev = { - .dma_mask = &tcc8k_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &tcc8k_ohci1_platform_data, - }, - .num_resources = ARRAY_SIZE(tcc8k_ohci1_resources), - .resource = tcc8k_ohci1_resources, -}; - -static void __init tcc8k_init_usbhost(void) -{ - platform_device_register(&ohci0_device); - platform_device_register(&ohci1_device); -} -#else -static void __init tcc8k_init_usbhost(void) { } -#endif - -/* USB device controller*/ -#ifdef CONFIG_USB_GADGET_TCC8K -static struct resource udc_resources[] = { - [0] = { - .start = INT_USBD, - .end = INT_USBD, - .flags = IORESOURCE_IRQ, - }, - [1] = { - .start = INT_UDMA, - .end = INT_UDMA, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tcc8k_udc_device = { - .name = "tcc-udc", - .id = 0, - .resource = udc_resources, - .num_resources = ARRAY_SIZE(udc_resources), - .dev = { - .dma_mask = &tcc8k_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -static void __init tcc8k_init_usb_gadget(void) -{ - platform_device_register(&tcc8k_udc_device); -} -#else -static void __init tcc8k_init_usb_gadget(void) { } -#endif /* CONFIG_USB_GADGET_TCC83X */ - -static int __init tcc8k_init_devices(void) -{ - tcc8k_init_mmc(); - tcc8k_init_usbhost(); - tcc8k_init_usb_gadget(); - return 0; -} - -arch_initcall(tcc8k_init_devices); diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c deleted file mode 100644 index 9b39d7f..0000000 --- a/arch/arm/mach-tcc8k/io.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * linux/arch/arm/mach-tcc8k/io.c - * - * (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * derived from TCC83xx io.c - * Copyright (C) Telechips, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/io.h> -#include <linux/kernel.h> - -#include <asm/mach/map.h> - -#include <mach/tcc8k-regs.h> - -/* - * The machine specific code may provide the extra mapping besides the - * default mapping provided here. - */ -static struct map_desc tcc8k_io_desc[] __initdata = { - { - .virtual = (unsigned long)CS1_BASE_VIRT, - .pfn = __phys_to_pfn(CS1_BASE), - .length = CS1_SIZE, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)AHB_PERI_BASE_VIRT, - .pfn = __phys_to_pfn(AHB_PERI_BASE), - .length = AHB_PERI_SIZE, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)APB0_PERI_BASE_VIRT, - .pfn = __phys_to_pfn(APB0_PERI_BASE), - .length = APB0_PERI_SIZE, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)APB1_PERI_BASE_VIRT, - .pfn = __phys_to_pfn(APB1_PERI_BASE), - .length = APB1_PERI_SIZE, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)EXT_MEM_CTRL_BASE_VIRT, - .pfn = __phys_to_pfn(EXT_MEM_CTRL_BASE), - .length = EXT_MEM_CTRL_SIZE, - .type = MT_DEVICE, - }, -}; - -/* - * Maps common IO regions for tcc8k. - * - */ -void __init tcc8k_map_common_io(void) -{ - iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc)); -} diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c deleted file mode 100644 index 209fa5c..0000000 --- a/arch/arm/mach-tcc8k/irq.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright (C) Telechips, Inc. - * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GNU GPL version 2. - */ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/io.h> - -#include <asm/irq.h> -#include <asm/mach/irq.h> - -#include <mach/tcc8k-regs.h> -#include <mach/irqs.h> - -#include "common.h" - -/* Disable IRQ */ -static void tcc8000_mask_ack_irq0(struct irq_data *d) -{ - PIC0_IEN &= ~(1 << d->irq); - PIC0_CREQ |= (1 << d->irq); -} - -static void tcc8000_mask_ack_irq1(struct irq_data *d) -{ - PIC1_IEN &= ~(1 << (d->irq - 32)); - PIC1_CREQ |= (1 << (d->irq - 32)); -} - -static void tcc8000_mask_irq0(struct irq_data *d) -{ - PIC0_IEN &= ~(1 << d->irq); -} - -static void tcc8000_mask_irq1(struct irq_data *d) -{ - PIC1_IEN &= ~(1 << (d->irq - 32)); -} - -static void tcc8000_ack_irq0(struct irq_data *d) -{ - PIC0_CREQ |= (1 << d->irq); -} - -static void tcc8000_ack_irq1(struct irq_data *d) -{ - PIC1_CREQ |= (1 << (d->irq - 32)); -} - -/* Enable IRQ */ -static void tcc8000_unmask_irq0(struct irq_data *d) -{ - PIC0_IEN |= (1 << d->irq); - PIC0_INTOEN |= (1 << d->irq); -} - -static void tcc8000_unmask_irq1(struct irq_data *d) -{ - PIC1_IEN |= (1 << (d->irq - 32)); - PIC1_INTOEN |= (1 << (d->irq - 32)); -} - -static struct irq_chip tcc8000_irq_chip0 = { - .name = "tcc_irq0", - .irq_mask = tcc8000_mask_irq0, - .irq_ack = tcc8000_ack_irq0, - .irq_mask_ack = tcc8000_mask_ack_irq0, - .irq_unmask = tcc8000_unmask_irq0, -}; - -static struct irq_chip tcc8000_irq_chip1 = { - .name = "tcc_irq1", - .irq_mask = tcc8000_mask_irq1, - .irq_ack = tcc8000_ack_irq1, - .irq_mask_ack = tcc8000_mask_ack_irq1, - .irq_unmask = tcc8000_unmask_irq1, -}; - -void __init tcc8k_init_irq(void) -{ - int irqno; - - /* Mask and clear all interrupts */ - PIC0_IEN = 0x00000000; - PIC0_CREQ = 0xffffffff; - PIC1_IEN = 0x00000000; - PIC1_CREQ = 0xffffffff; - - PIC0_MEN0 = 0x00000003; - PIC1_MEN1 = 0x00000003; - PIC1_MEN = 0x00000003; - - /* let all IRQs be level triggered */ - PIC0_TMODE = 0xffffffff; - PIC1_TMODE = 0xffffffff; - /* all IRQs are IRQs (not FIQs) */ - PIC0_IRQSEL = 0xffffffff; - PIC1_IRQSEL = 0xffffffff; - - for (irqno = 0; irqno < NR_IRQS; irqno++) { - if (irqno < 32) - irq_set_chip(irqno, &tcc8000_irq_chip0); - else - irq_set_chip(irqno, &tcc8000_irq_chip1); - irq_set_handler(irqno, handle_level_irq); - set_irq_flags(irqno, IRQF_VALID); - } -} diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c deleted file mode 100644 index a96babe..0000000 --- a/arch/arm/mach-tcc8k/time.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * TCC8000 system timer setup - * - * (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GPL version 2. - * - */ - -#include <linux/clk.h> -#include <linux/clockchips.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/kernel.h> -#include <linux/spinlock.h> - -#include <asm/mach/time.h> - -#include <mach/tcc8k-regs.h> -#include <mach/irqs.h> - -#include "common.h" - -static void __iomem *timer_base; - -static int tcc_set_next_event(unsigned long evt, - struct clock_event_device *unused) -{ - unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS); - - __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS); - return 0; -} - -static void tcc_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) -{ - unsigned long tc32irq; - - switch (mode) { - case CLOCK_EVT_MODE_ONESHOT: - tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS); - tc32irq |= TC32IRQ_IRQEN0; - __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS); - break; - case CLOCK_EVT_MODE_SHUTDOWN: - case CLOCK_EVT_MODE_UNUSED: - tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS); - tc32irq &= ~TC32IRQ_IRQEN0; - __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS); - break; - case CLOCK_EVT_MODE_PERIODIC: - case CLOCK_EVT_MODE_RESUME: - break; - } -} - -static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = dev_id; - - /* Acknowledge TC32 interrupt by reading TC32IRQ */ - __raw_readl(timer_base + TC32IRQ_OFFS); - - evt->event_handler(evt); - - return IRQ_HANDLED; -} - -static struct clock_event_device clockevent_tcc = { - .name = "tcc_timer1", - .features = CLOCK_EVT_FEAT_ONESHOT, - .shift = 32, - .set_mode = tcc_set_mode, - .set_next_event = tcc_set_next_event, - .rating = 200, -}; - -static struct irqaction tcc8k_timer_irq = { - .name = "TC32_timer", - .flags = IRQF_DISABLED | IRQF_TIMER, - .handler = tcc8k_timer_interrupt, - .dev_id = &clockevent_tcc, -}; - -static int __init tcc_clockevent_init(struct clk *clock) -{ - unsigned int c = clk_get_rate(clock); - - clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c, - 200, 32, clocksource_mmio_readl_up); - - clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC, - clockevent_tcc.shift); - clockevent_tcc.max_delta_ns = - clockevent_delta2ns(0xfffffffe, &clockevent_tcc); - clockevent_tcc.min_delta_ns = - clockevent_delta2ns(0xff, &clockevent_tcc); - - clockevent_tcc.cpumask = cpumask_of(0); - - clockevents_register_device(&clockevent_tcc); - - return 0; -} - -void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq) -{ - u32 reg; - - timer_base = base; - tcc8k_timer_irq.irq = irq; - - /* Enable clocks */ - clk_enable(clock); - - /* Initialize 32-bit timer */ - reg = __raw_readl(timer_base + TC32EN_OFFS); - reg &= ~TC32EN_ENABLE; /* Disable timer */ - __raw_writel(reg, timer_base + TC32EN_OFFS); - /* Free running timer, counting from 0 to 0xffffffff */ - __raw_writel(0, timer_base + TC32EN_OFFS); - __raw_writel(0, timer_base + TC32LDV_OFFS); - reg = __raw_readl(timer_base + TC32IRQ_OFFS); - reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */ - __raw_writel(reg, timer_base + TC32IRQ_OFFS); - - __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS); - - tcc_clockevent_init(clock); - setup_irq(irq, &tcc8k_timer_irq); -} diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 91a07e1..5be8e9e 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -18,20 +18,20 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o obj-$(CONFIG_TEGRA_PCI) += pcie.o obj-$(CONFIG_USB_SUPPORT) += usb_phy.o -obj-${CONFIG_MACH_HARMONY} += board-harmony.o -obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o -obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o -obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o +obj-$(CONFIG_MACH_HARMONY) += board-harmony.o +obj-$(CONFIG_MACH_HARMONY) += board-harmony-pinmux.o +obj-$(CONFIG_MACH_HARMONY) += board-harmony-pcie.o +obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o -obj-${CONFIG_MACH_PAZ00} += board-paz00.o -obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o +obj-$(CONFIG_MACH_PAZ00) += board-paz00.o +obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o -obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o -obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o +obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o +obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o -obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o -obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o -obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o +obj-$(CONFIG_MACH_TEGRA_DT) += board-dt.o +obj-$(CONFIG_MACH_TEGRA_DT) += board-harmony-pinmux.o +obj-$(CONFIG_MACH_TEGRA_DT) += board-seaboard-pinmux.o -obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o -obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o +obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o +obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c index 74743ad..e417a83 100644 --- a/arch/arm/mach-tegra/board-dt.c +++ b/arch/arm/mach-tegra/board-dt.c @@ -32,6 +32,7 @@ #include <linux/i2c.h> #include <linux/i2c-tegra.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> @@ -130,7 +131,9 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)") .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_init_irq, + .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_dt_init, + .restart = tegra_assert_system_reset, .dt_compat = tegra_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index f0bdc5e..70ee674 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c @@ -31,6 +31,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> +#include <asm/hardware/gic.h> #include <asm/setup.h> #include <mach/tegra_wm8903_pdata.h> @@ -187,6 +188,8 @@ MACHINE_START(HARMONY, "harmony") .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_init_irq, + .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_harmony_init, + .restart = tegra_assert_system_reset, MACHINE_END diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index 55c55ba..33d6205 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c @@ -29,6 +29,7 @@ #include <linux/gpio.h> #include <linux/rfkill-gpio.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> @@ -190,6 +191,8 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ") .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_init_irq, + .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_paz00_init, + .restart = tegra_assert_system_reset, MACHINE_END diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c index bf13ea3..c1599eb 100644 --- a/arch/arm/mach-tegra/board-seaboard.c +++ b/arch/arm/mach-tegra/board-seaboard.c @@ -34,6 +34,7 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include "board.h" #include "board-seaboard.h" @@ -284,8 +285,10 @@ MACHINE_START(SEABOARD, "seaboard") .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_init_irq, + .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_seaboard_init, + .restart = tegra_assert_system_reset, MACHINE_END MACHINE_START(KAEN, "kaen") @@ -293,8 +296,10 @@ MACHINE_START(KAEN, "kaen") .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_init_irq, + .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_kaen_init, + .restart = tegra_assert_system_reset, MACHINE_END MACHINE_START(WARIO, "wario") @@ -302,6 +307,8 @@ MACHINE_START(WARIO, "wario") .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_init_irq, + .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_wario_init, + .restart = tegra_assert_system_reset, MACHINE_END diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c index 1a6617b..c242314 100644 --- a/arch/arm/mach-tegra/board-trimslice.c +++ b/arch/arm/mach-tegra/board-trimslice.c @@ -26,6 +26,7 @@ #include <linux/i2c.h> #include <linux/gpio.h> +#include <asm/hardware/gic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/setup.h> @@ -176,6 +177,8 @@ MACHINE_START(TRIMSLICE, "trimslice") .map_io = tegra_map_common_io, .init_early = tegra_init_early, .init_irq = tegra_init_irq, + .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_trimslice_init, + .restart = tegra_assert_system_reset, MACHINE_END diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 690b888..20f396d 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -31,8 +31,6 @@ #include "clock.h" #include "fuse.h" -void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset; - void tegra_assert_system_reset(char mode, const char *cmd) { void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04); diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index dd165c5..e577cfe 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S @@ -12,45 +12,9 @@ * GNU General Public License for more details. * */ -#include <mach/iomap.h> -#include <mach/io.h> -#if defined(CONFIG_ARM_GIC) -#define HAVE_GET_IRQNR_PREAMBLE -#include <asm/hardware/entry-macro-gic.S> - - /* Uses the GIC interrupt controller built into the cpu */ -#define ICTRL_BASE (IO_CPU_VIRT + 0x100) - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - movw \base, #(ICTRL_BASE & 0x0000ffff) - movt \base, #((ICTRL_BASE & 0xffff0000) >> 16) - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm -#else - /* legacy interrupt controller for AP16 */ .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - @ enable imprecise aborts - cpsie a - @ EVP base at 0xf010f000 - mov \base, #0xf0000000 - orr \base, #0x00100000 - orr \base, #0x0000f000 - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS - cmp \irqnr, #0x80 - .endm -#endif diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h index 35a011f..f15deff 100644 --- a/arch/arm/mach-tegra/include/mach/io.h +++ b/arch/arm/mach-tegra/include/mach/io.h @@ -71,12 +71,6 @@ #ifndef __ASSEMBLER__ -#define __arch_ioremap tegra_ioremap -#define __arch_iounmap tegra_iounmap - -void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type); -void tegra_iounmap(volatile void __iomem *addr); - #define IO_ADDRESS(n) (IO_TO_VIRT(n)) #ifdef CONFIG_TEGRA_PCI diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h index 027c421..a312988 100644 --- a/arch/arm/mach-tegra/include/mach/system.h +++ b/arch/arm/mach-tegra/include/mach/system.h @@ -21,10 +21,6 @@ #ifndef __MACH_TEGRA_SYSTEM_H #define __MACH_TEGRA_SYSTEM_H -#include <mach/iomap.h> - -extern void (*arch_reset)(char mode, const char *cmd); - static inline void arch_idle(void) { } diff --git a/arch/arm/mach-tegra/include/mach/vmalloc.h b/arch/arm/mach-tegra/include/mach/vmalloc.h deleted file mode 100644 index fd6aa65..0000000 --- a/arch/arm/mach-tegra/include/mach/vmalloc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/vmalloc.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross <ccross@google.com> - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_VMALLOC_H -#define __MACH_TEGRA_VMALLOC_H - -#include <asm/sizes.h> - -#define VMALLOC_END 0xFE000000UL - -#endif diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c index 5489f8b..d23ee2d 100644 --- a/arch/arm/mach-tegra/io.c +++ b/arch/arm/mach-tegra/io.c @@ -60,24 +60,3 @@ void __init tegra_map_common_io(void) { iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc)); } - -/* - * Intercept ioremap() requests for addresses in our fixed mapping regions. - */ -void __iomem *tegra_ioremap(unsigned long p, size_t size, unsigned int type) -{ - void __iomem *v = IO_ADDRESS(p); - if (v == NULL) - v = __arm_ioremap(p, size, type); - return v; -} -EXPORT_SYMBOL(tegra_ioremap); - -void tegra_iounmap(volatile void __iomem *addr) -{ - unsigned long virt = (unsigned long)addr; - - if (virt >= VMALLOC_START && virt < VMALLOC_END) - __iounmap(addr); -} -EXPORT_SYMBOL(tegra_iounmap); diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 4956c3c..8ad82af 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -28,10 +28,6 @@ #include "board.h" -#define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE) -#define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE) -#define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ) - #define ICTLR_CPU_IEP_VFIQ 0x08 #define ICTLR_CPU_IEP_FIR 0x14 #define ICTLR_CPU_IEP_FIR_SET 0x18 diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index e2272d2..732c724 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -19,7 +19,6 @@ #include <linux/init.h> #include <linux/err.h> -#include <linux/sched.h> #include <linux/time.h> #include <linux/interrupt.h> #include <linux/irq.h> @@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = { .set_mode = tegra_timer_set_mode, }; -static DEFINE_CLOCK_DATA(cd); - -/* - * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60). - * This gives a resolution of about 1us and a wrap period of about 1h11min. - */ -#define SC_MULT 4194304000u -#define SC_SHIFT 22 - -unsigned long long notrace sched_clock(void) -{ - u32 cyc = timer_readl(TIMERUS_CNTR_1US); - return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); -} - -static void notrace tegra_update_sched_clock(void) +static u32 notrace tegra_read_sched_clock(void) { - u32 cyc = timer_readl(TIMERUS_CNTR_1US); - update_sched_clock(&cd, cyc, (u32)~0); + return timer_readl(TIMERUS_CNTR_1US); } /* @@ -218,8 +201,7 @@ static void __init tegra_init_timer(void) WARN(1, "Unknown clock rate"); } - init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32, - 1000000, SC_MULT, SC_SHIFT); + setup_sched_clock(tegra_read_sched_clock, 32, 1000000); if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index ac0791e..6979307 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -1888,3 +1888,23 @@ static int core_module_init(void) return mmc_init(&mmcsd_device); } module_init(core_module_init); + +/* Forward declare this function from the watchdog */ +void coh901327_watchdog_reset(void); + +void u300_restart(char mode, const char *cmd) +{ + switch (mode) { + case 's': + case 'h': +#ifdef CONFIG_COH901327_WATCHDOG + coh901327_watchdog_reset(); +#endif + break; + default: + /* Do nothing */ + break; + } + /* Wait for system do die/reset. */ + while (1); +} diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S index 20731ae..7181d6a 100644 --- a/arch/arm/mach-u300/include/mach/entry-macro.S +++ b/arch/arm/mach-u300/include/mach/entry-macro.S @@ -8,33 +8,9 @@ * Low-level IRQ helper macros for ST-Ericsson U300 * Author: Linus Walleij <linus.walleij@stericsson.com> */ -#include <mach/hardware.h> -#include <asm/hardware/vic.h> .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status - mov \irqnr, #0 - teq \irqstat, #0 - bne 1002f -1001: ldr \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status - mov \irqnr, #32 - teq \irqstat, #0 - beq 1003f -1002: tst \irqstat, #1 - bne 1003f - add \irqnr, \irqnr, #1 - movs \irqstat, \irqstat, lsr #1 - bne 1002b -1003: /* EQ will be set if no irqs pending */ - .endm diff --git a/arch/arm/mach-u300/include/mach/memory.h b/arch/arm/mach-u300/include/mach/memory.h deleted file mode 100644 index c808f34..0000000 --- a/arch/arm/mach-u300/include/mach/memory.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * - * arch/arm/mach-u300/include/mach/memory.h - * - * - * Copyright (C) 2007-2009 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * Memory virtual/physical mapping constants. - * Author: Linus Walleij <linus.walleij@stericsson.com> - * Author: Jonas Aaberg <jonas.aberg@stericsson.com> - */ - -#ifndef __MACH_MEMORY_H -#define __MACH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x48000000) -#define BOOT_PARAMS_OFFSET 0x100 - -#endif diff --git a/arch/arm/mach-u300/include/mach/platform.h b/arch/arm/mach-u300/include/mach/platform.h index 77d9210..096333f 100644 --- a/arch/arm/mach-u300/include/mach/platform.h +++ b/arch/arm/mach-u300/include/mach/platform.h @@ -14,6 +14,7 @@ void u300_map_io(void); void u300_init_irq(void); void u300_init_devices(void); +void u300_restart(char, const char *); extern struct sys_timer u300_timer; #endif diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h index 8daf136..574d46e 100644 --- a/arch/arm/mach-u300/include/mach/system.h +++ b/arch/arm/mach-u300/include/mach/system.h @@ -8,35 +8,7 @@ * System shutdown and reset functions. * Author: Linus Walleij <linus.walleij@stericsson.com> */ -#include <mach/hardware.h> -#include <asm/io.h> -#include <asm/hardware/vic.h> -#include <asm/irq.h> - -/* Forward declare this function from the watchdog */ -void coh901327_watchdog_reset(void); - static inline void arch_idle(void) { cpu_do_idle(); } - -static void arch_reset(char mode, const char *cmd) -{ - switch (mode) { - case 's': - case 'h': - printk(KERN_CRIT "RESET: shutting down/rebooting system\n"); - /* Disable interrupts */ - local_irq_disable(); -#ifdef CONFIG_COH901327_WATCHDOG - coh901327_watchdog_reset(); -#endif - break; - default: - /* Do nothing */ - break; - } - /* Wait for system do die/reset. */ - while (1); -} diff --git a/arch/arm/mach-u300/include/mach/vmalloc.h b/arch/arm/mach-u300/include/mach/vmalloc.h deleted file mode 100644 index ec423b9..0000000 --- a/arch/arm/mach-u300/include/mach/vmalloc.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * - * arch/arm/mach-u300/include/mach/vmalloc.h - * - * - * Copyright (C) 2006-2009 ST-Ericsson AB - * License terms: GNU General Public License (GPL) version 2 - * Virtual memory allocations - * End must be above the I/O registers and on an even 2MiB boundary. - * Author: Linus Walleij <linus.walleij@stericsson.com> - */ -#define VMALLOC_END 0xfe800000UL diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c index 5f51bde..bc1c789 100644 --- a/arch/arm/mach-u300/timer.c +++ b/arch/arm/mach-u300/timer.c @@ -9,7 +9,6 @@ * Author: Linus Walleij <linus.walleij@stericsson.com> */ #include <linux/interrupt.h> -#include <linux/sched.h> #include <linux/time.h> #include <linux/timex.h> #include <linux/clockchips.h> @@ -337,18 +336,10 @@ static struct irqaction u300_timer_irq = { * this wraps around for now, since it is just a relative time * stamp. (Inspired by OMAP implementation.) */ -static DEFINE_CLOCK_DATA(cd); -unsigned long long notrace sched_clock(void) +static u32 notrace u300_read_sched_clock(void) { - u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC); - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace u300_update_sched_clock(void) -{ - u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC); - update_sched_clock(&cd, cyc, (u32)~0); + return readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC); } @@ -366,7 +357,7 @@ static void __init u300_timer_init(void) clk_enable(clk); rate = clk_get_rate(clk); - init_sched_clock(&cd, u300_update_sched_clock, 32, rate); + setup_sched_clock(u300_read_sched_clock, 32, rate); /* * Disable the "OS" and "DD" timers - these are designed for Symbian! diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c index 89422ee..f30c69d 100644 --- a/arch/arm/mach-u300/u300.c +++ b/arch/arm/mach-u300/u300.c @@ -19,6 +19,7 @@ #include <linux/io.h> #include <mach/hardware.h> #include <mach/platform.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/memory.h> @@ -46,9 +47,11 @@ static void __init u300_init_machine(void) MACHINE_START(U300, MACH_U300_STRING) /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ - .atag_offset = BOOT_PARAMS_OFFSET, + .atag_offset = 0x100, .map_io = u300_map_io, .init_irq = u300_init_irq, + .handle_irq = vic_handle_irq, .timer = &u300_timer, .init_machine = u300_init_machine, + .restart = u300_restart, MACHINE_END diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index bdd7b80..de1f5f8 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -33,6 +33,7 @@ #include <linux/leds.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> +#include <asm/hardware/gic.h> #include <plat/i2c.h> #include <plat/ste_dma40.h> @@ -695,6 +696,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform") .init_irq = ux500_init_irq, /* we re-use nomadik timer here */ .timer = &ux500_timer, + .handle_irq = gic_handle_irq, .init_machine = mop500_init_machine, MACHINE_END @@ -703,6 +705,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+") .map_io = u8500_map_io, .init_irq = ux500_init_irq, .timer = &ux500_timer, + .handle_irq = gic_handle_irq, .init_machine = hrefv60_init_machine, MACHINE_END @@ -712,5 +715,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") .init_irq = ux500_init_irq, /* we re-use nomadik timer here */ .timer = &ux500_timer, + .handle_irq = gic_handle_irq, .init_machine = snowball_init_machine, MACHINE_END diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c index 82025ba..fe1569b 100644 --- a/arch/arm/mach-ux500/board-u5500.c +++ b/arch/arm/mach-ux500/board-u5500.c @@ -12,6 +12,7 @@ #include <linux/i2c.h> #include <linux/mfd/ab5500/ab5500.h> +#include <asm/hardware/gic.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> @@ -149,5 +150,6 @@ MACHINE_START(U5500, "ST-Ericsson U5500 Platform") .map_io = u5500_map_io, .init_irq = ux500_init_irq, .timer = &ux500_timer, + .handle_irq = gic_handle_irq, .init_machine = u5500_init_machine, MACHINE_END diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c index 9de1af0..5323286 100644 --- a/arch/arm/mach-ux500/cpu-db5500.c +++ b/arch/arm/mach-ux500/cpu-db5500.c @@ -30,12 +30,11 @@ static struct map_desc u5500_uart_io_desc[] __initdata = { }; static struct map_desc u5500_io_desc[] __initdata = { - __IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K), + /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ + __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K), __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K), __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K), - __IO_DEV_DESC(U5500_TWD_BASE, SZ_4K), __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K), - __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K), __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K), __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K), diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 13e8890..7f2729c 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = { }; static struct map_desc u8500_io_desc[] __initdata = { - __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), + /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ + __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), - __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K), __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), - __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S index 071bba9..e16299e 100644 --- a/arch/arm/mach-ux500/include/mach/entry-macro.S +++ b/arch/arm/mach-ux500/include/mach/entry-macro.S @@ -10,8 +10,6 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <asm/hardware/entry-macro-gic.S> .macro disable_fiq .endm diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h index 7389df9..c01ef66 100644 --- a/arch/arm/mach-ux500/include/mach/gpio.h +++ b/arch/arm/mach-ux500/include/mach/gpio.h @@ -1,10 +1,5 @@ #ifndef __ASM_ARCH_GPIO_H #define __ASM_ARCH_GPIO_H -/* - * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough - * room for a couple of GPIO expanders. - */ -#define ARCH_NR_GPIOS 350 #endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h index c0cd800..258e5c9 100644 --- a/arch/arm/mach-ux500/include/mach/system.h +++ b/arch/arm/mach-ux500/include/mach/system.h @@ -17,9 +17,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* yet to be implemented - TODO */ -} - #endif diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h deleted file mode 100644 index a4945cb..0000000 --- a/arch/arm/mach-ux500/include/mach/vmalloc.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2009 ST-Ericsson - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xf0000000UL diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index e340a54..cbcda61 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -141,11 +141,6 @@ static struct map_desc versatile_io_desc[] __initdata = { }, #ifdef CONFIG_MACH_VERSATILE_AB { - .virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE), - .pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE), - .length = SZ_4K, - .type = MT_DEVICE - }, { .virtual = IO_ADDRESS(VERSATILE_IB2_BASE), .pfn = __phys_to_pfn(VERSATILE_IB2_BASE), .length = SZ_64M, @@ -745,6 +740,19 @@ static void versatile_leds_event(led_event_t ledevt) } #endif /* CONFIG_LEDS */ +void versatile_restart(char mode, const char *cmd) +{ + void __iomem *sys = __io_address(VERSATILE_SYS_BASE); + u32 val; + + val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET); + val |= 0x105; + + __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET); + __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET); + __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET); +} + /* Early initializations */ void __init versatile_init_early(void) { diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index e014227..2ef2f55 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h @@ -30,6 +30,7 @@ extern void __init versatile_init_early(void); extern void __init versatile_init_irq(void); extern void __init versatile_map_io(void); extern struct sys_timer versatile_timer; +extern void versatile_restart(char, const char *); extern unsigned int mmc_status(struct device *dev); #ifdef CONFIG_OF extern struct of_dev_auxdata versatile_auxdata_lookup[]; diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S index e6f7c16..b6f0dbf 100644 --- a/arch/arm/mach-versatile/include/mach/entry-macro.S +++ b/arch/arm/mach-versatile/include/mach/entry-macro.S @@ -7,39 +7,9 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include <mach/hardware.h> -#include <mach/platform.h> -#include <asm/hardware/vic.h> .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE) - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status - mov \irqnr, #0 - teq \irqstat, #0 - beq 1003f - -1001: tst \irqstat, #15 - bne 1002f - add \irqnr, \irqnr, #4 - movs \irqstat, \irqstat, lsr #4 - bne 1001b -1002: tst \irqstat, #1 - bne 1003f - add \irqnr, \irqnr, #1 - movs \irqstat, \irqstat, lsr #1 - bne 1002b -1003: /* EQ will be set if no irqs pending */ - -@ clz \irqnr, \irqstat -@1003: /* EQ will be set if we reach MAXIRQNUM */ - .endm - diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h index 8ffc12a..f3fa347 100644 --- a/arch/arm/mach-versatile/include/mach/system.h +++ b/arch/arm/mach-versatile/include/mach/system.h @@ -21,10 +21,6 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <linux/io.h> -#include <mach/hardware.h> -#include <mach/platform.h> - static inline void arch_idle(void) { /* @@ -34,16 +30,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - u32 val; - - val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7; - val |= 0x105; - - __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK)); - __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL)); - __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK)); -} - #endif diff --git a/arch/arm/mach-versatile/include/mach/vmalloc.h b/arch/arm/mach-versatile/include/mach/vmalloc.h deleted file mode 100644 index 7d8e069..0000000 --- a/arch/arm/mach-versatile/include/mach/vmalloc.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-versatile/include/mach/vmalloc.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xd8000000UL diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c index fda4866..63b8dd2 100644 --- a/arch/arm/mach-versatile/versatile_ab.c +++ b/arch/arm/mach-versatile/versatile_ab.c @@ -27,6 +27,7 @@ #include <mach/hardware.h> #include <asm/irq.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -39,6 +40,8 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB") .map_io = versatile_map_io, .init_early = versatile_init_early, .init_irq = versatile_init_irq, + .handle_irq = vic_handle_irq, .timer = &versatile_timer, .init_machine = versatile_init, + .restart = versatile_restart, MACHINE_END diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c index 54e037c..ae5ad3c 100644 --- a/arch/arm/mach-versatile/versatile_dt.c +++ b/arch/arm/mach-versatile/versatile_dt.c @@ -24,6 +24,7 @@ #include <linux/init.h> #include <linux/of_irq.h> #include <linux/of_platform.h> +#include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -45,7 +46,9 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)") .map_io = versatile_map_io, .init_early = versatile_init_early, .init_irq = versatile_init_irq, + .handle_irq = vic_handle_irq, .timer = &versatile_timer, .init_machine = versatile_dt_init, .dt_compat = versatile_dt_match, + .restart = versatile_restart, MACHINE_END diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index feaf9cb..7aab79b 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c @@ -28,6 +28,7 @@ #include <linux/io.h> #include <mach/hardware.h> +#include <asm/hardware/vic.h> #include <asm/irq.h> #include <asm/mach-types.h> @@ -107,6 +108,8 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") .map_io = versatile_map_io, .init_early = versatile_init_early, .init_irq = versatile_init_irq, + .handle_irq = vic_handle_irq, .timer = &versatile_timer, .init_machine = versatile_pb_init, + .restart = versatile_restart, MACHINE_END diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 9311484..9b3d0fb 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -8,5 +8,7 @@ config ARCH_VEXPRESS_CA9X4 select ARM_ERRATA_720789 select ARM_ERRATA_751472 select ARM_ERRATA_753970 + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 endmenu diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S index 73c1129..a14f9e6 100644 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S @@ -1,5 +1,3 @@ -#include <asm/hardware/entry-macro-gic.S> - .macro disable_fiq .endm diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h index 899a4e6..f653a8e 100644 --- a/arch/arm/mach-vexpress/include/mach/system.h +++ b/arch/arm/mach-vexpress/include/mach/system.h @@ -30,8 +30,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ -} - #endif diff --git a/arch/arm/mach-vexpress/include/mach/vmalloc.h b/arch/arm/mach-vexpress/include/mach/vmalloc.h deleted file mode 100644 index f43a36e..0000000 --- a/arch/arm/mach-vexpress/include/mach/vmalloc.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-vexpress/include/mach/vmalloc.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xf8000000UL diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 1fafc324..6dd10e3 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -23,6 +23,7 @@ #include <asm/hardware/arm_timer.h> #include <asm/hardware/timer-sp.h> #include <asm/hardware/sp810.h> +#include <asm/hardware/gic.h> #include <mach/ct-ca9x4.h> #include <mach/motherboard.h> @@ -437,7 +438,6 @@ static void __init v2m_init(void) amba_device_register(v2m_amba_devs[i], &iomem_resource); pm_power_off = v2m_power_off; - arm_pm_restart = v2m_restart; ct_desc->init_tile(); } @@ -448,5 +448,7 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express") .init_early = v2m_init_early, .init_irq = v2m_init_irq, .timer = &v2m_timer, + .handle_irq = gic_handle_irq, .init_machine = v2m_init, + .restart = v2m_restart, MACHINE_END diff --git a/arch/arm/mach-vt8500/include/mach/vmalloc.h b/arch/arm/mach-vt8500/include/mach/vmalloc.h deleted file mode 100644 index 4642290..0000000 --- a/arch/arm/mach-vt8500/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-vt8500/include/mach/vmalloc.h - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END 0xd0000000UL diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c index 0a235e5..604e1db 100644 --- a/arch/arm/mach-w90x900/cpu.c +++ b/arch/arm/mach-w90x900/cpu.c @@ -33,9 +33,11 @@ #include <mach/regs-serial.h> #include <mach/regs-clock.h> #include <mach/regs-ebi.h> +#include <mach/regs-timer.h> #include "cpu.h" #include "clock.h" +#include "nuc9xx.h" /* Initial IO mappings */ @@ -222,3 +224,17 @@ void __init nuc900_init_clocks(void) clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs)); } +#define WTCR (TMR_BA + 0x1C) +#define WTCLK (1 << 10) +#define WTE (1 << 7) +#define WTRE (1 << 1) + +void nuc9xx_restart(char mode, const char *cmd) +{ + if (mode == 's') { + /* Jump into ROM at address 0 */ + soft_restart(0); + } else { + __raw_writel(WTE | WTRE | WTCLK, WTCR); + } +} diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h index ce228bd..2aaeb93 100644 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ b/arch/arm/mach-w90x900/include/mach/system.h @@ -14,28 +14,6 @@ * (at your option) any later version. * */ - -#include <linux/io.h> -#include <asm/proc-fns.h> -#include <mach/map.h> -#include <mach/regs-timer.h> - -#define WTCR (TMR_BA + 0x1C) -#define WTCLK (1 << 10) -#define WTE (1 << 7) -#define WTRE (1 << 1) - static void arch_idle(void) { } - -static void arch_reset(char mode, const char *cmd) -{ - if (mode == 's') { - /* Jump into ROM at address 0 */ - cpu_reset(0); - } else { - __raw_writel(WTE | WTRE | WTCLK, WTCR); - } -} - diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h deleted file mode 100644 index b067e44..0000000 --- a/arch/arm/mach-w90x900/include/mach/vmalloc.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-w90x900/include/mach/vmalloc.h - * - * Copyright (c) 2008 Nuvoton technology corporation - * All rights reserved. - * - * Wan ZongShun <mcuos.com@gmail.com> - * - * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END (0xe0000000UL) - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c index 7bf143c..b466e24 100644 --- a/arch/arm/mach-w90x900/irq.c +++ b/arch/arm/mach-w90x900/irq.c @@ -28,6 +28,8 @@ #include <mach/hardware.h> #include <mach/regs-irq.h> +#include "nuc9xx.h" + struct group_irq { unsigned long gpen; unsigned int enabled; diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c index 31c1090..b4243e4 100644 --- a/arch/arm/mach-w90x900/mach-nuc910evb.c +++ b/arch/arm/mach-w90x900/mach-nuc910evb.c @@ -38,4 +38,5 @@ MACHINE_START(W90P910EVB, "W90P910EVB") .init_irq = nuc900_init_irq, .init_machine = nuc910evb_init, .timer = &nuc900_timer, + .restart = nuc9xx_restart, MACHINE_END diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c index 4062e55..067d8f9 100644 --- a/arch/arm/mach-w90x900/mach-nuc950evb.c +++ b/arch/arm/mach-w90x900/mach-nuc950evb.c @@ -41,4 +41,5 @@ MACHINE_START(W90P950EVB, "W90P950EVB") .init_irq = nuc900_init_irq, .init_machine = nuc950evb_init, .timer = &nuc900_timer, + .restart = nuc9xx_restart, MACHINE_END diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c index 0ab9995..cbb3adc 100644 --- a/arch/arm/mach-w90x900/mach-nuc960evb.c +++ b/arch/arm/mach-w90x900/mach-nuc960evb.c @@ -38,4 +38,5 @@ MACHINE_START(W90N960EVB, "W90N960EVB") .init_irq = nuc900_init_irq, .init_machine = nuc960evb_init, .timer = &nuc900_timer, + .restart = nuc9xx_restart, MACHINE_END diff --git a/arch/arm/mach-w90x900/nuc910.h b/arch/arm/mach-w90x900/nuc910.h index 83e9ba5..b14c71a 100644 --- a/arch/arm/mach-w90x900/nuc910.h +++ b/arch/arm/mach-w90x900/nuc910.h @@ -12,14 +12,7 @@ * published by the Free Software Foundation. * */ - -struct map_desc; -struct sys_timer; - -/* core initialisation functions */ - -extern void nuc900_init_irq(void); -extern struct sys_timer nuc900_timer; +#include "nuc9xx.h" /* extern file from nuc910.c */ diff --git a/arch/arm/mach-w90x900/nuc950.h b/arch/arm/mach-w90x900/nuc950.h index 98a1148..6e9de30 100644 --- a/arch/arm/mach-w90x900/nuc950.h +++ b/arch/arm/mach-w90x900/nuc950.h @@ -12,14 +12,7 @@ * published by the Free Software Foundation. * */ - -struct map_desc; -struct sys_timer; - -/* core initialisation functions */ - -extern void nuc900_init_irq(void); -extern struct sys_timer nuc900_timer; +#include "nuc9xx.h" /* extern file from nuc950.c */ diff --git a/arch/arm/mach-w90x900/nuc960.h b/arch/arm/mach-w90x900/nuc960.h index f0c07cb..9f6df9a 100644 --- a/arch/arm/mach-w90x900/nuc960.h +++ b/arch/arm/mach-w90x900/nuc960.h @@ -12,14 +12,7 @@ * published by the Free Software Foundation. * */ - -struct map_desc; -struct sys_timer; - -/* core initialisation functions */ - -extern void nuc900_init_irq(void); -extern struct sys_timer nuc900_timer; +#include "nuc9xx.h" /* extern file from nuc960.c */ diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h new file mode 100644 index 0000000..91acb40 --- /dev/null +++ b/arch/arm/mach-w90x900/nuc9xx.h @@ -0,0 +1,24 @@ +/* + * arch/arm/mach-w90x900/nuc9xx.h + * + * Copied from nuc910.h, which had: + * + * Copyright (c) 2008 Nuvoton corporation + * + * Header file for NUC900 CPU support + * + * Wan ZongShun <mcuos.com@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +struct map_desc; +struct sys_timer; + +/* core initialisation functions */ + +extern void nuc900_init_irq(void); +extern struct sys_timer nuc900_timer; +extern void nuc9xx_restart(char, const char *); diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c index a2c4e2d..fa27c49 100644 --- a/arch/arm/mach-w90x900/time.c +++ b/arch/arm/mach-w90x900/time.c @@ -33,6 +33,8 @@ #include <mach/map.h> #include <mach/regs-timer.h> +#include "nuc9xx.h" + #define RESETINT 0x1f #define PERIOD (0x01 << 27) #define ONESHOT (0x00 << 27) diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 73e9368..ab5cfdd 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -112,6 +112,7 @@ static const char *xilinx_dt_match[] = { MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") .map_io = xilinx_map_io, .init_irq = xilinx_irq_init, + .handle_irq = gic_handle_irq, .init_machine = xilinx_init_machine, .timer = &xttcpss_sys_timer, .dt_compat = xilinx_dt_match, diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S index 3cfc01b..d621fb7 100644 --- a/arch/arm/mach-zynq/include/mach/entry-macro.S +++ b/arch/arm/mach-zynq/include/mach/entry-macro.S @@ -20,9 +20,6 @@ * GNU General Public License for more details. */ -#include <mach/hardware.h> -#include <asm/hardware/entry-macro-gic.S> - .macro disable_fiq .endm diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h index 1b84d70..8e88e0b 100644 --- a/arch/arm/mach-zynq/include/mach/system.h +++ b/arch/arm/mach-zynq/include/mach/system.h @@ -20,9 +20,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - /* Add architecture specific reset processing here */ -} - #endif diff --git a/arch/arm/mach-zynq/include/mach/vmalloc.h b/arch/arm/mach-zynq/include/mach/vmalloc.h deleted file mode 100644 index 2398eff..0000000 --- a/arch/arm/mach-zynq/include/mach/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/vmalloc.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_VMALLOC_H__ -#define __MACH_VMALLOC_H__ - -#define VMALLOC_END 0xE0000000UL - -#endif diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 67f75a0..4cefb57 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -629,6 +629,23 @@ config IO_36 comment "Processor Features" +config ARM_LPAE + bool "Support for the Large Physical Address Extension" + depends on MMU && CPU_V7 + help + Say Y if you have an ARMv7 processor supporting the LPAE page + table format and you would like to access memory beyond the + 4GB limit. The resulting kernel image will not run on + processors without the LPA extension. + + If unsure, say N. + +config ARCH_PHYS_ADDR_T_64BIT + def_bool ARM_LPAE + +config ARCH_DMA_ADDR_T_64BIT + bool + config ARM_THUMB bool "Support Thumb user binaries" depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON @@ -816,14 +833,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH Say Y here to use the Feroceon L2 cache in writethrough mode. Unless you specifically require this, say N for writeback mode. +config MIGHT_HAVE_CACHE_L2X0 + bool + help + This option should be selected by machines which have a L2x0 + or PL310 cache controller, but where its use is optional. + + The only effect of this option is to make CACHE_L2X0 and + related options available to the user for configuration. + + Boards or SoCs which always require the cache controller + support to be present should select CACHE_L2X0 directly + instead of this option, thus preventing the user from + inadvertently configuring a broken kernel. + config CACHE_L2X0 - bool "Enable the L2x0 outer cache controller" - depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ - REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \ - ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \ - ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK - default y + bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0 + default MIGHT_HAVE_CACHE_L2X0 select OUTER_CACHE select OUTER_CACHE_SYNC help diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index c335c76..caf14dc 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -968,7 +968,7 @@ static int __init alignment_init(void) ai_usermode = safe_usermode(ai_usermode, false); } - hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN, + hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN, "alignment exception"); /* diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index 93aac06..ee9bb36 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c @@ -22,6 +22,21 @@ unsigned int cpu_last_asid = ASID_FIRST_VERSION; DEFINE_PER_CPU(struct mm_struct *, current_mm); #endif +#ifdef CONFIG_ARM_LPAE +#define cpu_set_asid(asid) { \ + unsigned long ttbl, ttbh; \ + asm volatile( \ + " mrrc p15, 0, %0, %1, c2 @ read TTBR0\n" \ + " mov %1, %2, lsl #(48 - 32) @ set ASID\n" \ + " mcrr p15, 0, %0, %1, c2 @ set TTBR0\n" \ + : "=&r" (ttbl), "=&r" (ttbh) \ + : "r" (asid & ~ASID_MASK)); \ +} +#else +#define cpu_set_asid(asid) \ + asm(" mcr p15, 0, %0, c13, c0, 1\n" : : "r" (asid)) +#endif + /* * We fork()ed a process, and we need a new context for the child * to run in. We reserve version 0 for initial tasks so we will @@ -37,7 +52,7 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm) static void flush_context(void) { /* set the reserved ASID before flushing the TLB */ - asm("mcr p15, 0, %0, c13, c0, 1\n" : : "r" (0)); + cpu_set_asid(0); isb(); local_flush_tlb_all(); if (icache_is_vivt_asid_tagged()) { @@ -99,7 +114,7 @@ static void reset_context(void *info) set_mm_context(mm, asid); /* set the new ASID */ - asm("mcr p15, 0, %0, c13, c0, 1\n" : : "r" (mm->context.id)); + cpu_set_asid(mm->context.id); isb(); } diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index aa33949..bb7eac3 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -27,19 +27,6 @@ #include "fault.h" -/* - * Fault status register encodings. We steal bit 31 for our own purposes. - */ -#define FSR_LNX_PF (1 << 31) -#define FSR_WRITE (1 << 11) -#define FSR_FS4 (1 << 10) -#define FSR_FS3_0 (15) - -static inline int fsr_fs(unsigned int fsr) -{ - return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6; -} - #ifdef CONFIG_MMU #ifdef CONFIG_KPROBES @@ -123,8 +110,10 @@ void show_pte(struct mm_struct *mm, unsigned long addr) pte = pte_offset_map(pmd, addr); printk(", *pte=%08llx", (long long)pte_val(*pte)); +#ifndef CONFIG_ARM_LPAE printk(", *ppte=%08llx", (long long)pte_val(pte[PTE_HWTABLE_PTRS])); +#endif pte_unmap(pte); } while(0); @@ -231,7 +220,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma) static int __kprobes __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr, - struct task_struct *tsk) + unsigned int flags, struct task_struct *tsk) { struct vm_area_struct *vma; int fault; @@ -253,18 +242,7 @@ good_area: goto out; } - /* - * If for any reason at all we couldn't handle the fault, make - * sure we exit gracefully rather than endlessly redo the fault. - */ - fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0); - if (unlikely(fault & VM_FAULT_ERROR)) - return fault; - if (fault & VM_FAULT_MAJOR) - tsk->maj_flt++; - else - tsk->min_flt++; - return fault; + return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags); check_stack: if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) @@ -279,6 +257,9 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) struct task_struct *tsk; struct mm_struct *mm; int fault, sig, code; + int write = fsr & FSR_WRITE; + unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE | + (write ? FAULT_FLAG_WRITE : 0); if (notify_page_fault(regs, fsr)) return 0; @@ -305,6 +286,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) if (!down_read_trylock(&mm->mmap_sem)) { if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc)) goto no_context; +retry: down_read(&mm->mmap_sem); } else { /* @@ -320,14 +302,41 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) #endif } - fault = __do_page_fault(mm, addr, fsr, tsk); - up_read(&mm->mmap_sem); + fault = __do_page_fault(mm, addr, fsr, flags, tsk); + + /* If we need to retry but a fatal signal is pending, handle the + * signal first. We do not need to release the mmap_sem because + * it would already be released in __lock_page_or_retry in + * mm/filemap.c. */ + if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) + return 0; + + /* + * Major/minor page fault accounting is only done on the + * initial attempt. If we go through a retry, it is extremely + * likely that the page will be found in page cache at that point. + */ perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); - if (fault & VM_FAULT_MAJOR) - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, addr); - else if (fault & VM_FAULT_MINOR) - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, addr); + if (flags & FAULT_FLAG_ALLOW_RETRY) { + if (fault & VM_FAULT_MAJOR) { + tsk->maj_flt++; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, + regs, addr); + } else { + tsk->min_flt++; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, + regs, addr); + } + if (fault & VM_FAULT_RETRY) { + /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk + * of starvation. */ + flags &= ~FAULT_FLAG_ALLOW_RETRY; + goto retry; + } + } + + up_read(&mm->mmap_sem); /* * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR @@ -441,6 +450,12 @@ do_translation_fault(unsigned long addr, unsigned int fsr, pmd = pmd_offset(pud, addr); pmd_k = pmd_offset(pud_k, addr); +#ifdef CONFIG_ARM_LPAE + /* + * Only one hardware entry per PMD with LPAE. + */ + index = 0; +#else /* * On ARM one Linux PGD entry contains two hardware entries (see page * tables layout in pgtable.h). We normally guarantee that we always @@ -450,6 +465,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr, * for the first of pair. */ index = (addr >> SECTION_SHIFT) & 1; +#endif if (pmd_none(pmd_k[index])) goto bad_area; @@ -489,55 +505,20 @@ do_bad(unsigned long addr, unsigned int fsr, struct pt_regs *regs) return 1; } -static struct fsr_info { +struct fsr_info { int (*fn)(unsigned long addr, unsigned int fsr, struct pt_regs *regs); int sig; int code; const char *name; -} fsr_info[] = { - /* - * The following are the standard ARMv3 and ARMv4 aborts. ARMv5 - * defines these to be "precise" aborts. - */ - { do_bad, SIGSEGV, 0, "vector exception" }, - { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" }, - { do_bad, SIGKILL, 0, "terminal exception" }, - { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" }, - { do_bad, SIGBUS, 0, "external abort on linefetch" }, - { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" }, - { do_bad, SIGBUS, 0, "external abort on linefetch" }, - { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" }, - { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, - { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" }, - { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, - { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" }, - { do_bad, SIGBUS, 0, "external abort on translation" }, - { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" }, - { do_bad, SIGBUS, 0, "external abort on translation" }, - { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" }, - /* - * The following are "imprecise" aborts, which are signalled by bit - * 10 of the FSR, and may not be recoverable. These are only - * supported if the CPU abort handler supports bit 10. - */ - { do_bad, SIGBUS, 0, "unknown 16" }, - { do_bad, SIGBUS, 0, "unknown 17" }, - { do_bad, SIGBUS, 0, "unknown 18" }, - { do_bad, SIGBUS, 0, "unknown 19" }, - { do_bad, SIGBUS, 0, "lock abort" }, /* xscale */ - { do_bad, SIGBUS, 0, "unknown 21" }, - { do_bad, SIGBUS, BUS_OBJERR, "imprecise external abort" }, /* xscale */ - { do_bad, SIGBUS, 0, "unknown 23" }, - { do_bad, SIGBUS, 0, "dcache parity error" }, /* xscale */ - { do_bad, SIGBUS, 0, "unknown 25" }, - { do_bad, SIGBUS, 0, "unknown 26" }, - { do_bad, SIGBUS, 0, "unknown 27" }, - { do_bad, SIGBUS, 0, "unknown 28" }, - { do_bad, SIGBUS, 0, "unknown 29" }, - { do_bad, SIGBUS, 0, "unknown 30" }, - { do_bad, SIGBUS, 0, "unknown 31" } }; +/* FSR definition */ +#ifdef CONFIG_ARM_LPAE +#include "fsr-3level.c" +#else +#include "fsr-2level.c" +#endif + void __init hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name) @@ -573,42 +554,6 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) arm_notify_die("", regs, &info, fsr, 0); } - -static struct fsr_info ifsr_info[] = { - { do_bad, SIGBUS, 0, "unknown 0" }, - { do_bad, SIGBUS, 0, "unknown 1" }, - { do_bad, SIGBUS, 0, "debug event" }, - { do_bad, SIGSEGV, SEGV_ACCERR, "section access flag fault" }, - { do_bad, SIGBUS, 0, "unknown 4" }, - { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" }, - { do_bad, SIGSEGV, SEGV_ACCERR, "page access flag fault" }, - { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" }, - { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, - { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" }, - { do_bad, SIGBUS, 0, "unknown 10" }, - { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" }, - { do_bad, SIGBUS, 0, "external abort on translation" }, - { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" }, - { do_bad, SIGBUS, 0, "external abort on translation" }, - { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" }, - { do_bad, SIGBUS, 0, "unknown 16" }, - { do_bad, SIGBUS, 0, "unknown 17" }, - { do_bad, SIGBUS, 0, "unknown 18" }, - { do_bad, SIGBUS, 0, "unknown 19" }, - { do_bad, SIGBUS, 0, "unknown 20" }, - { do_bad, SIGBUS, 0, "unknown 21" }, - { do_bad, SIGBUS, 0, "unknown 22" }, - { do_bad, SIGBUS, 0, "unknown 23" }, - { do_bad, SIGBUS, 0, "unknown 24" }, - { do_bad, SIGBUS, 0, "unknown 25" }, - { do_bad, SIGBUS, 0, "unknown 26" }, - { do_bad, SIGBUS, 0, "unknown 27" }, - { do_bad, SIGBUS, 0, "unknown 28" }, - { do_bad, SIGBUS, 0, "unknown 29" }, - { do_bad, SIGBUS, 0, "unknown 30" }, - { do_bad, SIGBUS, 0, "unknown 31" }, -}; - void __init hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name) @@ -641,6 +586,7 @@ do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs) arm_notify_die("", regs, &info, ifsr, 0); } +#ifndef CONFIG_ARM_LPAE static int __init exceptions_init(void) { if (cpu_architecture() >= CPU_ARCH_ARMv6) { @@ -663,3 +609,4 @@ static int __init exceptions_init(void) } arch_initcall(exceptions_init); +#endif diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h index 49e9e38..cf08bdf 100644 --- a/arch/arm/mm/fault.h +++ b/arch/arm/mm/fault.h @@ -1,3 +1,28 @@ -void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs); +#ifndef __ARCH_ARM_FAULT_H +#define __ARCH_ARM_FAULT_H + +/* + * Fault status register encodings. We steal bit 31 for our own purposes. + */ +#define FSR_LNX_PF (1 << 31) +#define FSR_WRITE (1 << 11) +#define FSR_FS4 (1 << 10) +#define FSR_FS3_0 (15) +#define FSR_FS5_0 (0x3f) + +#ifdef CONFIG_ARM_LPAE +static inline int fsr_fs(unsigned int fsr) +{ + return fsr & FSR_FS5_0; +} +#else +static inline int fsr_fs(unsigned int fsr) +{ + return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6; +} +#endif +void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs); unsigned long search_exception_table(unsigned long addr); + +#endif /* __ARCH_ARM_FAULT_H */ diff --git a/arch/arm/mm/fsr-2level.c b/arch/arm/mm/fsr-2level.c new file mode 100644 index 0000000..18ca74c --- /dev/null +++ b/arch/arm/mm/fsr-2level.c @@ -0,0 +1,78 @@ +static struct fsr_info fsr_info[] = { + /* + * The following are the standard ARMv3 and ARMv4 aborts. ARMv5 + * defines these to be "precise" aborts. + */ + { do_bad, SIGSEGV, 0, "vector exception" }, + { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" }, + { do_bad, SIGKILL, 0, "terminal exception" }, + { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" }, + { do_bad, SIGBUS, 0, "external abort on linefetch" }, + { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" }, + { do_bad, SIGBUS, 0, "external abort on linefetch" }, + { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" }, + { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" }, + { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" }, + { do_bad, SIGBUS, 0, "external abort on translation" }, + { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" }, + { do_bad, SIGBUS, 0, "external abort on translation" }, + { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" }, + /* + * The following are "imprecise" aborts, which are signalled by bit + * 10 of the FSR, and may not be recoverable. These are only + * supported if the CPU abort handler supports bit 10. + */ + { do_bad, SIGBUS, 0, "unknown 16" }, + { do_bad, SIGBUS, 0, "unknown 17" }, + { do_bad, SIGBUS, 0, "unknown 18" }, + { do_bad, SIGBUS, 0, "unknown 19" }, + { do_bad, SIGBUS, 0, "lock abort" }, /* xscale */ + { do_bad, SIGBUS, 0, "unknown 21" }, + { do_bad, SIGBUS, BUS_OBJERR, "imprecise external abort" }, /* xscale */ + { do_bad, SIGBUS, 0, "unknown 23" }, + { do_bad, SIGBUS, 0, "dcache parity error" }, /* xscale */ + { do_bad, SIGBUS, 0, "unknown 25" }, + { do_bad, SIGBUS, 0, "unknown 26" }, + { do_bad, SIGBUS, 0, "unknown 27" }, + { do_bad, SIGBUS, 0, "unknown 28" }, + { do_bad, SIGBUS, 0, "unknown 29" }, + { do_bad, SIGBUS, 0, "unknown 30" }, + { do_bad, SIGBUS, 0, "unknown 31" }, +}; + +static struct fsr_info ifsr_info[] = { + { do_bad, SIGBUS, 0, "unknown 0" }, + { do_bad, SIGBUS, 0, "unknown 1" }, + { do_bad, SIGBUS, 0, "debug event" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "section access flag fault" }, + { do_bad, SIGBUS, 0, "unknown 4" }, + { do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "page access flag fault" }, + { do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" }, + { do_bad, SIGBUS, 0, "external abort on non-linefetch" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" }, + { do_bad, SIGBUS, 0, "unknown 10" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "page domain fault" }, + { do_bad, SIGBUS, 0, "external abort on translation" }, + { do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" }, + { do_bad, SIGBUS, 0, "external abort on translation" }, + { do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" }, + { do_bad, SIGBUS, 0, "unknown 16" }, + { do_bad, SIGBUS, 0, "unknown 17" }, + { do_bad, SIGBUS, 0, "unknown 18" }, + { do_bad, SIGBUS, 0, "unknown 19" }, + { do_bad, SIGBUS, 0, "unknown 20" }, + { do_bad, SIGBUS, 0, "unknown 21" }, + { do_bad, SIGBUS, 0, "unknown 22" }, + { do_bad, SIGBUS, 0, "unknown 23" }, + { do_bad, SIGBUS, 0, "unknown 24" }, + { do_bad, SIGBUS, 0, "unknown 25" }, + { do_bad, SIGBUS, 0, "unknown 26" }, + { do_bad, SIGBUS, 0, "unknown 27" }, + { do_bad, SIGBUS, 0, "unknown 28" }, + { do_bad, SIGBUS, 0, "unknown 29" }, + { do_bad, SIGBUS, 0, "unknown 30" }, + { do_bad, SIGBUS, 0, "unknown 31" }, +}; diff --git a/arch/arm/mm/fsr-3level.c b/arch/arm/mm/fsr-3level.c new file mode 100644 index 0000000..05a4e94 --- /dev/null +++ b/arch/arm/mm/fsr-3level.c @@ -0,0 +1,68 @@ +static struct fsr_info fsr_info[] = { + { do_bad, SIGBUS, 0, "unknown 0" }, + { do_bad, SIGBUS, 0, "unknown 1" }, + { do_bad, SIGBUS, 0, "unknown 2" }, + { do_bad, SIGBUS, 0, "unknown 3" }, + { do_bad, SIGBUS, 0, "reserved translation fault" }, + { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" }, + { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" }, + { do_page_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" }, + { do_bad, SIGBUS, 0, "reserved access flag fault" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" }, + { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" }, + { do_bad, SIGBUS, 0, "reserved permission fault" }, + { do_bad, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" }, + { do_sect_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" }, + { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" }, + { do_bad, SIGBUS, 0, "synchronous external abort" }, + { do_bad, SIGBUS, 0, "asynchronous external abort" }, + { do_bad, SIGBUS, 0, "unknown 18" }, + { do_bad, SIGBUS, 0, "unknown 19" }, + { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" }, + { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" }, + { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" }, + { do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" }, + { do_bad, SIGBUS, 0, "synchronous parity error" }, + { do_bad, SIGBUS, 0, "asynchronous parity error" }, + { do_bad, SIGBUS, 0, "unknown 26" }, + { do_bad, SIGBUS, 0, "unknown 27" }, + { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" }, + { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" }, + { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" }, + { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" }, + { do_bad, SIGBUS, 0, "unknown 32" }, + { do_bad, SIGBUS, BUS_ADRALN, "alignment fault" }, + { do_bad, SIGBUS, 0, "debug event" }, + { do_bad, SIGBUS, 0, "unknown 35" }, + { do_bad, SIGBUS, 0, "unknown 36" }, + { do_bad, SIGBUS, 0, "unknown 37" }, + { do_bad, SIGBUS, 0, "unknown 38" }, + { do_bad, SIGBUS, 0, "unknown 39" }, + { do_bad, SIGBUS, 0, "unknown 40" }, + { do_bad, SIGBUS, 0, "unknown 41" }, + { do_bad, SIGBUS, 0, "unknown 42" }, + { do_bad, SIGBUS, 0, "unknown 43" }, + { do_bad, SIGBUS, 0, "unknown 44" }, + { do_bad, SIGBUS, 0, "unknown 45" }, + { do_bad, SIGBUS, 0, "unknown 46" }, + { do_bad, SIGBUS, 0, "unknown 47" }, + { do_bad, SIGBUS, 0, "unknown 48" }, + { do_bad, SIGBUS, 0, "unknown 49" }, + { do_bad, SIGBUS, 0, "unknown 50" }, + { do_bad, SIGBUS, 0, "unknown 51" }, + { do_bad, SIGBUS, 0, "implementation fault (lockdown abort)" }, + { do_bad, SIGBUS, 0, "unknown 53" }, + { do_bad, SIGBUS, 0, "unknown 54" }, + { do_bad, SIGBUS, 0, "unknown 55" }, + { do_bad, SIGBUS, 0, "unknown 56" }, + { do_bad, SIGBUS, 0, "unknown 57" }, + { do_bad, SIGBUS, 0, "implementation fault (coprocessor abort)" }, + { do_bad, SIGBUS, 0, "unknown 59" }, + { do_bad, SIGBUS, 0, "unknown 60" }, + { do_bad, SIGBUS, 0, "unknown 61" }, + { do_bad, SIGBUS, 0, "unknown 62" }, + { do_bad, SIGBUS, 0, "unknown 63" }, +}; + +#define ifsr_info fsr_info diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c index 2be9139..feacf4c 100644 --- a/arch/arm/mm/idmap.c +++ b/arch/arm/mm/idmap.c @@ -1,9 +1,38 @@ #include <linux/kernel.h> #include <asm/cputype.h> +#include <asm/idmap.h> #include <asm/pgalloc.h> #include <asm/pgtable.h> +#include <asm/sections.h> +pgd_t *idmap_pgd; + +#ifdef CONFIG_ARM_LPAE +static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, + unsigned long prot) +{ + pmd_t *pmd; + unsigned long next; + + if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) { + pmd = pmd_alloc_one(&init_mm, addr); + if (!pmd) { + pr_warning("Failed to allocate identity pmd.\n"); + return; + } + pud_populate(&init_mm, pud, pmd); + pmd += pmd_index(addr); + } else + pmd = pmd_offset(pud, addr); + + do { + next = pmd_addr_end(addr, end); + *pmd = __pmd((addr & PMD_MASK) | prot); + flush_pmd_entry(pmd); + } while (pmd++, addr = next, addr != end); +} +#else /* !CONFIG_ARM_LPAE */ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, unsigned long prot) { @@ -15,6 +44,7 @@ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, pmd[1] = __pmd(addr); flush_pmd_entry(pmd); } +#endif /* CONFIG_ARM_LPAE */ static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end, unsigned long prot) @@ -28,11 +58,11 @@ static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end, } while (pud++, addr = next, addr != end); } -void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) +static void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) { unsigned long prot, next; - prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE; + prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF; if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) prot |= PMD_BIT4; @@ -43,48 +73,41 @@ void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) } while (pgd++, addr = next, addr != end); } -#ifdef CONFIG_SMP -static void idmap_del_pmd(pud_t *pud, unsigned long addr, unsigned long end) -{ - pmd_t *pmd = pmd_offset(pud, addr); - pmd_clear(pmd); -} +extern char __idmap_text_start[], __idmap_text_end[]; -static void idmap_del_pud(pgd_t *pgd, unsigned long addr, unsigned long end) +static int __init init_static_idmap(void) { - pud_t *pud = pud_offset(pgd, addr); - unsigned long next; + phys_addr_t idmap_start, idmap_end; - do { - next = pud_addr_end(addr, end); - idmap_del_pmd(pud, addr, next); - } while (pud++, addr = next, addr != end); -} + idmap_pgd = pgd_alloc(&init_mm); + if (!idmap_pgd) + return -ENOMEM; -void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end) -{ - unsigned long next; + /* Add an identity mapping for the physical address of the section. */ + idmap_start = virt_to_phys((void *)__idmap_text_start); + idmap_end = virt_to_phys((void *)__idmap_text_end); - pgd += pgd_index(addr); - do { - next = pgd_addr_end(addr, end); - idmap_del_pud(pgd, addr, next); - } while (pgd++, addr = next, addr != end); + pr_info("Setting up static identity map for 0x%llx - 0x%llx\n", + (long long)idmap_start, (long long)idmap_end); + identity_mapping_add(idmap_pgd, idmap_start, idmap_end); + + return 0; } -#endif +early_initcall(init_static_idmap); /* - * In order to soft-boot, we need to insert a 1:1 mapping in place of - * the user-mode pages. This will then ensure that we have predictable - * results when turning the mmu off + * In order to soft-boot, we need to switch to a 1:1 mapping for the + * cpu_reset functions. This will then ensure that we have predictable + * results when turning off the mmu. */ -void setup_mm_for_reboot(char mode) +void setup_mm_for_reboot(void) { - /* - * We need to access to user-mode page tables here. For kernel threads - * we don't have any user-mode mappings so we use the context that we - * "borrowed". - */ - identity_mapping_add(current->active_mm->pgd, 0, TASK_SIZE); + /* Clean and invalidate L1. */ + flush_cache_all(); + + /* Switch to the identity mapping. */ + cpu_switch_mm(idmap_pgd, &init_mm); + + /* Flush the TLB. */ local_flush_tlb_all(); } diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index fbdd12e..786addd 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -20,7 +20,6 @@ #include <linux/highmem.h> #include <linux/gfp.h> #include <linux/memblock.h> -#include <linux/sort.h> #include <asm/mach-types.h> #include <asm/prom.h> @@ -134,30 +133,18 @@ void show_mem(unsigned int filter) } static void __init find_limits(unsigned long *min, unsigned long *max_low, - unsigned long *max_high) + unsigned long *max_high) { struct meminfo *mi = &meminfo; int i; - *min = -1UL; - *max_low = *max_high = 0; - - for_each_bank (i, mi) { - struct membank *bank = &mi->bank[i]; - unsigned long start, end; - - start = bank_pfn_start(bank); - end = bank_pfn_end(bank); - - if (*min > start) - *min = start; - if (*max_high < end) - *max_high = end; - if (bank->highmem) - continue; - if (*max_low < end) - *max_low = end; - } + /* This assumes the meminfo array is properly sorted */ + *min = bank_pfn_start(&mi->bank[0]); + for_each_bank (i, mi) + if (mi->bank[i].highmem) + break; + *max_low = bank_pfn_end(&mi->bank[i - 1]); + *max_high = bank_pfn_end(&mi->bank[mi->nr_banks - 1]); } static void __init arm_bootmem_init(unsigned long start_pfn, @@ -319,19 +306,10 @@ static void arm_memory_present(void) } #endif -static int __init meminfo_cmp(const void *_a, const void *_b) -{ - const struct membank *a = _a, *b = _b; - long cmp = bank_pfn_start(a) - bank_pfn_start(b); - return cmp < 0 ? -1 : cmp > 0 ? 1 : 0; -} - void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc) { int i; - sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL); - memblock_init(); for (i = 0; i < mi->nr_banks; i++) memblock_add(mi->bank[i].start, mi->bank[i].size); @@ -403,8 +381,6 @@ void __init bootmem_init(void) */ arm_bootmem_free(min, max_low, max_high); - high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1; - /* * This doesn't seem to be used by the Linux memory manager any * more, but is used by ll_rw_block. If we can get rid of it, we diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index bdb248c..80632e8 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -36,12 +36,6 @@ #include <asm/mach/map.h> #include "mm.h" -/* - * Used by ioremap() and iounmap() code to mark (super)section-mapped - * I/O regions in vm_struct->flags field. - */ -#define VM_ARM_SECTION_MAPPING 0x80000000 - int ioremap_page(unsigned long virt, unsigned long phys, const struct mem_type *mtype) { @@ -64,7 +58,7 @@ void __check_kvm_seq(struct mm_struct *mm) } while (seq != init_mm.context.kvm_seq); } -#ifndef CONFIG_SMP +#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE) /* * Section support is unsafe on SMP - If you iounmap and ioremap a region, * the other CPUs will not see this change until their next context switch. @@ -79,13 +73,16 @@ static void unmap_area_sections(unsigned long virt, unsigned long size) { unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1)); pgd_t *pgd; + pud_t *pud; + pmd_t *pmdp; flush_cache_vunmap(addr, end); pgd = pgd_offset_k(addr); + pud = pud_offset(pgd, addr); + pmdp = pmd_offset(pud, addr); do { - pmd_t pmd, *pmdp = pmd_offset(pgd, addr); + pmd_t pmd = *pmdp; - pmd = *pmdp; if (!pmd_none(pmd)) { /* * Clear the PMD from the page table, and @@ -104,8 +101,8 @@ static void unmap_area_sections(unsigned long virt, unsigned long size) pte_free_kernel(&init_mm, pmd_page_vaddr(pmd)); } - addr += PGDIR_SIZE; - pgd++; + addr += PMD_SIZE; + pmdp += 2; } while (addr < end); /* @@ -124,6 +121,8 @@ remap_area_sections(unsigned long virt, unsigned long pfn, { unsigned long addr = virt, end = virt + size; pgd_t *pgd; + pud_t *pud; + pmd_t *pmd; /* * Remove and free any PTE-based mapping, and @@ -132,17 +131,17 @@ remap_area_sections(unsigned long virt, unsigned long pfn, unmap_area_sections(virt, size); pgd = pgd_offset_k(addr); + pud = pud_offset(pgd, addr); + pmd = pmd_offset(pud, addr); do { - pmd_t *pmd = pmd_offset(pgd, addr); - pmd[0] = __pmd(__pfn_to_phys(pfn) | type->prot_sect); pfn += SZ_1M >> PAGE_SHIFT; pmd[1] = __pmd(__pfn_to_phys(pfn) | type->prot_sect); pfn += SZ_1M >> PAGE_SHIFT; flush_pmd_entry(pmd); - addr += PGDIR_SIZE; - pgd++; + addr += PMD_SIZE; + pmd += 2; } while (addr < end); return 0; @@ -154,6 +153,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn, { unsigned long addr = virt, end = virt + size; pgd_t *pgd; + pud_t *pud; + pmd_t *pmd; /* * Remove and free any PTE-based mapping, and @@ -162,6 +163,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn, unmap_area_sections(virt, size); pgd = pgd_offset_k(virt); + pud = pud_offset(pgd, addr); + pmd = pmd_offset(pud, addr); do { unsigned long super_pmd_val, i; @@ -170,14 +173,12 @@ remap_area_supersections(unsigned long virt, unsigned long pfn, super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20; for (i = 0; i < 8; i++) { - pmd_t *pmd = pmd_offset(pgd, addr); - pmd[0] = __pmd(super_pmd_val); pmd[1] = __pmd(super_pmd_val); flush_pmd_entry(pmd); - addr += PGDIR_SIZE; - pgd++; + addr += PMD_SIZE; + pmd += 2; } pfn += SUPERSECTION_SIZE >> PAGE_SHIFT; @@ -195,17 +196,13 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn, unsigned long addr; struct vm_struct * area; +#ifndef CONFIG_ARM_LPAE /* * High mappings must be supersection aligned */ if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK)) return NULL; - - /* - * Don't allow RAM to be mapped - this causes problems with ARMv6+ - */ - if (WARN_ON(pfn_valid(pfn))) - return NULL; +#endif type = get_mem_type(mtype); if (!type) @@ -216,12 +213,40 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn, */ size = PAGE_ALIGN(offset + size); + /* + * Try to reuse one of the static mapping whenever possible. + */ + read_lock(&vmlist_lock); + for (area = vmlist; area; area = area->next) { + if (!size || (sizeof(phys_addr_t) == 4 && pfn >= 0x100000)) + break; + if (!(area->flags & VM_ARM_STATIC_MAPPING)) + continue; + if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype)) + continue; + if (__phys_to_pfn(area->phys_addr) > pfn || + __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1) + continue; + /* we can drop the lock here as we know *area is static */ + read_unlock(&vmlist_lock); + addr = (unsigned long)area->addr; + addr += __pfn_to_phys(pfn) - area->phys_addr; + return (void __iomem *) (offset + addr); + } + read_unlock(&vmlist_lock); + + /* + * Don't allow RAM to be mapped - this causes problems with ARMv6+ + */ + if (WARN_ON(pfn_valid(pfn))) + return NULL; + area = get_vm_area_caller(size, VM_IOREMAP, caller); if (!area) return NULL; addr = (unsigned long)area->addr; -#ifndef CONFIG_SMP +#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE) if (DOMAIN_IO == 0 && (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) || cpu_is_xsc3()) && pfn >= 0x100000 && @@ -313,28 +338,34 @@ __arm_ioremap_exec(unsigned long phys_addr, size_t size, bool cached) void __iounmap(volatile void __iomem *io_addr) { void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); -#ifndef CONFIG_SMP - struct vm_struct **p, *tmp; + struct vm_struct *vm; - /* - * If this is a section based mapping we need to handle it - * specially as the VM subsystem does not know how to handle - * such a beast. We need the lock here b/c we need to clear - * all the mappings before the area can be reclaimed - * by someone else. - */ - write_lock(&vmlist_lock); - for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) { - if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) { - if (tmp->flags & VM_ARM_SECTION_MAPPING) { - unmap_area_sections((unsigned long)tmp->addr, - tmp->size); - } + read_lock(&vmlist_lock); + for (vm = vmlist; vm; vm = vm->next) { + if (vm->addr > addr) + break; + if (!(vm->flags & VM_IOREMAP)) + continue; + /* If this is a static mapping we must leave it alone */ + if ((vm->flags & VM_ARM_STATIC_MAPPING) && + (vm->addr <= addr) && (vm->addr + vm->size > addr)) { + read_unlock(&vmlist_lock); + return; + } +#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE) + /* + * If this is a section based mapping we need to handle it + * specially as the VM subsystem does not know how to handle + * such a beast. + */ + if ((vm->addr == addr) && + (vm->flags & VM_ARM_SECTION_MAPPING)) { + unmap_area_sections((unsigned long)vm->addr, vm->size); break; } - } - write_unlock(&vmlist_lock); #endif + } + read_unlock(&vmlist_lock); vunmap(addr); } diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index ad7cce3..70f6d3ea 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h @@ -21,6 +21,20 @@ const struct mem_type *get_mem_type(unsigned int type); extern void __flush_dcache_page(struct address_space *mapping, struct page *page); +/* + * ARM specific vm_struct->flags bits. + */ + +/* (super)section-mapped I/O regions used by ioremap()/iounmap() */ +#define VM_ARM_SECTION_MAPPING 0x80000000 + +/* permanent static mappings from iotable_init() */ +#define VM_ARM_STATIC_MAPPING 0x40000000 + +/* mapping type (attributes) for permanent static mappings */ +#define VM_ARM_MTYPE(mt) ((mt) << 20) +#define VM_ARM_MTYPE_MASK (0x1f << 20) + #endif #ifdef CONFIG_ZONE_DMA diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index 44b628e..ce8cb19 100644 --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c @@ -11,10 +11,49 @@ #include <linux/random.h> #include <asm/cachetype.h> +static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr, + unsigned long pgoff) +{ + unsigned long base = addr & ~(SHMLBA-1); + unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1); + + if (base + off <= addr) + return base + off; + + return base - off; +} + #define COLOUR_ALIGN(addr,pgoff) \ ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1))) +/* gap between mmap and stack */ +#define MIN_GAP (128*1024*1024UL) +#define MAX_GAP ((TASK_SIZE)/6*5) + +static int mmap_is_legacy(void) +{ + if (current->personality & ADDR_COMPAT_LAYOUT) + return 1; + + if (rlimit(RLIMIT_STACK) == RLIM_INFINITY) + return 1; + + return sysctl_legacy_va_layout; +} + +static unsigned long mmap_base(unsigned long rnd) +{ + unsigned long gap = rlimit(RLIMIT_STACK); + + if (gap < MIN_GAP) + gap = MIN_GAP; + else if (gap > MAX_GAP) + gap = MAX_GAP; + + return PAGE_ALIGN(TASK_SIZE - gap - rnd); +} + /* * We need to ensure that shared mappings are correctly aligned to * avoid aliasing issues with VIPT caches. We need to ensure that @@ -68,13 +107,9 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, if (len > mm->cached_hole_size) { start_addr = addr = mm->free_area_cache; } else { - start_addr = addr = TASK_UNMAPPED_BASE; + start_addr = addr = mm->mmap_base; mm->cached_hole_size = 0; } - /* 8 bits of randomness in 20 address space bits */ - if ((current->flags & PF_RANDOMIZE) && - !(current->personality & ADDR_NO_RANDOMIZE)) - addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT; full_search: if (do_align) @@ -111,6 +146,134 @@ full_search: } } +unsigned long +arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, + const unsigned long len, const unsigned long pgoff, + const unsigned long flags) +{ + struct vm_area_struct *vma; + struct mm_struct *mm = current->mm; + unsigned long addr = addr0; + int do_align = 0; + int aliasing = cache_is_vipt_aliasing(); + + /* + * We only need to do colour alignment if either the I or D + * caches alias. + */ + if (aliasing) + do_align = filp || (flags & MAP_SHARED); + + /* requested length too big for entire address space */ + if (len > TASK_SIZE) + return -ENOMEM; + + if (flags & MAP_FIXED) { + if (aliasing && flags & MAP_SHARED && + (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) + return -EINVAL; + return addr; + } + + /* requesting a specific address */ + if (addr) { + if (do_align) + addr = COLOUR_ALIGN(addr, pgoff); + else + addr = PAGE_ALIGN(addr); + vma = find_vma(mm, addr); + if (TASK_SIZE - len >= addr && + (!vma || addr + len <= vma->vm_start)) + return addr; + } + + /* check if free_area_cache is useful for us */ + if (len <= mm->cached_hole_size) { + mm->cached_hole_size = 0; + mm->free_area_cache = mm->mmap_base; + } + + /* either no address requested or can't fit in requested address hole */ + addr = mm->free_area_cache; + if (do_align) { + unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff); + addr = base + len; + } + + /* make sure it can fit in the remaining address space */ + if (addr > len) { + vma = find_vma(mm, addr-len); + if (!vma || addr <= vma->vm_start) + /* remember the address as a hint for next time */ + return (mm->free_area_cache = addr-len); + } + + if (mm->mmap_base < len) + goto bottomup; + + addr = mm->mmap_base - len; + if (do_align) + addr = COLOUR_ALIGN_DOWN(addr, pgoff); + + do { + /* + * Lookup failure means no vma is above this address, + * else if new region fits below vma->vm_start, + * return with success: + */ + vma = find_vma(mm, addr); + if (!vma || addr+len <= vma->vm_start) + /* remember the address as a hint for next time */ + return (mm->free_area_cache = addr); + + /* remember the largest hole we saw so far */ + if (addr + mm->cached_hole_size < vma->vm_start) + mm->cached_hole_size = vma->vm_start - addr; + + /* try just below the current vma->vm_start */ + addr = vma->vm_start - len; + if (do_align) + addr = COLOUR_ALIGN_DOWN(addr, pgoff); + } while (len < vma->vm_start); + +bottomup: + /* + * A failed mmap() very likely causes application failure, + * so fall back to the bottom-up function here. This scenario + * can happen with large stack limits and large mmap() + * allocations. + */ + mm->cached_hole_size = ~0UL; + mm->free_area_cache = TASK_UNMAPPED_BASE; + addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags); + /* + * Restore the topdown base: + */ + mm->free_area_cache = mm->mmap_base; + mm->cached_hole_size = ~0UL; + + return addr; +} + +void arch_pick_mmap_layout(struct mm_struct *mm) +{ + unsigned long random_factor = 0UL; + + /* 8 bits of randomness in 20 address space bits */ + if ((current->flags & PF_RANDOMIZE) && + !(current->personality & ADDR_NO_RANDOMIZE)) + random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT; + + if (mmap_is_legacy()) { + mm->mmap_base = TASK_UNMAPPED_BASE + random_factor; + mm->get_unmapped_area = arch_get_unmapped_area; + mm->unmap_area = arch_unmap_area; + } else { + mm->mmap_base = mmap_base(random_factor); + mm->get_unmapped_area = arch_get_unmapped_area_topdown; + mm->unmap_area = arch_unmap_area_topdown; + } +} /* * You really shouldn't be using read() or write() on /dev/mem. This diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index dc8c550..94c5a0c 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -15,6 +15,7 @@ #include <linux/nodemask.h> #include <linux/memblock.h> #include <linux/fs.h> +#include <linux/vmalloc.h> #include <asm/cputype.h> #include <asm/sections.h> @@ -150,6 +151,7 @@ static int __init early_nowrite(char *__unused) } early_param("nowb", early_nowrite); +#ifndef CONFIG_ARM_LPAE static int __init early_ecc(char *p) { if (memcmp(p, "on", 2) == 0) @@ -159,6 +161,7 @@ static int __init early_ecc(char *p) return 0; } early_param("ecc", early_ecc); +#endif static int __init noalign_setup(char *__unused) { @@ -228,10 +231,12 @@ static struct mem_type mem_types[] = { .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, .domain = DOMAIN_KERNEL, }, +#ifndef CONFIG_ARM_LPAE [MT_MINICLEAN] = { .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE, .domain = DOMAIN_KERNEL, }, +#endif [MT_LOW_VECTORS] = { .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | L_PTE_RDONLY, @@ -429,6 +434,7 @@ static void __init build_mem_type_table(void) * ARMv6 and above have extended page tables. */ if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) { +#ifndef CONFIG_ARM_LPAE /* * Mark cache clean areas and XIP ROM read only * from SVC mode and no access from userspace. @@ -436,6 +442,7 @@ static void __init build_mem_type_table(void) mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; +#endif if (is_smp()) { /* @@ -474,6 +481,18 @@ static void __init build_mem_type_table(void) mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE; } +#ifdef CONFIG_ARM_LPAE + /* + * Do not generate access flag faults for the kernel mappings. + */ + for (i = 0; i < ARRAY_SIZE(mem_types); i++) { + mem_types[i].prot_pte |= PTE_EXT_AF; + mem_types[i].prot_sect |= PMD_SECT_AF; + } + kern_pgprot |= PTE_EXT_AF; + vecs_pgprot |= PTE_EXT_AF; +#endif + for (i = 0; i < 16; i++) { unsigned long v = pgprot_val(protection_map[i]); protection_map[i] = __pgprot(v | user_pgprot); @@ -529,13 +548,18 @@ EXPORT_SYMBOL(phys_mem_access_prot); #define vectors_base() (vectors_high() ? 0xffff0000 : 0) -static void __init *early_alloc(unsigned long sz) +static void __init *early_alloc_aligned(unsigned long sz, unsigned long align) { - void *ptr = __va(memblock_alloc(sz, sz)); + void *ptr = __va(memblock_alloc(sz, align)); memset(ptr, 0, sz); return ptr; } +static void __init *early_alloc(unsigned long sz) +{ + return early_alloc_aligned(sz, sz); +} + static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot) { if (pmd_none(*pmd)) { @@ -572,8 +596,10 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr, if (((addr | end | phys) & ~SECTION_MASK) == 0) { pmd_t *p = pmd; +#ifndef CONFIG_ARM_LPAE if (addr & SECTION_SIZE) pmd++; +#endif do { *pmd = __pmd(phys | type->prot_sect); @@ -603,6 +629,7 @@ static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, } while (pud++, addr = next, addr != end); } +#ifndef CONFIG_ARM_LPAE static void __init create_36bit_mapping(struct map_desc *md, const struct mem_type *type) { @@ -662,6 +689,7 @@ static void __init create_36bit_mapping(struct map_desc *md, pgd += SUPERSECTION_SIZE >> PGDIR_SHIFT; } while (addr != end); } +#endif /* !CONFIG_ARM_LPAE */ /* * Create the page directory entries and any necessary @@ -685,14 +713,16 @@ static void __init create_mapping(struct map_desc *md) } if ((md->type == MT_DEVICE || md->type == MT_ROM) && - md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { + md->virtual >= PAGE_OFFSET && + (md->virtual < VMALLOC_START || md->virtual >= VMALLOC_END)) { printk(KERN_WARNING "BUG: mapping for 0x%08llx" - " at 0x%08lx overlaps vmalloc space\n", + " at 0x%08lx out of vmalloc space\n", (long long)__pfn_to_phys((u64)md->pfn), md->virtual); } type = &mem_types[md->type]; +#ifndef CONFIG_ARM_LPAE /* * Catch 36-bit addresses */ @@ -700,6 +730,7 @@ static void __init create_mapping(struct map_desc *md) create_36bit_mapping(md, type); return; } +#endif addr = md->virtual & PAGE_MASK; phys = __pfn_to_phys(md->pfn); @@ -729,18 +760,33 @@ static void __init create_mapping(struct map_desc *md) */ void __init iotable_init(struct map_desc *io_desc, int nr) { - int i; + struct map_desc *md; + struct vm_struct *vm; + + if (!nr) + return; - for (i = 0; i < nr; i++) - create_mapping(io_desc + i); + vm = early_alloc_aligned(sizeof(*vm) * nr, __alignof__(*vm)); + + for (md = io_desc; nr; md++, nr--) { + create_mapping(md); + vm->addr = (void *)(md->virtual & PAGE_MASK); + vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); + vm->phys_addr = __pfn_to_phys(md->pfn); + vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; + vm->flags |= VM_ARM_MTYPE(md->type); + vm->caller = iotable_init; + vm_area_add_early(vm++); + } } -static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M); +static void * __initdata vmalloc_min = + (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET); /* * vmalloc=size forces the vmalloc area to be exactly 'size' * bytes. This can be used to increase (or decrease) the vmalloc - * area - the default is 128m. + * area - the default is 240m. */ static int __init early_vmalloc(char *arg) { @@ -775,6 +821,9 @@ void __init sanity_check_meminfo(void) struct membank *bank = &meminfo.bank[j]; *bank = meminfo.bank[i]; + if (bank->start > ULONG_MAX) + highmem = 1; + #ifdef CONFIG_HIGHMEM if (__va(bank->start) >= vmalloc_min || __va(bank->start) < (void *)PAGE_OFFSET) @@ -786,7 +835,7 @@ void __init sanity_check_meminfo(void) * Split those memory banks which are partially overlapping * the vmalloc area greatly simplifying things later. */ - if (__va(bank->start) < vmalloc_min && + if (!highmem && __va(bank->start) < vmalloc_min && bank->size > vmalloc_min - __va(bank->start)) { if (meminfo.nr_banks >= NR_BANKS) { printk(KERN_CRIT "NR_BANKS too low, " @@ -807,6 +856,17 @@ void __init sanity_check_meminfo(void) bank->highmem = highmem; /* + * Highmem banks not allowed with !CONFIG_HIGHMEM. + */ + if (highmem) { + printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx " + "(!CONFIG_HIGHMEM).\n", + (unsigned long long)bank->start, + (unsigned long long)bank->start + bank->size - 1); + continue; + } + + /* * Check whether this memory bank would entirely overlap * the vmalloc area. */ @@ -860,6 +920,7 @@ void __init sanity_check_meminfo(void) } #endif meminfo.nr_banks = j; + high_memory = __va(lowmem_limit - 1) + 1; memblock_set_current_limit(lowmem_limit); } @@ -890,14 +951,20 @@ static inline void prepare_page_table(void) /* * Clear out all the kernel space mappings, except for the first - * memory bank, up to the end of the vmalloc region. + * memory bank, up to the vmalloc region. */ for (addr = __phys_to_virt(end); - addr < VMALLOC_END; addr += PMD_SIZE) + addr < VMALLOC_START; addr += PMD_SIZE) pmd_clear(pmd_off_k(addr)); } +#ifdef CONFIG_ARM_LPAE +/* the first page is reserved for pgd */ +#define SWAPPER_PG_DIR_SIZE (PAGE_SIZE + \ + PTRS_PER_PGD * PTRS_PER_PMD * sizeof(pmd_t)) +#else #define SWAPPER_PG_DIR_SIZE (PTRS_PER_PGD * sizeof(pgd_t)) +#endif /* * Reserve the special regions of memory @@ -920,8 +987,8 @@ void __init arm_mm_memblock_reserve(void) } /* - * Set up device the mappings. Since we clear out the page tables for all - * mappings above VMALLOC_END, we will remove any debug device mappings. + * Set up the device mappings. Since we clear out the page tables for all + * mappings above VMALLOC_START, we will remove any debug device mappings. * This means you have to be careful how you debug this function, or any * called function. This means you can't use any function or debugging * method which may touch any device, otherwise the kernel _will_ crash. @@ -936,7 +1003,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc) */ vectors_page = early_alloc(PAGE_SIZE); - for (addr = VMALLOC_END; addr; addr += PMD_SIZE) + for (addr = VMALLOC_START; addr; addr += PMD_SIZE) pmd_clear(pmd_off_k(addr)); /* diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 941a98c..4fc6794 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c @@ -29,6 +29,8 @@ void __init arm_mm_memblock_reserve(void) void __init sanity_check_meminfo(void) { + phys_addr_t end = bank_phys_end(&meminfo.bank[meminfo.nr_banks - 1]); + high_memory = __va(end - 1) + 1; } /* @@ -43,7 +45,7 @@ void __init paging_init(struct machine_desc *mdesc) /* * We don't need to do anything here for nommu machines. */ -void setup_mm_for_reboot(char mode) +void setup_mm_for_reboot(void) { } diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c index b2027c1..a3e78cc 100644 --- a/arch/arm/mm/pgd.c +++ b/arch/arm/mm/pgd.c @@ -10,6 +10,7 @@ #include <linux/mm.h> #include <linux/gfp.h> #include <linux/highmem.h> +#include <linux/slab.h> #include <asm/pgalloc.h> #include <asm/page.h> @@ -17,6 +18,14 @@ #include "mm.h" +#ifdef CONFIG_ARM_LPAE +#define __pgd_alloc() kmalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL) +#define __pgd_free(pgd) kfree(pgd) +#else +#define __pgd_alloc() (pgd_t *)__get_free_pages(GFP_KERNEL, 2) +#define __pgd_free(pgd) free_pages((unsigned long)pgd, 2) +#endif + /* * need to get a 16k page for level 1 */ @@ -27,7 +36,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm) pmd_t *new_pmd, *init_pmd; pte_t *new_pte, *init_pte; - new_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL, 2); + new_pgd = __pgd_alloc(); if (!new_pgd) goto no_pgd; @@ -42,10 +51,25 @@ pgd_t *pgd_alloc(struct mm_struct *mm) clean_dcache_area(new_pgd, PTRS_PER_PGD * sizeof(pgd_t)); +#ifdef CONFIG_ARM_LPAE + /* + * Allocate PMD table for modules and pkmap mappings. + */ + new_pud = pud_alloc(mm, new_pgd + pgd_index(MODULES_VADDR), + MODULES_VADDR); + if (!new_pud) + goto no_pud; + + new_pmd = pmd_alloc(mm, new_pud, 0); + if (!new_pmd) + goto no_pmd; +#endif + if (!vectors_high()) { /* * On ARM, first page must always be allocated since it - * contains the machine vectors. + * contains the machine vectors. The vectors are always high + * with LPAE. */ new_pud = pud_alloc(mm, new_pgd, 0); if (!new_pud) @@ -74,7 +98,7 @@ no_pte: no_pmd: pud_free(mm, new_pud); no_pud: - free_pages((unsigned long)new_pgd, 2); + __pgd_free(new_pgd); no_pgd: return NULL; } @@ -111,5 +135,24 @@ no_pud: pgd_clear(pgd); pud_free(mm, pud); no_pgd: - free_pages((unsigned long) pgd_base, 2); +#ifdef CONFIG_ARM_LPAE + /* + * Free modules/pkmap or identity pmd tables. + */ + for (pgd = pgd_base; pgd < pgd_base + PTRS_PER_PGD; pgd++) { + if (pgd_none_or_clear_bad(pgd)) + continue; + if (pgd_val(*pgd) & L_PGD_SWAPPER) + continue; + pud = pud_offset(pgd, 0); + if (pud_none_or_clear_bad(pud)) + continue; + pmd = pmd_offset(pud, 0); + pud_clear(pud); + pmd_free(mm, pmd); + pgd_clear(pgd); + pud_free(mm, pud); + } +#endif + __pgd_free(pgd_base); } diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 6746966..2349513 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -95,6 +95,7 @@ ENTRY(cpu_arm1020_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm1020_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -107,6 +108,8 @@ ENTRY(cpu_arm1020_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm1020_reset) + .popsection /* * cpu_arm1020_do_idle() diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 4251421..c244b06 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S @@ -95,6 +95,7 @@ ENTRY(cpu_arm1020e_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm1020e_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -107,6 +108,8 @@ ENTRY(cpu_arm1020e_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm1020e_reset) + .popsection /* * cpu_arm1020e_do_idle() diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index d283cf3..38fe22e 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S @@ -84,6 +84,7 @@ ENTRY(cpu_arm1022_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm1022_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -96,6 +97,8 @@ ENTRY(cpu_arm1022_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm1022_reset) + .popsection /* * cpu_arm1022_do_idle() diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 678a1ce..3eb9c3c 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -84,6 +84,7 @@ ENTRY(cpu_arm1026_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm1026_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -96,6 +97,8 @@ ENTRY(cpu_arm1026_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm1026_reset) + .popsection /* * cpu_arm1026_do_idle() diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S index e5b974c..4fbeb5b 100644 --- a/arch/arm/mm/proc-arm6_7.S +++ b/arch/arm/mm/proc-arm6_7.S @@ -225,6 +225,7 @@ ENTRY(cpu_arm7_set_pte_ext) * Params : r0 = address to jump to * Notes : This sets up everything for a reset */ + .pushsection .idmap.text, "ax" ENTRY(cpu_arm6_reset) ENTRY(cpu_arm7_reset) mov r1, #0 @@ -235,6 +236,9 @@ ENTRY(cpu_arm7_reset) mov r1, #0x30 mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc mov pc, r0 +ENDPROC(cpu_arm6_reset) +ENDPROC(cpu_arm7_reset) + .popsection __CPUINIT diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index 55f4e29..0ac908c 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S @@ -101,6 +101,7 @@ ENTRY(cpu_arm720_set_pte_ext) * Params : r0 = address to jump to * Notes : This sets up everything for a reset */ + .pushsection .idmap.text, "ax" ENTRY(cpu_arm720_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache @@ -112,6 +113,8 @@ ENTRY(cpu_arm720_reset) bic ip, ip, #0x2100 @ ..v....s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm720_reset) + .popsection __CPUINIT diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S index 4506be3..dc5de5d 100644 --- a/arch/arm/mm/proc-arm740.S +++ b/arch/arm/mm/proc-arm740.S @@ -49,6 +49,7 @@ ENTRY(cpu_arm740_proc_fin) * Params : r0 = address to jump to * Notes : This sets up everything for a reset */ + .pushsection .idmap.text, "ax" ENTRY(cpu_arm740_reset) mov ip, #0 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache @@ -56,6 +57,8 @@ ENTRY(cpu_arm740_reset) bic ip, ip, #0x0000000c @ ............wc.. mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm740_reset) + .popsection __CPUINIT diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S index 7e0e1fe..6ddea3e 100644 --- a/arch/arm/mm/proc-arm7tdmi.S +++ b/arch/arm/mm/proc-arm7tdmi.S @@ -45,8 +45,11 @@ ENTRY(cpu_arm7tdmi_proc_fin) * Params : loc(r0) address to jump to * Purpose : Sets up everything for a reset and jump to the location for soft reset. */ + .pushsection .idmap.text, "ax" ENTRY(cpu_arm7tdmi_reset) mov pc, r0 +ENDPROC(cpu_arm7tdmi_reset) + .popsection __CPUINIT diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 88fb3d9..cb941ae 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S @@ -85,6 +85,7 @@ ENTRY(cpu_arm920_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm920_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -97,6 +98,8 @@ ENTRY(cpu_arm920_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm920_reset) + .popsection /* * cpu_arm920_do_idle() diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index 490e188..4ec0e07 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S @@ -87,6 +87,7 @@ ENTRY(cpu_arm922_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm922_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -99,6 +100,8 @@ ENTRY(cpu_arm922_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm922_reset) + .popsection /* * cpu_arm922_do_idle() diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 51d494b..9dccd9a 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S @@ -108,6 +108,7 @@ ENTRY(cpu_arm925_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm925_reset) /* Send software reset to MPU and DSP */ mov ip, #0xff000000 @@ -115,6 +116,8 @@ ENTRY(cpu_arm925_reset) orr ip, ip, #0x0000ce00 mov r4, #1 strh r4, [ip, #0x10] +ENDPROC(cpu_arm925_reset) + .popsection mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 9f8fd91..820259b 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -77,6 +77,7 @@ ENTRY(cpu_arm926_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_arm926_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -89,6 +90,8 @@ ENTRY(cpu_arm926_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm926_reset) + .popsection /* * cpu_arm926_do_idle() diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index ac750d5..9fdc0a17 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S @@ -48,6 +48,7 @@ ENTRY(cpu_arm940_proc_fin) * Params : r0 = address to jump to * Notes : This sets up everything for a reset */ + .pushsection .idmap.text, "ax" ENTRY(cpu_arm940_reset) mov ip, #0 mcr p15, 0, ip, c7, c5, 0 @ flush I cache @@ -58,6 +59,8 @@ ENTRY(cpu_arm940_reset) bic ip, ip, #0x00001000 @ i-cache mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm940_reset) + .popsection /* * cpu_arm940_do_idle() diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 683af3a..f684cfe 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -55,6 +55,7 @@ ENTRY(cpu_arm946_proc_fin) * Params : r0 = address to jump to * Notes : This sets up everything for a reset */ + .pushsection .idmap.text, "ax" ENTRY(cpu_arm946_reset) mov ip, #0 mcr p15, 0, ip, c7, c5, 0 @ flush I cache @@ -65,6 +66,8 @@ ENTRY(cpu_arm946_reset) bic ip, ip, #0x00001000 @ i-cache mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_arm946_reset) + .popsection /* * cpu_arm946_do_idle() diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S index 2120f9e..8881391 100644 --- a/arch/arm/mm/proc-arm9tdmi.S +++ b/arch/arm/mm/proc-arm9tdmi.S @@ -45,8 +45,11 @@ ENTRY(cpu_arm9tdmi_proc_fin) * Params : loc(r0) address to jump to * Purpose : Sets up everything for a reset and jump to the location for soft reset. */ + .pushsection .idmap.text, "ax" ENTRY(cpu_arm9tdmi_reset) mov pc, r0 +ENDPROC(cpu_arm9tdmi_reset) + .popsection __CPUINIT diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S index 4c7a571..272558a 100644 --- a/arch/arm/mm/proc-fa526.S +++ b/arch/arm/mm/proc-fa526.S @@ -57,6 +57,7 @@ ENTRY(cpu_fa526_proc_fin) * loc: location to jump to for soft reset */ .align 4 + .pushsection .idmap.text, "ax" ENTRY(cpu_fa526_reset) /* TODO: Use CP8 if possible... */ mov ip, #0 @@ -73,6 +74,8 @@ ENTRY(cpu_fa526_reset) nop nop mov pc, r0 +ENDPROC(cpu_fa526_reset) + .popsection /* * cpu_fa526_do_idle() diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index 8a6c2f7..ba3c500 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S @@ -98,6 +98,7 @@ ENTRY(cpu_feroceon_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_feroceon_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -110,6 +111,8 @@ ENTRY(cpu_feroceon_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_feroceon_reset) + .popsection /* * cpu_feroceon_do_idle() diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index 307a4def..2d8ff3a 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -91,8 +91,9 @@ #if L_PTE_SHARED != PTE_EXT_SHARED #error PTE shared bit mismatch #endif -#if (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ - L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED +#if !defined (CONFIG_ARM_LPAE) && \ + (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\ + L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED #error Invalid Linux PTE bit settings #endif #endif /* CONFIG_MMU */ diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S index db52b0f..cdfedc5 100644 --- a/arch/arm/mm/proc-mohawk.S +++ b/arch/arm/mm/proc-mohawk.S @@ -69,6 +69,7 @@ ENTRY(cpu_mohawk_proc_fin) * (same as arm926) */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_mohawk_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -79,6 +80,8 @@ ENTRY(cpu_mohawk_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_mohawk_reset) + .popsection /* * cpu_mohawk_do_idle() diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index d50ada2..775d70f 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S @@ -62,6 +62,7 @@ ENTRY(cpu_sa110_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_sa110_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -74,6 +75,8 @@ ENTRY(cpu_sa110_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_sa110_reset) + .popsection /* * cpu_sa110_do_idle(type) diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 7d91545..3aa0da1 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S @@ -70,6 +70,7 @@ ENTRY(cpu_sa1100_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_sa1100_reset) mov ip, #0 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches @@ -82,6 +83,8 @@ ENTRY(cpu_sa1100_reset) bic ip, ip, #0x1100 @ ...i...s........ mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 +ENDPROC(cpu_sa1100_reset) + .popsection /* * cpu_sa1100_do_idle(type) diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index d061d2f..5900cd5 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -55,6 +55,7 @@ ENTRY(cpu_v6_proc_fin) * - loc - location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_v6_reset) mrc p15, 0, r1, c1, c0, 0 @ ctrl register bic r1, r1, #0x1 @ ...............m @@ -62,6 +63,8 @@ ENTRY(cpu_v6_reset) mov r1, #0 mcr p15, 0, r1, c7, c5, 4 @ ISB mov pc, r0 +ENDPROC(cpu_v6_reset) + .popsection /* * cpu_v6_do_idle() diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S new file mode 100644 index 0000000..3a4b3e7 --- /dev/null +++ b/arch/arm/mm/proc-v7-2level.S @@ -0,0 +1,171 @@ +/* + * arch/arm/mm/proc-v7-2level.S + * + * Copyright (C) 2001 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define TTB_S (1 << 1) +#define TTB_RGN_NC (0 << 3) +#define TTB_RGN_OC_WBWA (1 << 3) +#define TTB_RGN_OC_WT (2 << 3) +#define TTB_RGN_OC_WB (3 << 3) +#define TTB_NOS (1 << 5) +#define TTB_IRGN_NC ((0 << 0) | (0 << 6)) +#define TTB_IRGN_WBWA ((0 << 0) | (1 << 6)) +#define TTB_IRGN_WT ((1 << 0) | (0 << 6)) +#define TTB_IRGN_WB ((1 << 0) | (1 << 6)) + +/* PTWs cacheable, inner WB not shareable, outer WB not shareable */ +#define TTB_FLAGS_UP TTB_IRGN_WB|TTB_RGN_OC_WB +#define PMD_FLAGS_UP PMD_SECT_WB + +/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ +#define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA +#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S + +/* + * cpu_v7_switch_mm(pgd_phys, tsk) + * + * Set the translation table base pointer to be pgd_phys + * + * - pgd_phys - physical address of new TTB + * + * It is assumed that: + * - we are not using split page tables + */ +ENTRY(cpu_v7_switch_mm) +#ifdef CONFIG_MMU + mov r2, #0 + ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id + ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) + ALT_UP(orr r0, r0, #TTB_FLAGS_UP) +#ifdef CONFIG_ARM_ERRATA_430973 + mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB +#endif +#ifdef CONFIG_ARM_ERRATA_754322 + dsb +#endif + mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID + isb +1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 + isb +#ifdef CONFIG_ARM_ERRATA_754322 + dsb +#endif + mcr p15, 0, r1, c13, c0, 1 @ set context ID + isb +#endif + mov pc, lr +ENDPROC(cpu_v7_switch_mm) + +/* + * cpu_v7_set_pte_ext(ptep, pte) + * + * Set a level 2 translation table entry. + * + * - ptep - pointer to level 2 translation table entry + * (hardware version is stored at +2048 bytes) + * - pte - PTE value to store + * - ext - value for extended PTE bits + */ +ENTRY(cpu_v7_set_pte_ext) +#ifdef CONFIG_MMU + str r1, [r0] @ linux version + + bic r3, r1, #0x000003f0 + bic r3, r3, #PTE_TYPE_MASK + orr r3, r3, r2 + orr r3, r3, #PTE_EXT_AP0 | 2 + + tst r1, #1 << 4 + orrne r3, r3, #PTE_EXT_TEX(1) + + eor r1, r1, #L_PTE_DIRTY + tst r1, #L_PTE_RDONLY | L_PTE_DIRTY + orrne r3, r3, #PTE_EXT_APX + + tst r1, #L_PTE_USER + orrne r3, r3, #PTE_EXT_AP1 +#ifdef CONFIG_CPU_USE_DOMAINS + @ allow kernel read/write access to read-only user pages + tstne r3, #PTE_EXT_APX + bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 +#endif + + tst r1, #L_PTE_XN + orrne r3, r3, #PTE_EXT_XN + + tst r1, #L_PTE_YOUNG + tstne r1, #L_PTE_PRESENT + moveq r3, #0 + + ARM( str r3, [r0, #2048]! ) + THUMB( add r0, r0, #2048 ) + THUMB( str r3, [r0] ) + mcr p15, 0, r0, c7, c10, 1 @ flush_pte +#endif + mov pc, lr +ENDPROC(cpu_v7_set_pte_ext) + + /* + * Memory region attributes with SCTLR.TRE=1 + * + * n = TEX[0],C,B + * TR = PRRR[2n+1:2n] - memory type + * IR = NMRR[2n+1:2n] - inner cacheable property + * OR = NMRR[2n+17:2n+16] - outer cacheable property + * + * n TR IR OR + * UNCACHED 000 00 + * BUFFERABLE 001 10 00 00 + * WRITETHROUGH 010 10 10 10 + * WRITEBACK 011 10 11 11 + * reserved 110 + * WRITEALLOC 111 10 01 01 + * DEV_SHARED 100 01 + * DEV_NONSHARED 100 01 + * DEV_WC 001 10 + * DEV_CACHED 011 10 + * + * Other attributes: + * + * DS0 = PRRR[16] = 0 - device shareable property + * DS1 = PRRR[17] = 1 - device shareable property + * NS0 = PRRR[18] = 0 - normal shareable property + * NS1 = PRRR[19] = 1 - normal shareable property + * NOS = PRRR[24+n] = 1 - not outer shareable + */ +.equ PRRR, 0xff0a81a8 +.equ NMRR, 0x40e040e0 + + /* + * Macro for setting up the TTBRx and TTBCR registers. + * - \ttb0 and \ttb1 updated with the corresponding flags. + */ + .macro v7_ttb_setup, zero, ttbr0, ttbr1, tmp + mcr p15, 0, \zero, c2, c0, 2 @ TTB control register + ALT_SMP(orr \ttbr0, \ttbr0, #TTB_FLAGS_SMP) + ALT_UP(orr \ttbr0, \ttbr0, #TTB_FLAGS_UP) + ALT_SMP(orr \ttbr1, \ttbr1, #TTB_FLAGS_SMP) + ALT_UP(orr \ttbr1, \ttbr1, #TTB_FLAGS_UP) + mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1 + .endm + + __CPUINIT + + /* AT + * TFR EV X F I D LR S + * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM + * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced + * 1 0 110 0011 1100 .111 1101 < we want + */ + .align 2 + .type v7_crval, #object +v7_crval: + crval clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c + + .previous diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S new file mode 100644 index 0000000..8de0f1d --- /dev/null +++ b/arch/arm/mm/proc-v7-3level.S @@ -0,0 +1,150 @@ +/* + * arch/arm/mm/proc-v7-3level.S + * + * Copyright (C) 2001 Deep Blue Solutions Ltd. + * Copyright (C) 2011 ARM Ltd. + * Author: Catalin Marinas <catalin.marinas@arm.com> + * based on arch/arm/mm/proc-v7-2level.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define TTB_IRGN_NC (0 << 8) +#define TTB_IRGN_WBWA (1 << 8) +#define TTB_IRGN_WT (2 << 8) +#define TTB_IRGN_WB (3 << 8) +#define TTB_RGN_NC (0 << 10) +#define TTB_RGN_OC_WBWA (1 << 10) +#define TTB_RGN_OC_WT (2 << 10) +#define TTB_RGN_OC_WB (3 << 10) +#define TTB_S (3 << 12) +#define TTB_EAE (1 << 31) + +/* PTWs cacheable, inner WB not shareable, outer WB not shareable */ +#define TTB_FLAGS_UP (TTB_IRGN_WB|TTB_RGN_OC_WB) +#define PMD_FLAGS_UP (PMD_SECT_WB) + +/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ +#define TTB_FLAGS_SMP (TTB_IRGN_WBWA|TTB_S|TTB_RGN_OC_WBWA) +#define PMD_FLAGS_SMP (PMD_SECT_WBWA|PMD_SECT_S) + +/* + * cpu_v7_switch_mm(pgd_phys, tsk) + * + * Set the translation table base pointer to be pgd_phys (physical address of + * the new TTB). + */ +ENTRY(cpu_v7_switch_mm) +#ifdef CONFIG_MMU + ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id + and r3, r1, #0xff + mov r3, r3, lsl #(48 - 32) @ ASID + mcrr p15, 0, r0, r3, c2 @ set TTB 0 + isb +#endif + mov pc, lr +ENDPROC(cpu_v7_switch_mm) + +/* + * cpu_v7_set_pte_ext(ptep, pte) + * + * Set a level 2 translation table entry. + * - ptep - pointer to level 3 translation table entry + * - pte - PTE value to store (64-bit in r2 and r3) + */ +ENTRY(cpu_v7_set_pte_ext) +#ifdef CONFIG_MMU + tst r2, #L_PTE_PRESENT + beq 1f + tst r3, #1 << (55 - 32) @ L_PTE_DIRTY + orreq r2, #L_PTE_RDONLY +1: strd r2, r3, [r0] + mcr p15, 0, r0, c7, c10, 1 @ flush_pte +#endif + mov pc, lr +ENDPROC(cpu_v7_set_pte_ext) + + /* + * Memory region attributes for LPAE (defined in pgtable-3level.h): + * + * n = AttrIndx[2:0] + * + * n MAIR + * UNCACHED 000 00000000 + * BUFFERABLE 001 01000100 + * DEV_WC 001 01000100 + * WRITETHROUGH 010 10101010 + * WRITEBACK 011 11101110 + * DEV_CACHED 011 11101110 + * DEV_SHARED 100 00000100 + * DEV_NONSHARED 100 00000100 + * unused 101 + * unused 110 + * WRITEALLOC 111 11111111 + */ +.equ PRRR, 0xeeaa4400 @ MAIR0 +.equ NMRR, 0xff000004 @ MAIR1 + + /* + * Macro for setting up the TTBRx and TTBCR registers. + * - \ttbr1 updated. + */ + .macro v7_ttb_setup, zero, ttbr0, ttbr1, tmp + ldr \tmp, =swapper_pg_dir @ swapper_pg_dir virtual address + cmp \ttbr1, \tmp @ PHYS_OFFSET > PAGE_OFFSET? (branch below) + mrc p15, 0, \tmp, c2, c0, 2 @ TTB control register + orr \tmp, \tmp, #TTB_EAE + ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP) + ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP) + ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16) + ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP << 16) + /* + * TTBR0/TTBR1 split (PAGE_OFFSET): + * 0x40000000: T0SZ = 2, T1SZ = 0 (not used) + * 0x80000000: T0SZ = 0, T1SZ = 1 + * 0xc0000000: T0SZ = 0, T1SZ = 2 + * + * Only use this feature if PHYS_OFFSET <= PAGE_OFFSET, otherwise + * booting secondary CPUs would end up using TTBR1 for the identity + * mapping set up in TTBR0. + */ + bhi 9001f @ PHYS_OFFSET > PAGE_OFFSET? + orr \tmp, \tmp, #(((PAGE_OFFSET >> 30) - 1) << 16) @ TTBCR.T1SZ +#if defined CONFIG_VMSPLIT_2G + /* PAGE_OFFSET == 0x80000000, T1SZ == 1 */ + add \ttbr1, \ttbr1, #1 << 4 @ skip two L1 entries +#elif defined CONFIG_VMSPLIT_3G + /* PAGE_OFFSET == 0xc0000000, T1SZ == 2 */ + add \ttbr1, \ttbr1, #4096 * (1 + 3) @ only L2 used, skip pgd+3*pmd +#endif + /* CONFIG_VMSPLIT_1G does not need TTBR1 adjustment */ +9001: mcr p15, 0, \tmp, c2, c0, 2 @ TTB control register + mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 + .endm + + __CPUINIT + + /* + * AT + * TFR EV X F IHD LR S + * .EEE ..EE PUI. .TAT 4RVI ZWRS BLDP WCAM + * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced + * 11 0 110 1 0011 1100 .111 1101 < we want + */ + .align 2 + .type v7_crval, #object +v7_crval: + crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c + + .previous diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 2c559ac..7e9b5bf 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -19,24 +19,11 @@ #include "proc-macros.S" -#define TTB_S (1 << 1) -#define TTB_RGN_NC (0 << 3) -#define TTB_RGN_OC_WBWA (1 << 3) -#define TTB_RGN_OC_WT (2 << 3) -#define TTB_RGN_OC_WB (3 << 3) -#define TTB_NOS (1 << 5) -#define TTB_IRGN_NC ((0 << 0) | (0 << 6)) -#define TTB_IRGN_WBWA ((0 << 0) | (1 << 6)) -#define TTB_IRGN_WT ((1 << 0) | (0 << 6)) -#define TTB_IRGN_WB ((1 << 0) | (1 << 6)) - -/* PTWs cacheable, inner WB not shareable, outer WB not shareable */ -#define TTB_FLAGS_UP TTB_IRGN_WB|TTB_RGN_OC_WB -#define PMD_FLAGS_UP PMD_SECT_WB - -/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ -#define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA -#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S +#ifdef CONFIG_ARM_LPAE +#include "proc-v7-3level.S" +#else +#include "proc-v7-2level.S" +#endif ENTRY(cpu_v7_proc_init) mov pc, lr @@ -63,6 +50,7 @@ ENDPROC(cpu_v7_proc_fin) * caches disabled. */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_v7_reset) mrc p15, 0, r1, c1, c0, 0 @ ctrl register bic r1, r1, #0x1 @ ...............m @@ -71,6 +59,7 @@ ENTRY(cpu_v7_reset) isb mov pc, r0 ENDPROC(cpu_v7_reset) + .popsection /* * cpu_v7_do_idle() @@ -97,127 +86,12 @@ ENTRY(cpu_v7_dcache_clean_area) mov pc, lr ENDPROC(cpu_v7_dcache_clean_area) -/* - * cpu_v7_switch_mm(pgd_phys, tsk) - * - * Set the translation table base pointer to be pgd_phys - * - * - pgd_phys - physical address of new TTB - * - * It is assumed that: - * - we are not using split page tables - */ -ENTRY(cpu_v7_switch_mm) -#ifdef CONFIG_MMU - mov r2, #0 - ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id - ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) - ALT_UP(orr r0, r0, #TTB_FLAGS_UP) -#ifdef CONFIG_ARM_ERRATA_430973 - mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB -#endif -#ifdef CONFIG_ARM_ERRATA_754322 - dsb -#endif - mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID - isb -1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 - isb -#ifdef CONFIG_ARM_ERRATA_754322 - dsb -#endif - mcr p15, 0, r1, c13, c0, 1 @ set context ID - isb -#endif - mov pc, lr -ENDPROC(cpu_v7_switch_mm) - -/* - * cpu_v7_set_pte_ext(ptep, pte) - * - * Set a level 2 translation table entry. - * - * - ptep - pointer to level 2 translation table entry - * (hardware version is stored at +2048 bytes) - * - pte - PTE value to store - * - ext - value for extended PTE bits - */ -ENTRY(cpu_v7_set_pte_ext) -#ifdef CONFIG_MMU - str r1, [r0] @ linux version - - bic r3, r1, #0x000003f0 - bic r3, r3, #PTE_TYPE_MASK - orr r3, r3, r2 - orr r3, r3, #PTE_EXT_AP0 | 2 - - tst r1, #1 << 4 - orrne r3, r3, #PTE_EXT_TEX(1) - - eor r1, r1, #L_PTE_DIRTY - tst r1, #L_PTE_RDONLY | L_PTE_DIRTY - orrne r3, r3, #PTE_EXT_APX - - tst r1, #L_PTE_USER - orrne r3, r3, #PTE_EXT_AP1 -#ifdef CONFIG_CPU_USE_DOMAINS - @ allow kernel read/write access to read-only user pages - tstne r3, #PTE_EXT_APX - bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 -#endif - - tst r1, #L_PTE_XN - orrne r3, r3, #PTE_EXT_XN - - tst r1, #L_PTE_YOUNG - tstne r1, #L_PTE_PRESENT - moveq r3, #0 - - ARM( str r3, [r0, #2048]! ) - THUMB( add r0, r0, #2048 ) - THUMB( str r3, [r0] ) - mcr p15, 0, r0, c7, c10, 1 @ flush_pte -#endif - mov pc, lr -ENDPROC(cpu_v7_set_pte_ext) - string cpu_v7_name, "ARMv7 Processor" .align - /* - * Memory region attributes with SCTLR.TRE=1 - * - * n = TEX[0],C,B - * TR = PRRR[2n+1:2n] - memory type - * IR = NMRR[2n+1:2n] - inner cacheable property - * OR = NMRR[2n+17:2n+16] - outer cacheable property - * - * n TR IR OR - * UNCACHED 000 00 - * BUFFERABLE 001 10 00 00 - * WRITETHROUGH 010 10 10 10 - * WRITEBACK 011 10 11 11 - * reserved 110 - * WRITEALLOC 111 10 01 01 - * DEV_SHARED 100 01 - * DEV_NONSHARED 100 01 - * DEV_WC 001 10 - * DEV_CACHED 011 10 - * - * Other attributes: - * - * DS0 = PRRR[16] = 0 - device shareable property - * DS1 = PRRR[17] = 1 - device shareable property - * NS0 = PRRR[18] = 0 - normal shareable property - * NS1 = PRRR[19] = 1 - normal shareable property - * NOS = PRRR[24+n] = 1 - not outer shareable - */ -.equ PRRR, 0xff0a81a8 -.equ NMRR, 0x40e040e0 - /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ .globl cpu_v7_suspend_size -.equ cpu_v7_suspend_size, 4 * 7 +.equ cpu_v7_suspend_size, 4 * 8 #ifdef CONFIG_ARM_CPU_SUSPEND ENTRY(cpu_v7_do_suspend) stmfd sp!, {r4 - r10, lr} @@ -226,10 +100,11 @@ ENTRY(cpu_v7_do_suspend) stmia r0!, {r4 - r5} mrc p15, 0, r6, c3, c0, 0 @ Domain ID mrc p15, 0, r7, c2, c0, 1 @ TTB 1 + mrc p15, 0, r11, c2, c0, 2 @ TTB control register mrc p15, 0, r8, c1, c0, 0 @ Control register mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control - stmia r0, {r6 - r10} + stmia r0, {r6 - r11} ldmfd sp!, {r4 - r10, pc} ENDPROC(cpu_v7_do_suspend) @@ -241,13 +116,15 @@ ENTRY(cpu_v7_do_resume) ldmia r0!, {r4 - r5} mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID mcr p15, 0, r5, c13, c0, 3 @ User r/o thread ID - ldmia r0, {r6 - r10} + ldmia r0, {r6 - r11} mcr p15, 0, r6, c3, c0, 0 @ Domain ID +#ifndef CONFIG_ARM_LPAE ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP) ALT_UP(orr r1, r1, #TTB_FLAGS_UP) +#endif mcr p15, 0, r1, c2, c0, 0 @ TTB 0 mcr p15, 0, r7, c2, c0, 1 @ TTB 1 - mcr p15, 0, ip, c2, c0, 2 @ TTB control register + mcr p15, 0, r11, c2, c0, 2 @ TTB control register mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register teq r4, r9 @ Is it already set? mcrne p15, 0, r9, c1, c0, 1 @ No, so write it @@ -284,6 +161,7 @@ __v7_ca5mp_setup: __v7_ca9mp_setup: mov r10, #(1 << 0) @ TLB ops broadcasting b 1f +__v7_ca7mp_setup: __v7_ca15mp_setup: mov r10, #0 1: @@ -363,11 +241,13 @@ __v7_setup: orreq r10, r10, #1 << 6 @ set bit #6 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register #endif -#ifdef CONFIG_ARM_ERRATA_751472 - cmp r6, #0x30 @ present prior to r3p0 +#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP) + ALT_SMP(cmp r6, #0x30) @ present prior to r3p0 + ALT_UP_B(1f) mrclt p15, 0, r10, c15, c0, 1 @ read diagnostic register orrlt r10, r10, #1 << 11 @ set bit #11 mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register +1: #endif 3: mov r10, #0 @@ -377,12 +257,7 @@ __v7_setup: dsb #ifdef CONFIG_MMU mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs - mcr p15, 0, r10, c2, c0, 2 @ TTB control register - ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) - ALT_UP(orr r4, r4, #TTB_FLAGS_UP) - ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP) - ALT_UP(orr r8, r8, #TTB_FLAGS_UP) - mcr p15, 0, r8, c2, c0, 1 @ load TTB1 + v7_ttb_setup r10, r4, r8, r5 @ TTBCR, TTBRx setup ldr r5, =PRRR @ PRRR ldr r6, =NMRR @ NMRR mcr p15, 0, r5, c10, c2, 0 @ write PRRR @@ -404,16 +279,7 @@ __v7_setup: mov pc, lr @ return to head.S:__ret ENDPROC(__v7_setup) - /* AT - * TFR EV X F I D LR S - * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM - * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced - * 1 0 110 0011 1100 .111 1101 < we want - */ - .type v7_crval, #object -v7_crval: - crval clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c - + .align 2 __v7_setup_stack: .space 4 * 11 @ 11 registers @@ -435,11 +301,11 @@ __v7_setup_stack: */ .macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ - PMD_FLAGS_SMP | \mm_mmuflags) + PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags) ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ - PMD_FLAGS_UP | \mm_mmuflags) - .long PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ | \io_mmuflags + PMD_SECT_AF | PMD_FLAGS_UP | \mm_mmuflags) + .long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | \ + PMD_SECT_AP_READ | PMD_SECT_AF | \io_mmuflags W(b) \initfunc .long cpu_arch_name .long cpu_elf_name @@ -452,6 +318,7 @@ __v7_setup_stack: .long v7_cache_fns .endm +#ifndef CONFIG_ARM_LPAE /* * ARM Ltd. Cortex A5 processor. */ @@ -463,6 +330,16 @@ __v7_ca5mp_proc_info: .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info /* + * ARM Ltd. Cortex A7 processor. + */ + .type __v7_ca7mp_proc_info, #object +__v7_ca7mp_proc_info: + .long 0x410fc070 + .long 0xff0ffff0 + __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV + .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info + + /* * ARM Ltd. Cortex A9 processor. */ .type __v7_ca9mp_proc_info, #object @@ -471,6 +348,7 @@ __v7_ca9mp_proc_info: .long 0xff0ffff0 __v7_proc __v7_ca9mp_setup .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info +#endif /* CONFIG_ARM_LPAE */ /* * ARM Ltd. Cortex A15 processor. diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index abf0507..b0d5786 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -105,6 +105,7 @@ ENTRY(cpu_xsc3_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_xsc3_reset) mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE msr cpsr_c, r1 @ reset CPSR @@ -119,6 +120,8 @@ ENTRY(cpu_xsc3_reset) @ already containing those two last instructions to survive. mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs mov pc, r0 +ENDPROC(cpu_xsc3_reset) + .popsection /* * cpu_xsc3_do_idle() diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 3277904..4ffebaa 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -142,6 +142,7 @@ ENTRY(cpu_xscale_proc_fin) * Beware PXA270 erratum E7. */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_xscale_reset) mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE msr cpsr_c, r1 @ reset CPSR @@ -160,6 +161,8 @@ ENTRY(cpu_xscale_reset) @ already containing those two last instructions to survive. mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs mov pc, r0 +ENDPROC(cpu_xscale_reset) + .popsection /* * cpu_xscale_do_idle() diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S index cafa183..d18dde9 100644 --- a/arch/arm/nwfpe/entry.S +++ b/arch/arm/nwfpe/entry.S @@ -20,6 +20,8 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +#include <asm/opcodes.h> + /* This is the kernel's entry point into the floating point emulator. It is called from the kernel with code similar to this: @@ -81,11 +83,11 @@ nwfpe_enter: mov r6, r0 @ save the opcode emulate: ldr r1, [sp, #S_PSR] @ fetch the PSR - bl checkCondition @ check the condition - cmp r0, #0 @ r0 = 0 ==> condition failed + bl arm_check_condition @ check the condition + cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed? @ if condition code failed to match, next insn - beq next @ get the next instruction; + bne next @ get the next instruction; mov r0, r6 @ prepare for EmulateAll() bl EmulateAll @ emulate the instruction diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c index 922b811..ff983467 100644 --- a/arch/arm/nwfpe/fpopcode.c +++ b/arch/arm/nwfpe/fpopcode.c @@ -61,29 +61,3 @@ const float32 float32Constant[] = { 0x41200000 /* single 10.0 */ }; -/* condition code lookup table - index into the table is test code: EQ, NE, ... LT, GT, AL, NV - bit position in short is condition code: NZCV */ -static const unsigned short aCC[16] = { - 0xF0F0, // EQ == Z set - 0x0F0F, // NE - 0xCCCC, // CS == C set - 0x3333, // CC - 0xFF00, // MI == N set - 0x00FF, // PL - 0xAAAA, // VS == V set - 0x5555, // VC - 0x0C0C, // HI == C set && Z clear - 0xF3F3, // LS == C clear || Z set - 0xAA55, // GE == (N==V) - 0x55AA, // LT == (N!=V) - 0x0A05, // GT == (!Z && (N==V)) - 0xF5FA, // LE == (Z || (N!=V)) - 0xFFFF, // AL always - 0 // NV -}; - -unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes) -{ - return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1; -} diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h index 786e4c9..78f02db 100644 --- a/arch/arm/nwfpe/fpopcode.h +++ b/arch/arm/nwfpe/fpopcode.h @@ -475,9 +475,6 @@ static inline unsigned int getDestinationSize(const unsigned int opcode) return (nRc); } -extern unsigned int checkCondition(const unsigned int opcode, - const unsigned int ccodes); - extern const float64 float64Constant[]; extern const float32 float32Constant[]; diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c index c074e66..4e0a371 100644 --- a/arch/arm/oprofile/common.c +++ b/arch/arm/oprofile/common.c @@ -116,7 +116,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) return oprofile_perf_init(ops); } -void __exit oprofile_arch_exit(void) +void oprofile_arch_exit(void) { oprofile_perf_exit(); } diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile index 69b09c1..a99dc15 100644 --- a/arch/arm/plat-iop/Makefile +++ b/arch/arm/plat-iop/Makefile @@ -10,10 +10,10 @@ obj-$(CONFIG_ARCH_IOP32X) += i2c.o obj-$(CONFIG_ARCH_IOP32X) += pci.o obj-$(CONFIG_ARCH_IOP32X) += setup.o obj-$(CONFIG_ARCH_IOP32X) += time.o -obj-$(CONFIG_ARCH_IOP32X) += io.o obj-$(CONFIG_ARCH_IOP32X) += cp6.o obj-$(CONFIG_ARCH_IOP32X) += adma.o obj-$(CONFIG_ARCH_IOP32X) += pmu.o +obj-$(CONFIG_ARCH_IOP32X) += restart.o # IOP33X obj-$(CONFIG_ARCH_IOP33X) += gpio.o @@ -21,10 +21,10 @@ obj-$(CONFIG_ARCH_IOP33X) += i2c.o obj-$(CONFIG_ARCH_IOP33X) += pci.o obj-$(CONFIG_ARCH_IOP33X) += setup.o obj-$(CONFIG_ARCH_IOP33X) += time.o -obj-$(CONFIG_ARCH_IOP33X) += io.o obj-$(CONFIG_ARCH_IOP33X) += cp6.o obj-$(CONFIG_ARCH_IOP33X) += adma.o obj-$(CONFIG_ARCH_IOP33X) += pmu.o +obj-$(CONFIG_ARCH_IOP33X) += restart.o # IOP13XX obj-$(CONFIG_ARCH_IOP13XX) += cp6.o diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c deleted file mode 100644 index e15bc17..0000000 --- a/arch/arm/plat-iop/io.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * iop3xx custom ioremap implementation - * Copyright (c) 2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/io.h> -#include <mach/hardware.h> - -void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype) -{ - void __iomem * retval; - - switch (cookie) { - case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA: - retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie); - break; - case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA: - retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie); - break; - default: - retval = __arm_ioremap_caller(cookie, size, mtype, - __builtin_return_address(0)); - } - - return retval; -} -EXPORT_SYMBOL(__iop3xx_ioremap); - -void __iop3xx_iounmap(void __iomem *addr) -{ - extern void __iounmap(volatile void __iomem *addr); - - switch ((u32) addr) { - case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA: - case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA: - goto skip; - } - __iounmap(addr); - -skip: - return; -} -EXPORT_SYMBOL(__iop3xx_iounmap); diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c new file mode 100644 index 0000000..6a85a0c --- /dev/null +++ b/arch/arm/plat-iop/restart.c @@ -0,0 +1,19 @@ +/* + * restart.c + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <asm/hardware/iop3xx.h> +#include <mach/hardware.h> + +void iop3xx_restart(char mode, const char *cmd) +{ + *IOP3XX_PCSR = 0x30; + + /* Jump into ROM at address 0 */ + soft_restart(0); +} diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 568dd02..cbfbbe4 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -18,7 +18,6 @@ #include <linux/time.h> #include <linux/init.h> #include <linux/timex.h> -#include <linux/sched.h> #include <linux/io.h> #include <linux/clocksource.h> #include <linux/clockchips.h> @@ -52,21 +51,12 @@ static struct clocksource iop_clocksource = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -static DEFINE_CLOCK_DATA(cd); - /* * IOP sched_clock() implementation via its clocksource. */ -unsigned long long notrace sched_clock(void) +static u32 notrace iop_read_sched_clock(void) { - u32 cyc = 0xffffffffu - read_tcr1(); - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace iop_update_sched_clock(void) -{ - u32 cyc = 0xffffffffu - read_tcr1(); - update_sched_clock(&cd, cyc, (u32)~0); + return 0xffffffffu - read_tcr1(); } /* @@ -152,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate) { u32 timer_ctl; - init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate); + setup_sched_clock(iop_read_sched_clock, 32, tick_rate); ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ); iop_tick_rate = tick_rate; diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index b3a1f2b3..b30708e 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7 bool "i.MX3, i.MX6" select AUTO_ZRELADDR if !ZBOOT_ROM select ARM_PATCH_PHYS_VIRT + select MIGHT_HAVE_CACHE_L2X0 help This enables support for systems based on the Freescale i.MX3 and i.MX6 family. diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index b9f0f5f..076db84f 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -5,7 +5,6 @@ # Common support obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o -obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_MXC_TZIC) += tzic.o obj-$(CONFIG_MXC_AVIC) += avic.o diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c index adbff70..73db34b 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/plat-mxc/cpufreq.c @@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy, return ret; } -static int __init mxc_cpufreq_init(struct cpufreq_policy *policy) +static int mxc_cpufreq_init(struct cpufreq_policy *policy) { int ret; int i; diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c deleted file mode 100644 index 12f8f81..0000000 --- a/arch/arm/plat-mxc/gic.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright 2011 Freescale Semiconductor, Inc. - * Copyright 2011 Linaro Ltd. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include <linux/io.h> -#include <asm/exception.h> -#include <asm/localtimer.h> -#include <asm/hardware/gic.h> -#ifdef CONFIG_SMP -#include <asm/smp.h> -#endif - -asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) -{ - u32 irqstat, irqnr; - - do { - irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK); - irqnr = irqstat & 0x3ff; - if (irqnr == 1023) - break; - - if (irqnr > 15 && irqnr < 1021) - handle_IRQ(irqnr, regs); -#ifdef CONFIG_SMP - else { - writel_relaxed(irqstat, gic_cpu_base_addr + - GIC_CPU_EOI); - handle_IPI(irqnr, regs); - } -#endif - } while (1); -} diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index c75f254..83cca9b 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -71,8 +71,8 @@ extern int mx6q_clocks_init(void); extern struct platform_device *mxc_register_gpio(char *name, int id, resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); extern void mxc_set_cpu_type(unsigned int type); +extern void mxc_restart(char, const char *); extern void mxc_arch_reset_init(void __iomem *); -extern void mx51_efikamx_reset(void); extern int mx53_revision(void); extern int mx53_display_revision(void); @@ -89,7 +89,6 @@ extern void imx_print_silicon_rev(const char *cpu, int srev); void avic_handle_irq(struct pt_regs *); void tzic_handle_irq(struct pt_regs *); -void gic_handle_irq(struct pt_regs *); #define imx1_handle_irq avic_handle_irq #define imx21_handle_irq avic_handle_irq @@ -122,6 +121,7 @@ static inline void imx_smp_prepare(void) {} extern void imx_enable_cpu(int cpu, bool enable); extern void imx_set_cpu_jump(int cpu, void *jump_addr); extern void imx_src_init(void); +extern void imx_src_prepare_restart(void); extern void imx_gpc_init(void); extern void imx_gpc_pre_suspend(void); extern void imx_gpc_post_resume(void); diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index ca5cf26..def5d30 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S @@ -9,19 +9,8 @@ * published by the Free Software Foundation. */ -/* Unused, we use CONFIG_MULTI_IRQ_HANDLER */ - .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - .endm - - .macro test_for_ipi, irqnr, irqstat, base, tmp - .endm diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index 97b19e7..2b7c08d 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -12,8 +12,6 @@ #ifndef __MACH_MX1_H__ #define __MACH_MX1_H__ -#include <mach/vmalloc.h> - /* * Memory map */ diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index b9895d2..13ad0df 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h @@ -22,6 +22,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -void arch_reset(char mode, const char *cmd); - #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index 88fd404..477971b 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h @@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) case MACH_TYPE_PCM043: case MACH_TYPE_LILLY1131: case MACH_TYPE_VPR200: + case MACH_TYPE_EUKREA_CPUIMX35SD: uart_base = MX3X_UART1_BASE_ADDR; break; case MACH_TYPE_MAGX_ZN5: diff --git a/arch/arm/plat-mxc/include/mach/vmalloc.h b/arch/arm/plat-mxc/include/mach/vmalloc.h deleted file mode 100644 index ef6379c..0000000 --- a/arch/arm/plat-mxc/include/mach/vmalloc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2000 Russell King. - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MXC_VMALLOC_H__ -#define __ASM_ARCH_MXC_VMALLOC_H__ - -/* vmalloc ending address */ -#define VMALLOC_END 0xf4000000UL - -#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */ diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 845de59..e032717 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c @@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) do_div(c, period_ns); duty_cycles = c; + /* + * according to imx pwm RM, the real period value should be + * PERIOD value in PWMPR plus 2. + */ + if (period_cycles > 2) + period_cycles -= 2; + else + period_cycles = 0; + writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); writel(period_cycles, pwm->mmio_base + MX3_PWMPR); diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c index d65fb31..3599bf2 100644 --- a/arch/arm/plat-mxc/system.c +++ b/arch/arm/plat-mxc/system.c @@ -37,17 +37,10 @@ static void __iomem *wdog_base; /* * Reset the system. It is called by machine_restart(). */ -void arch_reset(char mode, const char *cmd) +void mxc_restart(char mode, const char *cmd) { unsigned int wcr_enable; -#ifdef CONFIG_MACH_MX51_EFIKAMX - if (machine_is_mx51_efikamx()) { - mx51_efikamx_reset(); - return; - } -#endif - if (cpu_is_mx1()) { wcr_enable = (1 << 0); } else { @@ -71,7 +64,7 @@ void arch_reset(char mode, const char *cmd) mdelay(50); /* we'll take a jump through zero as a poor second */ - cpu_reset(0); + soft_restart(0); } void mxc_arch_reset_init(void __iomem *base) diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index 4b0fe28..1c96cdb 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c @@ -108,18 +108,9 @@ static void gpt_irq_acknowledge(void) static void __iomem *sched_clock_reg; -static DEFINE_CLOCK_DATA(cd); -unsigned long long notrace sched_clock(void) +static u32 notrace mxc_read_sched_clock(void) { - cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; - - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace mxc_update_sched_clock(void) -{ - cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; - update_sched_clock(&cd, cyc, (u32)~0); + return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; } static int __init mxc_clocksource_init(struct clk *timer_clk) @@ -129,7 +120,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk) sched_clock_reg = reg; - init_sched_clock(&cd, mxc_update_sched_clock, 32, c); + setup_sched_clock(mxc_read_sched_clock, 32, c); return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32, clocksource_mmio_readl_up); } diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 30b6433..ad1b45b 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c @@ -17,7 +17,6 @@ #include <linux/clk.h> #include <linux/jiffies.h> #include <linux/err.h> -#include <linux/sched.h> #include <asm/mach/time.h> #include <asm/sched_clock.h> @@ -79,23 +78,12 @@ void __iomem *mtu_base; /* Assigned by machine code */ * local implementation which uses the clocksource to get some * better resolution when scheduling the kernel. */ -static DEFINE_CLOCK_DATA(cd); - -unsigned long long notrace sched_clock(void) +static u32 notrace nomadik_read_sched_clock(void) { - u32 cyc; - if (unlikely(!mtu_base)) return 0; - cyc = -readl(mtu_base + MTU_VAL(0)); - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - -static void notrace nomadik_update_sched_clock(void) -{ - u32 cyc = -readl(mtu_base + MTU_VAL(0)); - update_sched_clock(&cd, cyc, (u32)~0); + return -readl(mtu_base + MTU_VAL(0)); } #endif @@ -231,9 +219,11 @@ void __init nmdk_timer_init(void) rate, 200, 32, clocksource_mmio_readl_down)) pr_err("timer: failed to initialize clock source %s\n", "mtu_0"); + #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK - init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate); + setup_sched_clock(nomadik_read_sched_clock, 32, rate); #endif + /* Timer 1 is used for events */ clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 9852622..3df04d9 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -4,7 +4,7 @@ # Common support obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ - usb.o fb.o io.o counter_32k.o + usb.o fb.o counter_32k.o obj-m := obj-n := obj- := diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index d9f10a3..2ee6341 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -14,6 +14,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/dma-mapping.h> #include <linux/omapfb.h> #include <plat/common.h> @@ -66,3 +67,10 @@ void __init omap_reserve(void) omap_vram_reserve_sdram_memblock(); omap_dsp_reserve_sdram_memblock(); } + +void __init omap_init_consistent_dma_size(void) +{ +#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE + init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20); +#endif +} diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index a6cbb71..5f0f229 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -17,7 +17,6 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/io.h> -#include <linux/sched.h> #include <linux/clocksource.h> #include <asm/sched_clock.h> @@ -37,41 +36,9 @@ static void __iomem *timer_32k_base; #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410 -/* - * Returns current time from boot in nsecs. It's OK for this to wrap - * around for now, as it's just a relative time stamp. - */ -static DEFINE_CLOCK_DATA(cd); - -/* - * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60). - * This gives a resolution of about 30us and a wrap period of about 36hrs. - */ -#define SC_MULT 4000000000u -#define SC_SHIFT 17 - -static inline unsigned long long notrace _omap_32k_sched_clock(void) -{ - u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; - return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); -} - -#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER) -unsigned long long notrace sched_clock(void) -{ - return _omap_32k_sched_clock(); -} -#else -unsigned long long notrace omap_32k_sched_clock(void) -{ - return _omap_32k_sched_clock(); -} -#endif - -static void notrace omap_update_sched_clock(void) +static u32 notrace omap_32k_read_sched_clock(void) { - u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0; - update_sched_clock(&cd, cyc, (u32)~0); + return timer_32k_base ? __raw_readl(timer_32k_base) : 0; } /** @@ -147,8 +114,7 @@ int __init omap_init_clocksource_32k(void) clocksource_mmio_readl_up)) printk(err, "32k_counter"); - init_fixed_sched_clock(&cd, omap_update_sched_clock, 32, - 32768, SC_MULT, SC_SHIFT); + setup_sched_clock(omap_32k_read_sched_clock, 32, 32768); } return 0; } diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 3ff3e36..b4d7ec3 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -27,97 +27,14 @@ #ifndef __ARCH_ARM_MACH_OMAP_COMMON_H #define __ARCH_ARM_MACH_OMAP_COMMON_H -#include <linux/delay.h> - #include <plat/i2c.h> #include <plat/omap_hwmod.h> -struct sys_timer; - -extern void omap_map_common_io(void); -extern struct sys_timer omap1_timer; -extern struct sys_timer omap2_timer; -extern struct sys_timer omap3_timer; -extern struct sys_timer omap3_secure_timer; -extern struct sys_timer omap4_timer; -extern bool omap_32k_timer_init(void); extern int __init omap_init_clocksource_32k(void); -extern unsigned long long notrace omap_32k_sched_clock(void); extern void omap_reserve(void); - -void omap2420_init_early(void); -void omap2430_init_early(void); -void omap3430_init_early(void); -void omap35xx_init_early(void); -void omap3630_init_early(void); -void omap3_init_early(void); /* Do not use this one */ -void am35xx_init_early(void); -void ti816x_init_early(void); -void omap4430_init_early(void); - extern int omap_dss_reset(struct omap_hwmod *); void omap_sram_init(void); -/* - * IO bases for various OMAP processors - * Except the tap base, rest all the io bases - * listed are physical addresses. - */ -struct omap_globals { - u32 class; /* OMAP class to detect */ - void __iomem *tap; /* Control module ID code */ - void __iomem *sdrc; /* SDRAM Controller */ - void __iomem *sms; /* SDRAM Memory Scheduler */ - void __iomem *ctrl; /* System Control Module */ - void __iomem *ctrl_pad; /* PAD Control Module */ - void __iomem *prm; /* Power and Reset Management */ - void __iomem *cm; /* Clock Management */ - void __iomem *cm2; -}; - -void omap2_set_globals_242x(void); -void omap2_set_globals_243x(void); -void omap2_set_globals_3xxx(void); -void omap2_set_globals_443x(void); -void omap2_set_globals_ti816x(void); - -/* These get called from omap2_set_globals_xxxx(), do not call these */ -void omap2_set_globals_tap(struct omap_globals *); -void omap2_set_globals_sdrc(struct omap_globals *); -void omap2_set_globals_control(struct omap_globals *); -void omap2_set_globals_prcm(struct omap_globals *); - -void omap242x_map_io(void); -void omap243x_map_io(void); -void omap3_map_io(void); -void omap4_map_io(void); - - -/** - * omap_test_timeout - busy-loop, testing a condition - * @cond: condition to test until it evaluates to true - * @timeout: maximum number of microseconds in the timeout - * @index: loop index (integer) - * - * Loop waiting for @cond to become true or until at least @timeout - * microseconds have passed. To use, define some integer @index in the - * calling code. After running, if @index == @timeout, then the loop has - * timed out. - */ -#define omap_test_timeout(cond, timeout, index) \ -({ \ - for (index = 0; index < timeout; index++) { \ - if (cond) \ - break; \ - udelay(1); \ - } \ -}) - -extern struct device *omap2_get_mpuss_device(void); -extern struct device *omap2_get_iva_device(void); -extern struct device *omap2_get_l3_device(void); -extern struct device *omap4_get_dsp_device(void); - #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index 7f2969e..1234944 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h @@ -247,8 +247,6 @@ * NOTE: Please use ioremap + __raw_read/write where possible instead of these */ -void omap_ioremap_init(void); - extern u8 omap_readb(u32 pa); extern u16 omap_readw(u32 pa); extern u32 omap_readl(u32 pa); @@ -257,83 +255,9 @@ extern void omap_writew(u16 v, u32 pa); extern void omap_writel(u32 v, u32 pa); struct omap_sdrc_params; - -#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) -void omap7xx_map_io(void); -#else -static inline void omap_map_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP15XX -void omap15xx_map_io(void); -#else -static inline void omap15xx_map_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP16XX -void omap16xx_map_io(void); -#else -static inline void omap16xx_map_io(void) -{ -} -#endif - -void omap1_init_early(void); - -#ifdef CONFIG_SOC_OMAP2420 -extern void omap242x_map_common_io(void); -#else -static inline void omap242x_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_SOC_OMAP2430 -extern void omap243x_map_common_io(void); -#else -static inline void omap243x_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP3 -extern void omap34xx_map_common_io(void); -#else -static inline void omap34xx_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_SOC_OMAPTI816X -extern void omapti816x_map_common_io(void); -#else -static inline void omapti816x_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP4 -extern void omap44xx_map_common_io(void); -#else -static inline void omap44xx_map_common_io(void) -{ -} -#endif - -extern void omap2_init_common_infrastructure(void); extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1); -#define __arch_ioremap omap_ioremap -#define __arch_iounmap omap_iounmap - -void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type); -void omap_iounmap(volatile void __iomem *addr); - extern void __init omap_init_consistent_dma_size(void); #endif diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 6e5d3a0..2efd645 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -436,20 +436,6 @@ #define INTCPS_NR_MIR_REGS 3 #define INTCPS_NR_IRQS 96 -#ifndef __ASSEMBLY__ -extern void __iomem *omap_irq_base; -void omap1_init_irq(void); -void omap2_init_irq(void); -void omap3_init_irq(void); -void ti816x_init_irq(void); -extern int omap_irq_pending(void); -void omap_intc_save_context(void); -void omap_intc_restore_context(void); -void omap3_intc_suspend(void); -void omap3_intc_prepare_idle(void); -void omap3_intc_resume_idle(void); -#endif - #include <mach/hardware.h> #ifdef CONFIG_FIQ diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h index c5fa9e9..8e5ebd7 100644 --- a/arch/arm/plat-omap/include/plat/system.h +++ b/arch/arm/plat-omap/include/plat/system.h @@ -12,6 +12,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -extern void (*arch_reset)(char, const char *); - #endif diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c deleted file mode 100644 index 333871f..0000000 --- a/arch/arm/plat-omap/io.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Common io.c file - * This file is created by Russell King <rmk+kernel@arm.linux.org.uk> - * - * Copyright (C) 2009 Texas Instruments - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/module.h> -#include <linux/io.h> -#include <linux/mm.h> -#include <linux/dma-mapping.h> - -#include <plat/omap7xx.h> -#include <plat/omap1510.h> -#include <plat/omap16xx.h> -#include <plat/omap24xx.h> -#include <plat/omap34xx.h> -#include <plat/omap44xx.h> - -#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) -#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) - -static int initialized; - -/* - * Intercept ioremap() requests for addresses in our fixed mapping regions. - */ -void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) -{ - - WARN(!initialized, "Do not use ioremap before init_early\n"); - -#ifdef CONFIG_ARCH_OMAP1 - if (cpu_class_is_omap1()) { - if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) - return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT); - } - if (cpu_is_omap7xx()) { - if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE)) - return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START); - - if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE)) - return XLATE(p, OMAP7XX_DSPREG_BASE, - OMAP7XX_DSPREG_START); - } - if (cpu_is_omap15xx()) { - if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE)) - return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START); - - if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE)) - return XLATE(p, OMAP1510_DSPREG_BASE, - OMAP1510_DSPREG_START); - } - if (cpu_is_omap16xx()) { - if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE)) - return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START); - - if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE)) - return XLATE(p, OMAP16XX_DSPREG_BASE, - OMAP16XX_DSPREG_START); - } -#endif -#ifdef CONFIG_ARCH_OMAP2 - if (cpu_is_omap24xx()) { - if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE)) - return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT); - if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE)) - return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); - } - if (cpu_is_omap2420()) { - if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE)) - return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT); - if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE)) - return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE); - if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE)) - return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT); - } - if (cpu_is_omap2430()) { - if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) - return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT); - if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE)) - return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT); - if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE)) - return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT); - if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE)) - return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT); - } -#endif -#ifdef CONFIG_ARCH_OMAP3 - if (cpu_is_ti816x()) { - if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) - return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT); - } else if (cpu_is_omap34xx()) { - if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE)) - return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT); - if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) - return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT); - if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE)) - return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT); - if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE)) - return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT); - if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE)) - return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT); - if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE)) - return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT); - if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE)) - return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT); - } -#endif -#ifdef CONFIG_ARCH_OMAP4 - if (cpu_is_omap44xx()) { - if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE)) - return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT); - if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE)) - return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT); - if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE)) - return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT); - if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE)) - return XLATE(p, OMAP44XX_EMIF1_PHYS, \ - OMAP44XX_EMIF1_VIRT); - if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE)) - return XLATE(p, OMAP44XX_EMIF2_PHYS, \ - OMAP44XX_EMIF2_VIRT); - if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE)) - return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT); - if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE)) - return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT); - if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE)) - return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT); - } -#endif - return __arm_ioremap_caller(p, size, type, __builtin_return_address(0)); -} -EXPORT_SYMBOL(omap_ioremap); - -void omap_iounmap(volatile void __iomem *addr) -{ - unsigned long virt = (unsigned long)addr; - - if (virt >= VMALLOC_START && virt < VMALLOC_END) - __iounmap(addr); -} -EXPORT_SYMBOL(omap_iounmap); - -void __init omap_init_consistent_dma_size(void) -{ -#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE - init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20); -#endif -} - -void __init omap_ioremap_init(void) -{ - initialized++; -} diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index 41ab97e..10d1608 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio, struct orion_gpio_chip *ochip; struct irq_chip_generic *gc; struct irq_chip_type *ct; + char gc_label[16]; if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips)) return; + snprintf(gc_label, sizeof(gc_label), "orion_gpio%d", + orion_gpio_chip_count); + ochip = orion_gpio_chips + orion_gpio_chip_count; - ochip->chip.label = "orion_gpio"; + ochip->chip.label = kstrdup(gc_label, GFP_KERNEL); ochip->chip.request = orion_gpio_request; ochip->chip.direction_input = orion_gpio_direction_input; ochip->chip.get = orion_gpio_get; diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 69a6136..1ed8d13 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c @@ -12,7 +12,6 @@ */ #include <linux/kernel.h> -#include <linux/sched.h> #include <linux/timer.h> #include <linux/clockchips.h> #include <linux/interrupt.h> @@ -60,24 +59,10 @@ static u32 ticks_per_jiffy; * Orion's sched_clock implementation. It has a resolution of * at least 7.5ns (133MHz TCLK). */ -static DEFINE_CLOCK_DATA(cd); -unsigned long long notrace sched_clock(void) +static u32 notrace orion_read_sched_clock(void) { - u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF); - return cyc_to_sched_clock(&cd, cyc, (u32)~0); -} - - -static void notrace orion_update_sched_clock(void) -{ - u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF); - update_sched_clock(&cd, cyc, (u32)~0); -} - -static void __init setup_sched_clock(unsigned long tclk) -{ - init_sched_clock(&cd, orion_update_sched_clock, 32, tclk); + return ~readl(timer_base + TIMER0_VAL_OFF); } /* @@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask, /* * Set scale and timer for sched_clock. */ - setup_sched_clock(tclk); + setup_sched_clock(orion_read_sched_clock, 32, tclk); /* * Setup free-running clocksource timer (interrupts diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 3c63353..1121df1 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void) return __raw_readl(S3C2410_GSTATUS1); } -/* Hook for arm_pm_restart to ensure we execute the reset code - * with the caches enabled. It seems at least the S3C2440 has a problem - * resetting if there is bus activity interrupted by the reset. - */ -static void s3c24xx_pm_restart(char mode, const char *cmd) -{ - if (mode != 's') { - unsigned long flags; - - local_irq_save(flags); - __cpuc_flush_kern_all(); - __cpuc_flush_user_all(); - - arch_reset(mode, cmd); - local_irq_restore(flags); - } - - /* fallback, or unhandled */ - arm_machine_restart(mode, cmd); -} - void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) { /* initialise the io descriptors we need for initialisation */ @@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) } s3c24xx_init_cpu(); - arm_pm_restart = s3c24xx_pm_restart; - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); } diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 53754bcf..9fe3534 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -1437,11 +1437,10 @@ int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel) size_t map_sz = sizeof(*nmap) * sel->map_size; int ptr; - nmap = kmalloc(map_sz, GFP_KERNEL); + nmap = kmemdup(sel->map, map_sz, GFP_KERNEL); if (nmap == NULL) return -ENOMEM; - memcpy(nmap, sel->map, map_sz); memcpy(&dma_sel, sel, sizeof(*sel)); dma_sel.map = nmap; diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 9b9968f..8167ce6 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig @@ -11,6 +11,7 @@ config PLAT_S5P default y select ARM_VIC if !ARCH_EXYNOS4 select ARM_GIC if ARCH_EXYNOS4 + select GIC_NON_BANKED if ARCH_EXYNOS4 select NO_IOPORT select ARCH_REQUIRE_GPIOLIB select S3C_GPIO_TRACK diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index 8763440..30d8c30 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile @@ -13,7 +13,6 @@ obj- := # Core files obj-y += dev-uart.o -obj-y += cpu.o obj-y += clock.o obj-y += irq.o obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c deleted file mode 100644 index a56959e..0000000 --- a/arch/arm/plat-s5p/cpu.c +++ /dev/null @@ -1,144 +0,0 @@ -/* linux/arch/arm/plat-s5p/cpu.c - * - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P CPU Support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/cpu.h> -#include <plat/s5p6440.h> -#include <plat/s5p6450.h> -#include <plat/s5pc100.h> -#include <plat/s5pv210.h> -#include <plat/exynos4.h> - -/* table of supported CPUs */ - -static const char name_s5p6440[] = "S5P6440"; -static const char name_s5p6450[] = "S5P6450"; -static const char name_s5pc100[] = "S5PC100"; -static const char name_s5pv210[] = "S5PV210/S5PC110"; -static const char name_exynos4210[] = "EXYNOS4210"; -static const char name_exynos4212[] = "EXYNOS4212"; -static const char name_exynos4412[] = "EXYNOS4412"; - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = S5P6440_CPU_ID, - .idmask = S5P64XX_CPU_MASK, - .map_io = s5p6440_map_io, - .init_clocks = s5p6440_init_clocks, - .init_uarts = s5p6440_init_uarts, - .init = s5p64x0_init, - .name = name_s5p6440, - }, { - .idcode = S5P6450_CPU_ID, - .idmask = S5P64XX_CPU_MASK, - .map_io = s5p6450_map_io, - .init_clocks = s5p6450_init_clocks, - .init_uarts = s5p6450_init_uarts, - .init = s5p64x0_init, - .name = name_s5p6450, - }, { - .idcode = S5PC100_CPU_ID, - .idmask = S5PC100_CPU_MASK, - .map_io = s5pc100_map_io, - .init_clocks = s5pc100_init_clocks, - .init_uarts = s5pc100_init_uarts, - .init = s5pc100_init, - .name = name_s5pc100, - }, { - .idcode = S5PV210_CPU_ID, - .idmask = S5PV210_CPU_MASK, - .map_io = s5pv210_map_io, - .init_clocks = s5pv210_init_clocks, - .init_uarts = s5pv210_init_uarts, - .init = s5pv210_init, - .name = name_s5pv210, - }, { - .idcode = EXYNOS4210_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init_clocks = exynos4_init_clocks, - .init_uarts = exynos4_init_uarts, - .init = exynos_init, - .name = name_exynos4210, - }, { - .idcode = EXYNOS4212_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init_clocks = exynos4_init_clocks, - .init_uarts = exynos4_init_uarts, - .init = exynos_init, - .name = name_exynos4212, - }, { - .idcode = EXYNOS4412_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init_clocks = exynos4_init_clocks, - .init_uarts = exynos4_init_uarts, - .init = exynos_init, - .name = name_exynos4412, - }, -}; - -/* minimal IO mapping */ - -static struct map_desc s5p_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_CHIPID, - .pfn = __phys_to_pfn(S5P_PA_CHIPID), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(S5P_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(S5P_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(S3C_PA_WDT), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5P_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -/* read cpu identification code */ - -void __init s5p_init_io(struct map_desc *mach_desc, - int size, void __iomem *cpuid_addr) -{ - /* initialize the io descriptors we need for initialization */ - iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc)); - if (mach_desc) - iotable_init(mach_desc, size); - - /* detect cpu id and rev. */ - s5p_init_cpu(cpuid_addr); - - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); -} diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c index c833e7b..17c0a2c 100644 --- a/arch/arm/plat-s5p/s5p-time.c +++ b/arch/arm/plat-s5p/s5p-time.c @@ -10,7 +10,6 @@ * published by the Free Software Foundation. */ -#include <linux/sched.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/err.h> @@ -321,26 +320,14 @@ static void __iomem *s5p_timer_reg(void) * this wraps around for now, since it is just a relative time * stamp. (Inspired by U300 implementation.) */ -static DEFINE_CLOCK_DATA(cd); - -unsigned long long notrace sched_clock(void) +static u32 notrace s5p_read_sched_clock(void) { void __iomem *reg = s5p_timer_reg(); if (!reg) return 0; - return cyc_to_sched_clock(&cd, ~__raw_readl(reg), (u32)~0); -} - -static void notrace s5p_update_sched_clock(void) -{ - void __iomem *reg = s5p_timer_reg(); - - if (!reg) - return; - - update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0); + return ~__raw_readl(reg); } static void __init s5p_clocksource_init(void) @@ -358,7 +345,7 @@ static void __init s5p_clocksource_init(void) s5p_time_setup(timer_source.source_id, TCNT_MAX); s5p_time_start(timer_source.source_id, PERIODIC); - init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); + setup_sched_clock(s5p_read_sched_clock, 32, clock_rate); if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer", clock_rate, 250, 32, clocksource_mmio_readl_down)) diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h index dac4760..95509d8 100644 --- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h @@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); -extern void s3c2410_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - -extern void s3c2412_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS #define s3c_cpufreq_debugfs_call(x) x #else @@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); #ifdef CONFIG_S3C2410_IOTIMING +extern void s3c2410_iotiming_debugfs(struct seq_file *seq, + struct s3c_cpufreq_config *cfg, + union s3c_iobank *iob); + extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *iot); @@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *iot); #else +#define s3c2410_iotiming_debugfs NULL #define s3c2410_iotiming_calc NULL #define s3c2410_iotiming_get NULL #define s3c2410_iotiming_set NULL @@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, /* S3C2412 compatible routines */ -extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); +#ifdef CONFIG_S3C2412_IOTIMING +extern void s3c2412_iotiming_debugfs(struct seq_file *seq, + struct s3c_cpufreq_config *cfg, + union s3c_iobank *iob); extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *timings); @@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, struct s3c_iotimings *iot); +#else +#define s3c2412_iotiming_debugfs NULL +#define s3c2412_iotiming_calc NULL +#define s3c2412_iotiming_get NULL +#define s3c2412_iotiming_set NULL +#endif /* CONFIG_S3C2412_IOTIMING */ #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG #define s3c_freq_dbg(x...) printk(KERN_INFO x) diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 40fd7b6..258d9d8 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -152,13 +152,9 @@ extern void s3c_init_cpu(unsigned long idcode, /* core initialisation functions */ extern void s3c24xx_init_irq(void); -extern void s3c64xx_init_irq(u32 vic0, u32 vic1); extern void s5p_init_irq(u32 *vic, u32 num_vic); extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); -extern void s3c64xx_init_io(struct map_desc *mach_desc, int size); -extern void s5p_init_io(struct map_desc *mach_desc, - int size, void __iomem *cpuid_addr); extern void s3c24xx_init_cpu(void); extern void s3c64xx_init_cpu(void); @@ -183,7 +179,6 @@ extern struct syscore_ops s3c2410_pm_syscore_ops; extern struct syscore_ops s3c2412_pm_syscore_ops; extern struct syscore_ops s3c2416_pm_syscore_ops; extern struct syscore_ops s3c244x_pm_syscore_ops; -extern struct syscore_ops s3c64xx_irq_syscore_ops; /* system device classes */ @@ -195,7 +190,6 @@ extern struct sysdev_class s3c2440_sysclass; extern struct sysdev_class s3c2442_sysclass; extern struct sysdev_class s3c2443_sysclass; extern struct sysdev_class s3c6410_sysclass; -extern struct sysdev_class s3c64xx_sysclass; extern struct sysdev_class s5p64x0_sysclass; extern struct sysdev_class s5pv210_sysclass; extern struct sysdev_class exynos4_sysclass; diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h deleted file mode 100644 index f546e88..0000000 --- a/arch/arm/plat-samsung/include/plat/exynos4.h +++ /dev/null @@ -1,35 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/exynos4.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for exynos4 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* Common init code for EXYNOS4 related SoCs */ - -extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void exynos4_register_clocks(void); -extern void exynos4210_register_clocks(void); -extern void exynos4212_register_clocks(void); -extern void exynos4_setup_clocks(void); - -#ifdef CONFIG_ARCH_EXYNOS -extern int exynos_init(void); -extern void exynos4_init_irq(void); -extern void exynos4_map_io(void); -extern void exynos4_init_clocks(int xtal); -extern struct sys_timer exynos4_timer; - -#define exynos4_init_uarts exynos4_common_init_uarts - -#else -#define exynos4_init_clocks NULL -#define exynos4_init_uarts NULL -#define exynos4_map_io NULL -#define exynos_init NULL -#endif diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h deleted file mode 100644 index 32ca517..0000000 --- a/arch/arm/plat-samsung/include/plat/reset.h +++ /dev/null @@ -1,16 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/reset.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_SAMSUNG_RESET_H -#define __PLAT_SAMSUNG_RESET_H __FILE__ - -extern void (*s5p_reset_hook)(void); - -#endif /* __PLAT_SAMSUNG_RESET_H */ diff --git a/arch/arm/plat-samsung/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h index 5bcfd14..cbae50d 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2412.h +++ b/arch/arm/plat-samsung/include/plat/s3c2412.h @@ -21,9 +21,12 @@ extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void s3c2412_init_clocks(int xtal); extern int s3c2412_baseclk_add(void); + +extern void s3c2412_restart(char mode, const char *cmd); #else #define s3c2412_init_clocks NULL #define s3c2412_init_uarts NULL #define s3c2412_map_io NULL #define s3c2412_init NULL +#define s3c2412_restart NULL #endif diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h index a764f85..de2b5bd 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2416.h +++ b/arch/arm/plat-samsung/include/plat/s3c2416.h @@ -23,9 +23,11 @@ extern void s3c2416_init_clocks(int xtal); extern int s3c2416_baseclk_add(void); +extern void s3c2416_restart(char mode, const char *cmd); #else #define s3c2416_init_clocks NULL #define s3c2416_init_uarts NULL #define s3c2416_map_io NULL #define s3c2416_init NULL +#define s3c2416_restart NULL #endif diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h index 7fae1a0..dce05b4 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2443.h +++ b/arch/arm/plat-samsung/include/plat/s3c2443.h @@ -24,11 +24,13 @@ extern void s3c2443_init_clocks(int xtal); extern int s3c2443_baseclk_add(void); +extern void s3c2443_restart(char mode, const char *cmd); #else #define s3c2443_init_clocks NULL #define s3c2443_init_uarts NULL #define s3c2443_map_io NULL #define s3c2443_init NULL +#define s3c2443_restart NULL #endif /* common code used by s3c2443 and others. diff --git a/arch/arm/plat-samsung/include/plat/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h deleted file mode 100644 index 37d428a..0000000 --- a/arch/arm/plat-samsung/include/plat/s3c6400.h +++ /dev/null @@ -1,36 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s3c6400.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * Header file for s3c6400 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* Common init code for S3C6400 related SoCs */ - -extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c6400_setup_clocks(void); - -extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); - -#ifdef CONFIG_CPU_S3C6400 - -extern int s3c6400_init(void); -extern void s3c6400_init_irq(void); -extern void s3c6400_map_io(void); -extern void s3c6400_init_clocks(int xtal); - -#define s3c6400_init_uarts s3c6400_common_init_uarts - -#else -#define s3c6400_init_clocks NULL -#define s3c6400_init_uarts NULL -#define s3c6400_map_io NULL -#define s3c6400_init NULL -#endif diff --git a/arch/arm/plat-samsung/include/plat/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h deleted file mode 100644 index 20a6675..0000000 --- a/arch/arm/plat-samsung/include/plat/s3c6410.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s3c6410.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * Header file for s3c6410 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifdef CONFIG_CPU_S3C6410 - -extern int s3c6410_init(void); -extern void s3c6410_init_irq(void); -extern void s3c6410_map_io(void); -extern void s3c6410_init_clocks(int xtal); - -#define s3c6410_init_uarts s3c6400_common_init_uarts - -#else -#define s3c6410_init_clocks NULL -#define s3c6410_init_uarts NULL -#define s3c6410_map_io NULL -#define s3c6410_init NULL -#endif diff --git a/arch/arm/plat-samsung/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h deleted file mode 100644 index bf85ebb..0000000 --- a/arch/arm/plat-samsung/include/plat/s5p6440.h +++ /dev/null @@ -1,36 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s5p6440.h - * - * Copyright (c) 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Header file for s5p6440 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - /* Common init code for S5P6440 related SoCs */ - -extern void s5p6440_register_clocks(void); -extern void s5p6440_setup_clocks(void); - -#ifdef CONFIG_CPU_S5P6440 - -extern int s5p64x0_init(void); -extern void s5p6440_init_irq(void); -extern void s5p6440_map_io(void); -extern void s5p6440_init_clocks(int xtal); - -extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -#else -#define s5p6440_init_clocks NULL -#define s5p6440_init_uarts NULL -#define s5p6440_map_io NULL -#define s5p64x0_init NULL -#endif - -/* S5P6440 timer */ - -extern struct sys_timer s5p6440_timer; diff --git a/arch/arm/plat-samsung/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h deleted file mode 100644 index da25f9a..0000000 --- a/arch/arm/plat-samsung/include/plat/s5p6450.h +++ /dev/null @@ -1,36 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s5p6450.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for s5p6450 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* Common init code for S5P6450 related SoCs */ - -extern void s5p6450_register_clocks(void); -extern void s5p6450_setup_clocks(void); - -#ifdef CONFIG_CPU_S5P6450 - -extern int s5p64x0_init(void); -extern void s5p6450_init_irq(void); -extern void s5p6450_map_io(void); -extern void s5p6450_init_clocks(int xtal); - -extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -#else -#define s5p6450_init_clocks NULL -#define s5p6450_init_uarts NULL -#define s5p6450_map_io NULL -#define s5p64x0_init NULL -#endif - -/* S5P6450 timer */ - -extern struct sys_timer s5p6450_timer; diff --git a/arch/arm/plat-samsung/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h deleted file mode 100644 index 9a21aea..0000000 --- a/arch/arm/plat-samsung/include/plat/s5pc100.h +++ /dev/null @@ -1,33 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s5pc100.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Header file for s5pc100 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* Common init code for S5PC100 related SoCs */ - -extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s5pc100_register_clocks(void); -extern void s5pc100_setup_clocks(void); - -#ifdef CONFIG_CPU_S5PC100 - -extern int s5pc100_init(void); -extern void s5pc100_init_irq(void); -extern void s5pc100_map_io(void); -extern void s5pc100_init_clocks(int xtal); - -#define s5pc100_init_uarts s5pc100_common_init_uarts - -#else -#define s5pc100_init_clocks NULL -#define s5pc100_init_uarts NULL -#define s5pc100_map_io NULL -#define s5pc100_init NULL -#endif diff --git a/arch/arm/plat-samsung/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h deleted file mode 100644 index b4bc6be7..0000000 --- a/arch/arm/plat-samsung/include/plat/s5pv210.h +++ /dev/null @@ -1,33 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s5pv210.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Header file for s5pv210 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* Common init code for S5PV210 related SoCs */ - -extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s5pv210_register_clocks(void); -extern void s5pv210_setup_clocks(void); - -#ifdef CONFIG_CPU_S5PV210 - -extern int s5pv210_init(void); -extern void s5pv210_init_irq(void); -extern void s5pv210_map_io(void); -extern void s5pv210_init_clocks(int xtal); - -#define s5pv210_init_uarts s5pv210_common_init_uarts - -#else -#define s5pv210_init_clocks NULL -#define s5pv210_init_uarts NULL -#define s5pv210_map_io NULL -#define s5pv210_init NULL -#endif diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h deleted file mode 100644 index a448e990..0000000 --- a/arch/arm/plat-samsung/include/plat/system-reset.h +++ /dev/null @@ -1,31 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/system-reset.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h - * - * S5P - System define for arch_reset() - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <plat/watchdog-reset.h> - -void (*s5p_reset_hook)(void); - -static void arch_reset(char mode, const char *cmd) -{ - /* SWRESET support in s5p_reset_hook() */ - - if (s5p_reset_hook) - s5p_reset_hook(); - - /* Perform reset using Watchdog reset - * if there is no s5p_reset_hook() - */ - - arch_wdt_reset(); -} diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h index 40dbb2b..f19aff1 100644 --- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h +++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h @@ -17,6 +17,7 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/io.h> +#include <linux/delay.h> static inline void arch_wdt_reset(void) { diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile index b4f340b..e0f2e5b 100644 --- a/arch/arm/plat-spear/Makefile +++ b/arch/arm/plat-spear/Makefile @@ -3,6 +3,6 @@ # # Common support -obj-y := clock.o time.o +obj-y := clock.o restart.o time.o obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h index a235fa0..86c6f83 100644 --- a/arch/arm/plat-spear/include/plat/system.h +++ b/arch/arm/plat-spear/include/plat/system.h @@ -14,10 +14,6 @@ #ifndef __PLAT_SYSTEM_H #define __PLAT_SYSTEM_H -#include <linux/io.h> -#include <asm/hardware/sp810.h> -#include <mach/hardware.h> - static inline void arch_idle(void) { /* @@ -27,15 +23,4 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) -{ - if (mode == 's') { - /* software reset, Jump into ROM at address 0 */ - cpu_reset(0); - } else { - /* hardware reset, Use on-chip reset capability */ - sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); - } -} - #endif /* __PLAT_SYSTEM_H */ diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h deleted file mode 100644 index 8c8b24d..0000000 --- a/arch/arm/plat-spear/include/plat/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/vmalloc.h - * - * Defining Vmalloc area for SPEAr platform - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar<viresh.kumar@st.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __PLAT_VMALLOC_H -#define __PLAT_VMALLOC_H - -#define VMALLOC_END 0xF0000000UL - -#endif /* __PLAT_VMALLOC_H */ diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c new file mode 100644 index 0000000..2b4e3d8 --- /dev/null +++ b/arch/arm/plat-spear/restart.c @@ -0,0 +1,27 @@ +/* + * arch/arm/plat-spear/restart.c + * + * SPEAr platform specific restart functions + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar<viresh.kumar@st.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <linux/io.h> +#include <asm/hardware/sp810.h> +#include <mach/hardware.h> +#include <mach/generic.h> + +void spear_restart(char mode, const char *cmd) +{ + if (mode == 's') { + /* software reset, Jump into ROM at address 0 */ + soft_restart(0); + } else { + /* hardware reset, Use on-chip reset capability */ + sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); + } +} diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig deleted file mode 100644 index 1bf4995..0000000 --- a/arch/arm/plat-tcc/Kconfig +++ /dev/null @@ -1,20 +0,0 @@ -if ARCH_TCC_926 - -menu "Telechips ARM926-based CPUs" - -choice - prompt "Telechips CPU type:" - default ARCH_TCC8K - -config ARCH_TCC8K - bool TCC8000 - select USB_ARCH_HAS_OHCI - help - Support for Telechips TCC8000 systems - -endchoice - -source "arch/arm/mach-tcc8k/Kconfig" - -endmenu -endif diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile deleted file mode 100644 index eceabc8..0000000 --- a/arch/arm/plat-tcc/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -# "Telechips Platform Common Modules" - -obj-y := clock.o system.o diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c deleted file mode 100644 index f3ced10..0000000 --- a/arch/arm/plat-tcc/clock.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * Clock framework for Telechips SoCs - * Based on arch/arm/plat-mxc/clock.c - * - * Copyright (C) 2004 - 2005 Nokia corporation - * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> - * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> - * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * Copyright 2010 Hans J. Koch, hjk@linutronix.de - * - * Licensed under the terms of the GPL v2. - */ - -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/errno.h> -#include <linux/module.h> -#include <linux/mutex.h> -#include <linux/string.h> - -#include <mach/clock.h> -#include <mach/hardware.h> - -static DEFINE_MUTEX(clocks_mutex); - -/*------------------------------------------------------------------------- - * Standard clock functions defined in include/linux/clk.h - *-------------------------------------------------------------------------*/ - -static void __clk_disable(struct clk *clk) -{ - BUG_ON(clk->refcount == 0); - - if (!(--clk->refcount) && clk->disable) { - /* Unconditionally disable the clock in hardware */ - clk->disable(clk); - /* recursively disable parents */ - if (clk->parent) - __clk_disable(clk->parent); - } -} - -static int __clk_enable(struct clk *clk) -{ - int ret = 0; - - if (clk->refcount++ == 0 && clk->enable) { - if (clk->parent) - ret = __clk_enable(clk->parent); - if (ret) - return ret; - else - return clk->enable(clk); - } - - return 0; -} - -/* This function increments the reference count on the clock and enables the - * clock if not already enabled. The parent clock tree is recursively enabled - */ -int clk_enable(struct clk *clk) -{ - int ret = 0; - - if (!clk) - return -EINVAL; - - mutex_lock(&clocks_mutex); - ret = __clk_enable(clk); - mutex_unlock(&clocks_mutex); - - return ret; -} -EXPORT_SYMBOL_GPL(clk_enable); - -/* This function decrements the reference count on the clock and disables - * the clock when reference count is 0. The parent clock tree is - * recursively disabled - */ -void clk_disable(struct clk *clk) -{ - if (!clk) - return; - - mutex_lock(&clocks_mutex); - __clk_disable(clk); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL_GPL(clk_disable); - -/* Retrieve the *current* clock rate. If the clock itself - * does not provide a special calculation routine, ask - * its parent and so on, until one is able to return - * a valid clock rate - */ -unsigned long clk_get_rate(struct clk *clk) -{ - if (!clk) - return 0UL; - - if (clk->get_rate) - return clk->get_rate(clk); - - return clk_get_rate(clk->parent); -} -EXPORT_SYMBOL_GPL(clk_get_rate); - -/* Round the requested clock rate to the nearest supported - * rate that is less than or equal to the requested rate. - * This is dependent on the clock's current parent. - */ -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - if (!clk) - return 0; - if (!clk->round_rate) - return 0; - - return clk->round_rate(clk, rate); -} -EXPORT_SYMBOL_GPL(clk_round_rate); - -/* Set the clock to the requested clock rate. The rate must - * match a supported rate exactly based on what clk_round_rate returns - */ -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - int ret = -EINVAL; - - if (!clk) - return ret; - if (!clk->set_rate || !rate) - return ret; - - mutex_lock(&clocks_mutex); - ret = clk->set_rate(clk, rate); - mutex_unlock(&clocks_mutex); - - return ret; -} -EXPORT_SYMBOL_GPL(clk_set_rate); - -/* Set the clock's parent to another clock source */ -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - struct clk *old; - int ret = -EINVAL; - - if (!clk) - return ret; - if (!clk->set_parent || !parent) - return ret; - - mutex_lock(&clocks_mutex); - old = clk->parent; - if (clk->refcount) - __clk_enable(parent); - ret = clk->set_parent(clk, parent); - if (ret) - old = parent; - if (clk->refcount) - __clk_disable(old); - mutex_unlock(&clocks_mutex); - - return ret; -} -EXPORT_SYMBOL_GPL(clk_set_parent); - -/* Retrieve the clock's parent clock source */ -struct clk *clk_get_parent(struct clk *clk) -{ - if (!clk) - return NULL; - - return clk->parent; -} -EXPORT_SYMBOL_GPL(clk_get_parent); diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h deleted file mode 100644 index a12f58a..0000000 --- a/arch/arm/plat-tcc/include/mach/clock.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Low level clock header file for Telechips TCC architecture - * (C) 2010 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the GPL v2. - */ - -#ifndef __ASM_ARCH_TCC_CLOCK_H__ -#define __ASM_ARCH_TCC_CLOCK_H__ - -#ifndef __ASSEMBLY__ - -struct clk { - struct clk *parent; - /* id number of a root clock, 0 for normal clocks */ - int root_id; - /* Reference count of clock enable/disable */ - int refcount; - /* Address of associated BCLKCTRx register. Must be set. */ - void __iomem *bclkctr; - /* Bit position for BCLKCTRx. Must be set. */ - int bclk_shift; - /* Address of ACLKxxx register, if any. */ - void __iomem *aclkreg; - /* get the current clock rate (always a fresh value) */ - unsigned long (*get_rate) (struct clk *); - /* Function ptr to set the clock to a new rate. The rate must match a - supported rate returned from round_rate. Leave blank if clock is not - programmable */ - int (*set_rate) (struct clk *, unsigned long); - /* Function ptr to round the requested clock rate to the nearest - supported rate that is less than or equal to the requested rate. */ - unsigned long (*round_rate) (struct clk *, unsigned long); - /* Function ptr to enable the clock. Leave blank if clock can not - be gated. */ - int (*enable) (struct clk *); - /* Function ptr to disable the clock. Leave blank if clock can not - be gated. */ - void (*disable) (struct clk *); - /* Function ptr to set the parent clock of the clock. */ - int (*set_parent) (struct clk *, struct clk *); -}; - -int clk_register(struct clk *clk); -void clk_unregister(struct clk *clk); - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARCH_MXC_CLOCK_H__ */ diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S deleted file mode 100644 index cf17d04..0000000 --- a/arch/arm/plat-tcc/include/mach/debug-macro.S +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 1994-1999 Russell King - * Copyright (C) 2008-2009 Telechips - * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - - .macro addruart, rp, rv, tmp - moveq \rp, #0x90000000 @ physical base address - movne \rv, #0xF1000000 @ virtual base - orr \rp, \rp, #0x00007000 @ UART0 - orr \rv, \rv, #0x00007000 @ UART0 - .endm - - .macro senduart,rd,rx - strb \rd, [\rx, #0x44] - .endm - - .macro waituart,rd,rx - .endm - - .macro busyuart,rd,rx -1001: - ldr \rd, [\rx, #0x14] - tst \rd, #0x20 - - beq 1001b - .endm diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S deleted file mode 100644 index 748f401..0000000 --- a/arch/arm/plat-tcc/include/mach/entry-macro.S +++ /dev/null @@ -1,68 +0,0 @@ -/* - * include/asm-arm/arch-tcc83x/entry-macro.S - * - * Author : <linux@telechips.com> - * Created: June 10, 2008 - * Description: Low-level IRQ helper macros for Telechips-based platforms - * - * Copyright (C) 2008-2009 Telechips - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include <mach/hardware.h> -#include <mach/irqs.h> - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - ldr \base, =0xF2003000 @ base address of PIC registers - - @@ read MREQ register of PIC0 - - mov \irqnr, #0 - ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts - cmp \irqstat, #0 - bne 1001f - - @@ read MREQ register of PIC1 - - ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts - cmp \irqstat, #0 - beq 1002f - mov \irqnr, #0x20 - -1001: - movs \tmp, \irqstat, lsl #16 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #16 - - movs \tmp, \irqstat, lsl #8 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #8 - - movs \tmp, \irqstat, lsl #4 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #4 - - movs \tmp, \irqstat, lsl #2 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #2 - - movs \tmp, \irqstat, lsl #1 - addeq \irqnr, \irqnr, #1 - orrs \base, \base, #1 -1002: - @@ exit here, Z flag unset if IRQ - - .endm diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h deleted file mode 100644 index e70d126..0000000 --- a/arch/arm/plat-tcc/include/mach/hardware.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com> - * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com> - * and Dirk Behme <dirk.behme@de.bosch.com> - * Rewritten by: <linux@telechips.com> - * Description: Hardware definitions for TCC8300 processors and boards - * - * Copyright (C) 2001 RidgeRun, Inc. - * Copyright (C) 2008-2009 Telechips - * - * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GNU Pulic License version 2. - */ - -#ifndef __ASM_ARCH_TCC_HARDWARE_H -#define __ASM_ARCH_TCC_HARDWARE_H - -#include <asm/sizes.h> -#ifndef __ASSEMBLER__ -#include <asm/types.h> -#endif -#include <mach/io.h> - -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_BASE 0xfffece00 -#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) -#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) -#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) -#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) -#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) -#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) -#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) -#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -/* DPLL control registers */ -#define DPLL_CTL 0xfffecf00 - -#endif /* __ASM_ARCH_TCC_HARDWARE_H */ diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h deleted file mode 100644 index 3e911d3..0000000 --- a/arch/arm/plat-tcc/include/mach/io.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * IO definitions for TCC8000 processors and boards - * - * Copyright (C) 1997-1999 Russell King - * Copyright (C) 2008-2009 Telechips - * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GNU Public License version 2. - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h deleted file mode 100644 index da86389..0000000 --- a/arch/arm/plat-tcc/include/mach/irqs.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * IRQ definitions for TCC8xxx - * - * Copyright (C) 2008-2009 Telechips - * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GPL v2. - * - */ - -#ifndef __ASM_ARCH_TCC_IRQS_H -#define __ASM_ARCH_TCC_IRQS_H - -#define NR_IRQS 64 - -/* PIC0 interrupts */ -#define INT_ADMA1 0 -#define INT_BDMA 1 -#define INT_ADMA0 2 -#define INT_GDMA1 3 -#define INT_I2S0RX 4 -#define INT_I2S0TX 5 -#define INT_TC 6 -#define INT_UART0 7 -#define INT_USBD 8 -#define INT_SPI0TX 9 -#define INT_UDMA 10 -#define INT_LIRQ 11 -#define INT_GDMA2 12 -#define INT_GDMA0 13 -#define INT_TC32 14 -#define INT_LCD 15 -#define INT_ADC 16 -#define INT_I2C 17 -#define INT_RTCP 18 -#define INT_RTCA 19 -#define INT_NFC 20 -#define INT_SD0 21 -#define INT_GSB0 22 -#define INT_PK 23 -#define INT_USBH0 24 -#define INT_USBH1 25 -#define INT_G2D 26 -#define INT_ECC 27 -#define INT_SPI0RX 28 -#define INT_UART1 29 -#define INT_MSCL 30 -#define INT_GSB1 31 -/* PIC1 interrupts */ -#define INT_E0 32 -#define INT_E1 33 -#define INT_E2 34 -#define INT_E3 35 -#define INT_E4 36 -#define INT_E5 37 -#define INT_E6 38 -#define INT_E7 39 -#define INT_UART2 40 -#define INT_UART3 41 -#define INT_SPI1TX 42 -#define INT_SPI1RX 43 -#define INT_GSB2 44 -#define INT_SPDIF 45 -#define INT_CDIF 46 -#define INT_VBON 47 -#define INT_VBOFF 48 -#define INT_SD1 49 -#define INT_UART4 50 -#define INT_GDMA3 51 -#define INT_I2S1RX 52 -#define INT_I2S1TX 53 -#define INT_CAN0 54 -#define INT_CAN1 55 -#define INT_GSB3 56 -#define INT_KRST 57 -#define INT_UNUSED 58 -#define INT_SD0D3 59 -#define INT_SD1D3 60 -#define INT_GPS0 61 -#define INT_GPS1 62 -#define INT_GPS2 63 - -#endif /* ASM_ARCH_TCC_IRQS_H */ diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h deleted file mode 100644 index 909e603..0000000 --- a/arch/arm/plat-tcc/include/mach/system.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Author: <linux@telechips.com> - * Created: June 10, 2008 - * Description: LINUX SYSTEM FUNCTIONS for TCC83x - * - * Copyright (C) 2008-2009 Telechips - * - * Licensed under the terms of the GPL v2. - * - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H -#include <linux/clk.h> - -#include <asm/mach-types.h> -#include <mach/hardware.h> - -extern void plat_tcc_reboot(void); - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode, const char *cmd) -{ - plat_tcc_reboot(); -} - -#endif diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h deleted file mode 100644 index 1d94282..0000000 --- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h +++ /dev/null @@ -1,807 +0,0 @@ -/* - * Telechips TCC8000 register definitions - * - * (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GPLv2. - */ - -#ifndef TCC8K_REGS_H -#define TCC8K_REGS_H - -#include <linux/types.h> - -#define EXT_SDRAM_BASE 0x20000000 -#define INT_SRAM_BASE 0x30000000 -#define INT_SRAM_SIZE SZ_32K -#define CS0_BASE 0x40000000 -#define CS1_BASE 0x50000000 -#define CS1_SIZE SZ_64K -#define CS2_BASE 0x60000000 -#define CS3_BASE 0x70000000 -#define AHB_PERI_BASE 0x80000000 -#define AHB_PERI_SIZE SZ_64K -#define APB0_PERI_BASE 0x90000000 -#define APB0_PERI_SIZE SZ_128K -#define APB1_PERI_BASE 0x98000000 -#define APB1_PERI_SIZE SZ_128K -#define DATA_TCM_BASE 0xa0000000 -#define DATA_TCM_SIZE SZ_8K -#define EXT_MEM_CTRL_BASE 0xf0000000 -#define EXT_MEM_CTRL_SIZE SZ_4K - -#define CS1_BASE_VIRT (void __iomem *)0xf7000000 -#define AHB_PERI_BASE_VIRT (void __iomem *)0xf4000000 -#define APB0_PERI_BASE_VIRT (void __iomem *)0xf1000000 -#define APB1_PERI_BASE_VIRT (void __iomem *)0xf2000000 -#define EXT_MEM_CTRL_BASE_VIRT (void __iomem *)0xf3000000 -#define INT_SRAM_BASE_VIRT (void __iomem *)0xf5000000 -#define DATA_TCM_BASE_VIRT (void __iomem *)0xf6000000 - -#define __REG(x) (*((volatile u32 *)(x))) - -/* USB Device Controller Registers */ -#define UDC_BASE (AHB_PERI_BASE_VIRT + 0x8000) -#define UDC_BASE_PHYS (AHB_PERI_BASE + 0x8000) - -#define UDC_IR_OFFS 0x00 -#define UDC_EIR_OFFS 0x04 -#define UDC_EIER_OFFS 0x08 -#define UDC_FAR_OFFS 0x0c -#define UDC_FNR_OFFS 0x10 -#define UDC_EDR_OFFS 0x14 -#define UDC_RT_OFFS 0x18 -#define UDC_SSR_OFFS 0x1c -#define UDC_SCR_OFFS 0x20 -#define UDC_EP0SR_OFFS 0x24 -#define UDC_EP0CR_OFFS 0x28 - -#define UDC_ESR_OFFS 0x2c -#define UDC_ECR_OFFS 0x30 -#define UDC_BRCR_OFFS 0x34 -#define UDC_BWCR_OFFS 0x38 -#define UDC_MPR_OFFS 0x3c -#define UDC_DCR_OFFS 0x40 -#define UDC_DTCR_OFFS 0x44 -#define UDC_DFCR_OFFS 0x48 -#define UDC_DTTCR1_OFFS 0x4c -#define UDC_DTTCR2_OFFS 0x50 -#define UDC_ESR2_OFFS 0x54 - -#define UDC_SCR2_OFFS 0x58 -#define UDC_EP0BUF_OFFS 0x60 -#define UDC_EP1BUF_OFFS 0x64 -#define UDC_EP2BUF_OFFS 0x68 -#define UDC_EP3BUF_OFFS 0x6c -#define UDC_PLICR_OFFS 0xa0 -#define UDC_PCR_OFFS 0xa4 - -#define UDC_UPCR0_OFFS 0xc8 -#define UDC_UPCR1_OFFS 0xcc -#define UDC_UPCR2_OFFS 0xd0 -#define UDC_UPCR3_OFFS 0xd4 - -/* Bits in UDC_EIR */ -#define UDC_EIR_EP0I (1 << 0) -#define UDC_EIR_EP1I (1 << 1) -#define UDC_EIR_EP2I (1 << 2) -#define UDC_EIR_EP3I (1 << 3) -#define UDC_EIR_EPI_MASK 0x0f - -/* Bits in UDC_EIER */ -#define UDC_EIER_EP0IE (1 << 0) -#define UDC_EIER_EP1IE (1 << 1) -#define UDC_EIER_EP2IE (1 << 2) -#define UDC_EIER_EP3IE (1 << 3) - -/* Bits in UDC_FNR */ -#define UDC_FNR_FN_MASK 0x7ff -#define UDC_FNR_SM (1 << 13) -#define UDC_FNR_FTL (1 << 14) - -/* Bits in UDC_SSR */ -#define UDC_SSR_HFRES (1 << 0) -#define UDC_SSR_HFSUSP (1 << 1) -#define UDC_SSR_HFRM (1 << 2) -#define UDC_SSR_SDE (1 << 3) -#define UDC_SSR_HSP (1 << 4) -#define UDC_SSR_DM (1 << 5) -#define UDC_SSR_DP (1 << 6) -#define UDC_SSR_TBM (1 << 7) -#define UDC_SSR_VBON (1 << 8) -#define UDC_SSR_VBOFF (1 << 9) -#define UDC_SSR_EOERR (1 << 10) -#define UDC_SSR_DCERR (1 << 11) -#define UDC_SSR_TCERR (1 << 12) -#define UDC_SSR_BSERR (1 << 13) -#define UDC_SSR_TMERR (1 << 14) -#define UDC_SSR_BAERR (1 << 15) - -/* Bits in UDC_SCR */ -#define UDC_SCR_HRESE (1 << 0) -#define UDC_SCR_HSSPE (1 << 1) -#define UDC_SCR_RRDE (1 << 5) -#define UDC_SCR_SPDEN (1 << 6) -#define UDC_SCR_DIEN (1 << 12) - -/* Bits in UDC_EP0SR */ -#define UDC_EP0SR_RSR (1 << 0) -#define UDC_EP0SR_TST (1 << 1) -#define UDC_EP0SR_SHT (1 << 4) -#define UDC_EP0SR_LWO (1 << 6) - -/* Bits in UDC_EP0CR */ -#define UDC_EP0CR_ESS (1 << 1) - -/* Bits in UDC_ESR */ -#define UDC_ESR_RPS (1 << 0) -#define UDC_ESR_TPS (1 << 1) -#define UDC_ESR_LWO (1 << 4) -#define UDC_ESR_FFS (1 << 6) - -/* Bits in UDC_ECR */ -#define UDC_ECR_ESS (1 << 1) -#define UDC_ECR_CDP (1 << 2) - -#define UDC_ECR_FLUSH (1 << 6) -#define UDC_ECR_DUEN (1 << 7) - -/* Bits in UDC_UPCR0 */ -#define UDC_UPCR0_VBD (1 << 1) -#define UDC_UPCR0_VBDS (1 << 6) -#define UDC_UPCR0_RCD_12 (0x0 << 9) -#define UDC_UPCR0_RCD_24 (0x1 << 9) -#define UDC_UPCR0_RCD_48 (0x2 << 9) -#define UDC_UPCR0_RCS_EXT (0x1 << 11) -#define UDC_UPCR0_RCS_XTAL (0x0 << 11) - -/* Bits in UDC_UPCR1 */ -#define UDC_UPCR1_CDT(x) ((x) << 0) -#define UDC_UPCR1_OTGT(x) ((x) << 3) -#define UDC_UPCR1_SQRXT(x) ((x) << 8) -#define UDC_UPCR1_TXFSLST(x) ((x) << 12) - -/* Bits in UDC_UPCR2 */ -#define UDC_UPCR2_TP (1 << 0) -#define UDC_UPCR2_TXRT(x) ((x) << 2) -#define UDC_UPCR2_TXVRT(x) ((x) << 5) -#define UDC_UPCR2_OPMODE(x) ((x) << 9) -#define UDC_UPCR2_XCVRSEL(x) ((x) << 12) -#define UDC_UPCR2_TM (1 << 14) - -/* USB Host Controller registers */ -#define USBH0_BASE (AHB_PERI_BASE_VIRT + 0xb000) -#define USBH1_BASE (AHB_PERI_BASE_VIRT + 0xb800) - -#define OHCI_INT_ENABLE_OFFS 0x10 - -#define RH_DESCRIPTOR_A_OFFS 0x48 -#define RH_DESCRIPTOR_B_OFFS 0x4c - -#define USBHTCFG0_OFFS 0x100 -#define USBHHCFG0_OFFS 0x104 -#define USBHHCFG1_OFFS 0x104 - -/* DMA controller registers */ -#define DMAC0_BASE (AHB_PERI_BASE + 0x4000) -#define DMAC1_BASE (AHB_PERI_BASE + 0xa000) -#define DMAC2_BASE (AHB_PERI_BASE + 0x4800) -#define DMAC3_BASE (AHB_PERI_BASE + 0xa800) - -#define DMAC_CH_OFFSET(ch) (ch * 0x30) - -#define ST_SADR_OFFS 0x00 -#define SPARAM_OFFS 0x04 -#define C_SADR_OFFS 0x0c -#define ST_DADR_OFFS 0x10 -#define DPARAM_OFFS 0x14 -#define C_DADR_OFFS 0x1c -#define HCOUNT_OFFS 0x20 -#define CHCTRL_OFFS 0x24 -#define RPTCTRL_OFFS 0x28 -#define EXTREQ_A_OFFS 0x2c - -/* Bits in CHCTRL register */ -#define CHCTRL_EN (1 << 0) - -#define CHCTRL_IEN (1 << 2) -#define CHCTRL_FLAG (1 << 3) -#define CHCTRL_WSIZE8 (0 << 4) -#define CHCTRL_WSIZE16 (1 << 4) -#define CHCTRL_WSIZE32 (2 << 4) - -#define CHCTRL_BSIZE1 (0 << 6) -#define CHCTRL_BSIZE2 (1 << 6) -#define CHCTRL_BSIZE4 (2 << 6) -#define CHCTRL_BSIZE8 (3 << 6) - -#define CHCTRL_TYPE_SINGLE_E (0 << 8) -#define CHCTRL_TYPE_HW (1 << 8) -#define CHCTRL_TYPE_SW (2 << 8) -#define CHCTRL_TYPE_SINGLE_L (3 << 8) - -#define CHCTRL_BST (1 << 10) - -/* Use DMA controller 0, channel 2 for USB */ -#define USB_DMA_BASE (DMAC0_BASE + DMAC_CH_OFFSET(2)) - -/* NAND flash controller registers */ -#define NFC_BASE (AHB_PERI_BASE_VIRT + 0xd000) -#define NFC_BASE_PHYS (AHB_PERI_BASE + 0xd000) - -#define NFC_CMD_OFFS 0x00 -#define NFC_LADDR_OFFS 0x04 -#define NFC_BADDR_OFFS 0x08 -#define NFC_SADDR_OFFS 0x0c -#define NFC_WDATA_OFFS 0x10 -#define NFC_LDATA_OFFS 0x20 -#define NFC_SDATA_OFFS 0x40 -#define NFC_CTRL_OFFS 0x50 -#define NFC_PSTART_OFFS 0x54 -#define NFC_RSTART_OFFS 0x58 -#define NFC_DSIZE_OFFS 0x5c -#define NFC_IREQ_OFFS 0x60 -#define NFC_RST_OFFS 0x64 -#define NFC_CTRL1_OFFS 0x68 -#define NFC_MDATA_OFFS 0x70 - -#define NFC_WDATA_PHYS_ADDR (NFC_BASE_PHYS + NFC_WDATA_OFFS) - -/* Bits in NFC_CTRL */ -#define NFC_CTRL_BHLD_MASK (0xf << 0) -#define NFC_CTRL_BPW_MASK (0xf << 4) -#define NFC_CTRL_BSTP_MASK (0xf << 8) -#define NFC_CTRL_CADDR_MASK (0x7 << 12) -#define NFC_CTRL_CADDR_1 (0x0 << 12) -#define NFC_CTRL_CADDR_2 (0x1 << 12) -#define NFC_CTRL_CADDR_3 (0x2 << 12) -#define NFC_CTRL_CADDR_4 (0x3 << 12) -#define NFC_CTRL_CADDR_5 (0x4 << 12) -#define NFC_CTRL_MSK (1 << 15) -#define NFC_CTRL_PSIZE256 (0 << 16) -#define NFC_CTRL_PSIZE512 (1 << 16) -#define NFC_CTRL_PSIZE1024 (2 << 16) -#define NFC_CTRL_PSIZE2048 (3 << 16) -#define NFC_CTRL_PSIZE4096 (4 << 16) -#define NFC_CTRL_PSIZE_MASK (7 << 16) -#define NFC_CTRL_BSIZE1 (0 << 19) -#define NFC_CTRL_BSIZE2 (1 << 19) -#define NFC_CTRL_BSIZE4 (2 << 19) -#define NFC_CTRL_BSIZE8 (3 << 19) -#define NFC_CTRL_BSIZE_MASK (3 << 19) -#define NFC_CTRL_RDY (1 << 21) -#define NFC_CTRL_CS0SEL (1 << 22) -#define NFC_CTRL_CS1SEL (1 << 23) -#define NFC_CTRL_CS2SEL (1 << 24) -#define NFC_CTRL_CS3SEL (1 << 25) -#define NFC_CTRL_CSMASK (0xf << 22) -#define NFC_CTRL_BW (1 << 26) -#define NFC_CTRL_FS (1 << 27) -#define NFC_CTRL_DEN (1 << 28) -#define NFC_CTRL_READ_IEN (1 << 29) -#define NFC_CTRL_PROG_IEN (1 << 30) -#define NFC_CTRL_RDY_IEN (1 << 31) - -/* Bits in NFC_IREQ */ -#define NFC_IREQ_IRQ0 (1 << 0) -#define NFC_IREQ_IRQ1 (1 << 1) -#define NFC_IREQ_IRQ2 (1 << 2) - -#define NFC_IREQ_FLAG0 (1 << 4) -#define NFC_IREQ_FLAG1 (1 << 5) -#define NFC_IREQ_FLAG2 (1 << 6) - -/* MMC controller registers */ -#define MMC0_BASE (AHB_PERI_BASE_VIRT + 0xe000) -#define MMC1_BASE (AHB_PERI_BASE_VIRT + 0xe800) - -/* UART base addresses */ - -#define UART0_BASE (APB0_PERI_BASE_VIRT + 0x07000) -#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000) -#define UART1_BASE (APB0_PERI_BASE_VIRT + 0x08000) -#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000) -#define UART2_BASE (APB0_PERI_BASE_VIRT + 0x09000) -#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000) -#define UART3_BASE (APB0_PERI_BASE_VIRT + 0x0a000) -#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000) -#define UART4_BASE (APB0_PERI_BASE_VIRT + 0x15000) -#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000) - -#define UART_BASE UART0_BASE -#define UART_BASE_PHYS UART0_BASE_PHYS - -/* ECC controller */ -#define ECC_CTR_BASE (APB0_PERI_BASE_VIRT + 0xd000) - -#define ECC_CTRL_OFFS 0x00 -#define ECC_BASE_OFFS 0x04 -#define ECC_MASK_OFFS 0x08 -#define ECC_CLEAR_OFFS 0x0c -#define ECC4_0_OFFS 0x10 -#define ECC4_1_OFFS 0x14 - -#define ECC_EADDR0_OFFS 0x50 - -#define ECC_ERRNUM_OFFS 0x90 -#define ECC_IREQ_OFFS 0x94 - -/* Bits in ECC_CTRL */ -#define ECC_CTRL_ECC4_DIEN (1 << 28) -#define ECC_CTRL_ECC8_DIEN (1 << 29) -#define ECC_CTRL_ECC12_DIEN (1 << 30) -#define ECC_CTRL_ECC_DISABLE 0x0 -#define ECC_CTRL_ECC_SLC_ENC 0x8 -#define ECC_CTRL_ECC_SLC_DEC 0x9 -#define ECC_CTRL_ECC4_ENC 0xa -#define ECC_CTRL_ECC4_DEC 0xb -#define ECC_CTRL_ECC8_ENC 0xc -#define ECC_CTRL_ECC8_DEC 0xd -#define ECC_CTRL_ECC12_ENC 0xe -#define ECC_CTRL_ECC12_DEC 0xf - -/* Bits in ECC_IREQ */ -#define ECC_IREQ_E4DI (1 << 4) - -#define ECC_IREQ_E4DF (1 << 20) -#define ECC_IREQ_E4EF (1 << 21) - -/* Interrupt controller */ - -#define PIC0_BASE (APB1_PERI_BASE_VIRT + 0x3000) -#define PIC0_BASE_PHYS (APB1_PERI_BASE + 0x3000) - -#define PIC0_IEN_OFFS 0x00 -#define PIC0_CREQ_OFFS 0x04 -#define PIC0_IREQ_OFFS 0x08 -#define PIC0_IRQSEL_OFFS 0x0c -#define PIC0_SRC_OFFS 0x10 -#define PIC0_MREQ_OFFS 0x14 -#define PIC0_TSTREQ_OFFS 0x18 -#define PIC0_POL_OFFS 0x1c -#define PIC0_IRQ_OFFS 0x20 -#define PIC0_FIQ_OFFS 0x24 -#define PIC0_MIRQ_OFFS 0x28 -#define PIC0_MFIQ_OFFS 0x2c -#define PIC0_TMODE_OFFS 0x30 -#define PIC0_SYNC_OFFS 0x34 -#define PIC0_WKUP_OFFS 0x38 -#define PIC0_TMODEA_OFFS 0x3c -#define PIC0_INTOEN_OFFS 0x40 -#define PIC0_MEN0_OFFS 0x44 -#define PIC0_MEN_OFFS 0x48 - -#define PIC0_IEN __REG(PIC0_BASE + PIC0_IEN_OFFS) -#define PIC0_IEN_PHYS __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS) -#define PIC0_CREQ __REG(PIC0_BASE + PIC0_CREQ_OFFS) -#define PIC0_CREQ_PHYS __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS) -#define PIC0_IREQ __REG(PIC0_BASE + PIC0_IREQ_OFFS) -#define PIC0_IRQSEL __REG(PIC0_BASE + PIC0_IRQSEL_OFFS) -#define PIC0_IRQSEL_PHYS __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS) -#define PIC0_SRC __REG(PIC0_BASE + PIC0_SRC_OFFS) -#define PIC0_MREQ __REG(PIC0_BASE + PIC0_MREQ_OFFS) -#define PIC0_TSTREQ __REG(PIC0_BASE + PIC0_TSTREQ_OFFS) -#define PIC0_POL __REG(PIC0_BASE + PIC0_POL_OFFS) -#define PIC0_IRQ __REG(PIC0_BASE + PIC0_IRQ_OFFS) -#define PIC0_FIQ __REG(PIC0_BASE + PIC0_FIQ_OFFS) -#define PIC0_MIRQ __REG(PIC0_BASE + PIC0_MIRQ_OFFS) -#define PIC0_MFIQ __REG(PIC0_BASE + PIC0_MFIQ_OFFS) -#define PIC0_TMODE __REG(PIC0_BASE + PIC0_TMODE_OFFS) -#define PIC0_TMODE_PHYS __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS) -#define PIC0_SYNC __REG(PIC0_BASE + PIC0_SYNC_OFFS) -#define PIC0_WKUP __REG(PIC0_BASE + PIC0_WKUP_OFFS) -#define PIC0_TMODEA __REG(PIC0_BASE + PIC0_TMODEA_OFFS) -#define PIC0_INTOEN __REG(PIC0_BASE + PIC0_INTOEN_OFFS) -#define PIC0_MEN0 __REG(PIC0_BASE + PIC0_MEN0_OFFS) -#define PIC0_MEN __REG(PIC0_BASE + PIC0_MEN_OFFS) - -#define PIC1_BASE (APB1_PERI_BASE_VIRT + 0x3080) - -#define PIC1_IEN_OFFS 0x00 -#define PIC1_CREQ_OFFS 0x04 -#define PIC1_IREQ_OFFS 0x08 -#define PIC1_IRQSEL_OFFS 0x0c -#define PIC1_SRC_OFFS 0x10 -#define PIC1_MREQ_OFFS 0x14 -#define PIC1_TSTREQ_OFFS 0x18 -#define PIC1_POL_OFFS 0x1c -#define PIC1_IRQ_OFFS 0x20 -#define PIC1_FIQ_OFFS 0x24 -#define PIC1_MIRQ_OFFS 0x28 -#define PIC1_MFIQ_OFFS 0x2c -#define PIC1_TMODE_OFFS 0x30 -#define PIC1_SYNC_OFFS 0x34 -#define PIC1_WKUP_OFFS 0x38 -#define PIC1_TMODEA_OFFS 0x3c -#define PIC1_INTOEN_OFFS 0x40 -#define PIC1_MEN1_OFFS 0x44 -#define PIC1_MEN_OFFS 0x48 - -#define PIC1_IEN __REG(PIC1_BASE + PIC1_IEN_OFFS) -#define PIC1_CREQ __REG(PIC1_BASE + PIC1_CREQ_OFFS) -#define PIC1_IREQ __REG(PIC1_BASE + PIC1_IREQ_OFFS) -#define PIC1_IRQSEL __REG(PIC1_BASE + PIC1_IRQSEL_OFFS) -#define PIC1_SRC __REG(PIC1_BASE + PIC1_SRC_OFFS) -#define PIC1_MREQ __REG(PIC1_BASE + PIC1_MREQ_OFFS) -#define PIC1_TSTREQ __REG(PIC1_BASE + PIC1_TSTREQ_OFFS) -#define PIC1_POL __REG(PIC1_BASE + PIC1_POL_OFFS) -#define PIC1_IRQ __REG(PIC1_BASE + PIC1_IRQ_OFFS) -#define PIC1_FIQ __REG(PIC1_BASE + PIC1_FIQ_OFFS) -#define PIC1_MIRQ __REG(PIC1_BASE + PIC1_MIRQ_OFFS) -#define PIC1_MFIQ __REG(PIC1_BASE + PIC1_MFIQ_OFFS) -#define PIC1_TMODE __REG(PIC1_BASE + PIC1_TMODE_OFFS) -#define PIC1_SYNC __REG(PIC1_BASE + PIC1_SYNC_OFFS) -#define PIC1_WKUP __REG(PIC1_BASE + PIC1_WKUP_OFFS) -#define PIC1_TMODEA __REG(PIC1_BASE + PIC1_TMODEA_OFFS) -#define PIC1_INTOEN __REG(PIC1_BASE + PIC1_INTOEN_OFFS) -#define PIC1_MEN1 __REG(PIC1_BASE + PIC1_MEN1_OFFS) -#define PIC1_MEN __REG(PIC1_BASE + PIC1_MEN_OFFS) - -/* Timer registers */ -#define TIMER_BASE (APB1_PERI_BASE_VIRT + 0x4000) -#define TIMER_BASE_PHYS (APB1_PERI_BASE + 0x4000) - -#define TWDCFG_OFFS 0x70 - -#define TC32EN_OFFS 0x80 -#define TC32LDV_OFFS 0x84 -#define TC32CMP0_OFFS 0x88 -#define TC32CMP1_OFFS 0x8c -#define TC32PCNT_OFFS 0x90 -#define TC32MCNT_OFFS 0x94 -#define TC32IRQ_OFFS 0x98 - -/* Bits in TC32EN */ -#define TC32EN_PRESCALE_MASK 0x00ffffff -#define TC32EN_ENABLE (1 << 24) -#define TC32EN_LOADZERO (1 << 25) -#define TC32EN_STOPMODE (1 << 26) -#define TC32EN_LDM0 (1 << 28) -#define TC32EN_LDM1 (1 << 29) - -/* Bits in TC32IRQ */ -#define TC32IRQ_MSTAT_MASK 0x0000001f -#define TC32IRQ_RSTAT_MASK (0x1f << 8) -#define TC32IRQ_IRQEN0 (1 << 16) -#define TC32IRQ_IRQEN1 (1 << 17) -#define TC32IRQ_IRQEN2 (1 << 18) -#define TC32IRQ_IRQEN3 (1 << 19) -#define TC32IRQ_IRQEN4 (1 << 20) -#define TC32IRQ_RSYNC (1 << 30) -#define TC32IRQ_IRQCLR (1 << 31) - -/* GPIO registers */ -#define GPIOPD_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOPD_DAT_OFFS 0x00 -#define GPIOPD_DOE_OFFS 0x04 -#define GPIOPD_FS0_OFFS 0x08 -#define GPIOPD_FS1_OFFS 0x0c -#define GPIOPD_FS2_OFFS 0x10 -#define GPIOPD_RPU_OFFS 0x30 -#define GPIOPD_RPD_OFFS 0x34 -#define GPIOPD_DV0_OFFS 0x38 -#define GPIOPD_DV1_OFFS 0x3c - -#define GPIOPS_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOPS_DAT_OFFS 0x40 -#define GPIOPS_DOE_OFFS 0x44 -#define GPIOPS_FS0_OFFS 0x48 -#define GPIOPS_FS1_OFFS 0x4c -#define GPIOPS_FS2_OFFS 0x50 -#define GPIOPS_FS3_OFFS 0x54 -#define GPIOPS_RPU_OFFS 0x70 -#define GPIOPS_RPD_OFFS 0x74 -#define GPIOPS_DV0_OFFS 0x78 -#define GPIOPS_DV1_OFFS 0x7c - -#define GPIOPS_FS1_SDH0_BITS 0x000000ff -#define GPIOPS_FS1_SDH1_BITS 0x0000ff00 - -#define GPIOPU_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOPU_DAT_OFFS 0x80 -#define GPIOPU_DOE_OFFS 0x84 -#define GPIOPU_FS0_OFFS 0x88 -#define GPIOPU_FS1_OFFS 0x8c -#define GPIOPU_FS2_OFFS 0x90 -#define GPIOPU_RPU_OFFS 0xb0 -#define GPIOPU_RPD_OFFS 0xb4 -#define GPIOPU_DV0_OFFS 0xb8 -#define GPIOPU_DV1_OFFS 0xbc - -#define GPIOPU_FS0_TXD0 (1 << 0) -#define GPIOPU_FS0_RXD0 (1 << 1) -#define GPIOPU_FS0_CTS0 (1 << 2) -#define GPIOPU_FS0_RTS0 (1 << 3) -#define GPIOPU_FS0_TXD1 (1 << 4) -#define GPIOPU_FS0_RXD1 (1 << 5) -#define GPIOPU_FS0_CTS1 (1 << 6) -#define GPIOPU_FS0_RTS1 (1 << 7) -#define GPIOPU_FS0_TXD2 (1 << 8) -#define GPIOPU_FS0_RXD2 (1 << 9) -#define GPIOPU_FS0_CTS2 (1 << 10) -#define GPIOPU_FS0_RTS2 (1 << 11) -#define GPIOPU_FS0_TXD3 (1 << 12) -#define GPIOPU_FS0_RXD3 (1 << 13) -#define GPIOPU_FS0_CTS3 (1 << 14) -#define GPIOPU_FS0_RTS3 (1 << 15) -#define GPIOPU_FS0_TXD4 (1 << 16) -#define GPIOPU_FS0_RXD4 (1 << 17) -#define GPIOPU_FS0_CTS4 (1 << 18) -#define GPIOPU_FS0_RTS4 (1 << 19) - -#define GPIOFC_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOFC_DAT_OFFS 0xc0 -#define GPIOFC_DOE_OFFS 0xc4 -#define GPIOFC_FS0_OFFS 0xc8 -#define GPIOFC_FS1_OFFS 0xcc -#define GPIOFC_FS2_OFFS 0xd0 -#define GPIOFC_FS3_OFFS 0xd4 -#define GPIOFC_RPU_OFFS 0xf0 -#define GPIOFC_RPD_OFFS 0xf4 -#define GPIOFC_DV0_OFFS 0xf8 -#define GPIOFC_DV1_OFFS 0xfc - -#define GPIOFD_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOFD_DAT_OFFS 0x100 -#define GPIOFD_DOE_OFFS 0x104 -#define GPIOFD_FS0_OFFS 0x108 -#define GPIOFD_FS1_OFFS 0x10c -#define GPIOFD_FS2_OFFS 0x110 -#define GPIOFD_RPU_OFFS 0x130 -#define GPIOFD_RPD_OFFS 0x134 -#define GPIOFD_DV0_OFFS 0x138 -#define GPIOFD_DV1_OFFS 0x13c - -#define GPIOLC_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOLC_DAT_OFFS 0x140 -#define GPIOLC_DOE_OFFS 0x144 -#define GPIOLC_FS0_OFFS 0x148 -#define GPIOLC_FS1_OFFS 0x14c -#define GPIOLC_RPU_OFFS 0x170 -#define GPIOLC_RPD_OFFS 0x174 -#define GPIOLC_DV0_OFFS 0x178 -#define GPIOLC_DV1_OFFS 0x17c - -#define GPIOLD_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOLD_DAT_OFFS 0x180 -#define GPIOLD_DOE_OFFS 0x184 -#define GPIOLD_FS0_OFFS 0x188 -#define GPIOLD_FS1_OFFS 0x18c -#define GPIOLD_FS2_OFFS 0x190 -#define GPIOLD_RPU_OFFS 0x1b0 -#define GPIOLD_RPD_OFFS 0x1b4 -#define GPIOLD_DV0_OFFS 0x1b8 -#define GPIOLD_DV1_OFFS 0x1bc - -#define GPIOAD_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOAD_DAT_OFFS 0x1c0 -#define GPIOAD_DOE_OFFS 0x1c4 -#define GPIOAD_FS0_OFFS 0x1c8 -#define GPIOAD_RPU_OFFS 0x1f0 -#define GPIOAD_RPD_OFFS 0x1f4 -#define GPIOAD_DV0_OFFS 0x1f8 -#define GPIOAD_DV1_OFFS 0x1fc - -#define GPIOXC_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOXC_DAT_OFFS 0x200 -#define GPIOXC_DOE_OFFS 0x204 -#define GPIOXC_FS0_OFFS 0x208 -#define GPIOXC_RPU_OFFS 0x230 -#define GPIOXC_RPD_OFFS 0x234 -#define GPIOXC_DV0_OFFS 0x238 -#define GPIOXC_DV1_OFFS 0x23c - -#define GPIOXC_FS0 __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS) - -#define GPIOXC_FS0_CS0 (1 << 26) -#define GPIOXC_FS0_CS1 (1 << 27) - -#define GPIOXD_BASE (APB1_PERI_BASE_VIRT + 0x5000) - -#define GPIOXD_DAT_OFFS 0x240 -#define GPIOXD_FS0_OFFS 0x248 -#define GPIOXD_RPU_OFFS 0x270 -#define GPIOXD_RPD_OFFS 0x274 -#define GPIOXD_DV0_OFFS 0x278 -#define GPIOXD_DV1_OFFS 0x27c - -#define GPIOPK_BASE (APB1_PERI_BASE_VIRT + 0x1c000) - -#define GPIOPK_RST_OFFS 0x008 -#define GPIOPK_DAT_OFFS 0x100 -#define GPIOPK_DOE_OFFS 0x104 -#define GPIOPK_FS0_OFFS 0x108 -#define GPIOPK_FS1_OFFS 0x10c -#define GPIOPK_FS2_OFFS 0x110 -#define GPIOPK_IRQST_OFFS 0x210 -#define GPIOPK_IRQEN_OFFS 0x214 -#define GPIOPK_IRQPOL_OFFS 0x218 -#define GPIOPK_IRQTM0_OFFS 0x21c -#define GPIOPK_IRQTM1_OFFS 0x220 -#define GPIOPK_CTL_OFFS 0x22c - -#define PMGPIO_BASE (APB1_PERI_BASE_VIRT + 0x10000) -#define BACKUP_RAM_BASE PMGPIO_BASE - -#define PMGPIO_DAT_OFFS 0x800 -#define PMGPIO_DOE_OFFS 0x804 -#define PMGPIO_FS0_OFFS 0x808 -#define PMGPIO_RPU_OFFS 0x810 -#define PMGPIO_RPD_OFFS 0x814 -#define PMGPIO_DV0_OFFS 0x818 -#define PMGPIO_DV1_OFFS 0x81c -#define PMGPIO_EE0_OFFS 0x820 -#define PMGPIO_EE1_OFFS 0x824 -#define PMGPIO_CTL_OFFS 0x828 -#define PMGPIO_DI_OFFS 0x82c -#define PMGPIO_STR_OFFS 0x830 -#define PMGPIO_STF_OFFS 0x834 -#define PMGPIO_POL_OFFS 0x838 -#define PMGPIO_APB_OFFS 0x800 - -/* Clock controller registers */ -#define CKC_BASE ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000)) - -#define CLKCTRL_OFFS 0x00 -#define PLL0CFG_OFFS 0x04 -#define PLL1CFG_OFFS 0x08 -#define CLKDIVC0_OFFS 0x0c - -#define BCLKCTR0_OFFS 0x14 -#define SWRESET0_OFFS 0x18 - -#define BCLKCTR1_OFFS 0x60 -#define SWRESET1_OFFS 0x64 -#define PWDCTL_OFFS 0x68 -#define PLL2CFG_OFFS 0x6c -#define CLKDIVC1_OFFS 0x70 - -#define ACLKREF_OFFS 0x80 -#define ACLKI2C_OFFS 0x84 -#define ACLKSPI0_OFFS 0x88 -#define ACLKSPI1_OFFS 0x8c -#define ACLKUART0_OFFS 0x90 -#define ACLKUART1_OFFS 0x94 -#define ACLKUART2_OFFS 0x98 -#define ACLKUART3_OFFS 0x9c -#define ACLKUART4_OFFS 0xa0 -#define ACLKTCT_OFFS 0xa4 -#define ACLKTCX_OFFS 0xa8 -#define ACLKTCZ_OFFS 0xac -#define ACLKADC_OFFS 0xb0 -#define ACLKDAI0_OFFS 0xb4 -#define ACLKDAI1_OFFS 0xb8 -#define ACLKLCD_OFFS 0xbc -#define ACLKSPDIF_OFFS 0xc0 -#define ACLKUSBH_OFFS 0xc4 -#define ACLKSDH0_OFFS 0xc8 -#define ACLKSDH1_OFFS 0xcc -#define ACLKC3DEC_OFFS 0xd0 -#define ACLKEXT_OFFS 0xd4 -#define ACLKCAN0_OFFS 0xd8 -#define ACLKCAN1_OFFS 0xdc -#define ACLKGSB0_OFFS 0xe0 -#define ACLKGSB1_OFFS 0xe4 -#define ACLKGSB2_OFFS 0xe8 -#define ACLKGSB3_OFFS 0xec - -#define PLLxCFG_PD (1 << 31) - -/* CLKCTRL bits */ -#define CLKCTRL_XE (1 << 31) - -/* CLKDIVCx bits */ -#define CLKDIVC0_XTE (1 << 7) -#define CLKDIVC0_XE (1 << 15) -#define CLKDIVC0_P1E (1 << 23) -#define CLKDIVC0_P0E (1 << 31) - -#define CLKDIVC1_P2E (1 << 7) - -/* BCLKCTR0 clock bits */ -#define BCLKCTR0_USBD (1 << 4) -#define BCLKCTR0_ECC (1 << 9) -#define BCLKCTR0_USBH0 (1 << 11) -#define BCLKCTR0_NFC (1 << 16) - -/* BCLKCTR1 clock bits */ -#define BCLKCTR1_USBH1 (1 << 20) - -/* SWRESET0 bits */ -#define SWRESET0_USBD (1 << 4) -#define SWRESET0_USBH0 (1 << 11) - -/* SWRESET1 bits */ -#define SWRESET1_USBH1 (1 << 20) - -/* System clock sources. - * Note: These are the clock sources that serve as parents for - * all other clocks. They have no parents themselves. - * - * These values are used for struct clk->root_id. All clocks - * that are not system clock sources have this value set to - * CLK_SRC_NOROOT. - * The values for system clocks start with CLK_SRC_PLL0 == 0 - * because this gives us exactly the values needed for the lower - * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is - * defined as -1 to not disturb the order. - */ -enum root_clks { - CLK_SRC_NOROOT = -1, - CLK_SRC_PLL0 = 0, - CLK_SRC_PLL1, - CLK_SRC_PLL0DIV, - CLK_SRC_PLL1DIV, - CLK_SRC_XI, - CLK_SRC_XIDIV, - CLK_SRC_XTI, - CLK_SRC_XTIDIV, - CLK_SRC_PLL2, - CLK_SRC_PLL2DIV, - CLK_SRC_PK0, - CLK_SRC_PK1, - CLK_SRC_PK2, - CLK_SRC_PK3, - CLK_SRC_PK4, - CLK_SRC_48MHZ -}; - -#define CLK_SRC_MASK 0xf - -/* Bits in ACLK* registers */ -#define ACLK_EN (1 << 28) -#define ACLK_SEL_SHIFT 24 -#define ACLK_SEL_MASK 0x0f000000 -#define ACLK_DIV_MASK 0x00000fff - -/* System configuration registers */ - -#define SCFG_BASE (APB1_PERI_BASE_VIRT + 0x13000) - -#define BMI_OFFS 0x00 -#define AHBCON0_OFFS 0x04 -#define APBPWE_OFFS 0x08 -#define DTCMWAIT_OFFS 0x0c -#define ECCSEL_OFFS 0x10 -#define AHBCON1_OFFS 0x14 -#define SDHCFG_OFFS 0x18 -#define REMAP_OFFS 0x20 -#define LCDSIAE_OFFS 0x24 -#define XMCCFG_OFFS 0xe0 -#define IMCCFG_OFFS 0xe4 - -/* Values for ECCSEL */ -#define ECCSEL_EXTMEM 0x0 -#define ECCSEL_DTCM 0x1 -#define ECCSEL_INT_SRAM 0x2 -#define ECCSEL_AHB 0x3 - -/* Bits in XMCCFG */ -#define XMCCFG_NFCE (1 << 1) -#define XMCCFG_FDXD (1 << 2) - -/* External memory controller registers */ - -#define EMC_BASE EXT_MEM_CTRL_BASE - -#define SDCFG_OFFS 0x00 -#define SDFSM_OFFS 0x04 -#define MCFG_OFFS 0x08 - -#define CSCFG0_OFFS 0x10 -#define CSCFG1_OFFS 0x14 -#define CSCFG2_OFFS 0x18 -#define CSCFG3_OFFS 0x1c - -#define MCFG_SDEN (1 << 4) - -#endif /* TCC8K_REGS_H */ diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h deleted file mode 100644 index 057acbe..0000000 --- a/arch/arm/plat-tcc/include/mach/timex.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * A definition needed by arch core code. - * - */ -#define CLOCK_TICK_RATE (HZ * 100000UL) diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h deleted file mode 100644 index 7a3e33a..0000000 --- a/arch/arm/plat-tcc/include/mach/uncompress.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * This file is licensed under the terms of the GPL version 2. - */ - -#include <linux/serial_reg.h> -#include <linux/types.h> - -#include <mach/tcc8k-regs.h> - -unsigned int system_rev; - -#define ID_MASK 0x7fff - -static void putc(int c) -{ - u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2)); - u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2)); - - while (!(*uart_lsr & UART_LSR_THRE)) - barrier(); - *uart_tx = c; -} - -static inline void flush(void) -{ -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/arch/arm/plat-tcc/include/mach/vmalloc.h b/arch/arm/plat-tcc/include/mach/vmalloc.h deleted file mode 100644 index 99414d9..0000000 --- a/arch/arm/plat-tcc/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Author: <linux@telechips.com> - * Created: June 10, 2008 - * - * Copyright (C) 2000 Russell King. - * Copyright (C) 2008-2009 Telechips - * - * Licensed under the terms of the GPL v2. - */ -#define VMALLOC_END 0xf0000000UL diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c deleted file mode 100644 index cc208fa..0000000 --- a/arch/arm/plat-tcc/system.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * System functions for Telechips TCCxxxx SoCs - * - * Copyright (C) Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GPL v2. - * - */ - -#include <linux/io.h> - -#include <mach/tcc8k-regs.h> - -/* System reboot */ -void plat_tcc_reboot(void) -{ - /* Make sure clocks are on */ - __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS); - - /* Enable watchdog reset */ - __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS); - /* Wait for reset */ - while(1) - ; -} diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c index 3d6a4c2..b33b74c 100644 --- a/arch/arm/plat-versatile/sched-clock.c +++ b/arch/arm/plat-versatile/sched-clock.c @@ -18,41 +18,24 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include <linux/kernel.h> #include <linux/io.h> -#include <linux/sched.h> #include <asm/sched_clock.h> #include <plat/sched_clock.h> -static DEFINE_CLOCK_DATA(cd); static void __iomem *ctr; -/* - * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60). - * This gives a resolution of about 41ns and a wrap period of about 178s. - */ -#define SC_MULT 2796202667u -#define SC_SHIFT 26 - -unsigned long long notrace sched_clock(void) +static u32 notrace versatile_read_sched_clock(void) { - if (ctr) { - u32 cyc = readl(ctr); - return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, - SC_MULT, SC_SHIFT); - } else - return 0; -} + if (ctr) + return readl(ctr); -static void notrace versatile_update_sched_clock(void) -{ - u32 cyc = readl(ctr); - update_sched_clock(&cd, cyc, (u32)~0); + return 0; } void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate) { ctr = reg; - init_fixed_sched_clock(&cd, versatile_update_sched_clock, - 32, rate, SC_MULT, SC_SHIFT); + setup_sched_clock(versatile_read_sched_clock, 32, rate); } diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index ccbe16f..f9c9f33 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -16,7 +16,7 @@ # are merged into mainline or have been edited in the machine database # within the last 12 months. References to machine_is_NAME() do not count! # -# Last update: Sat May 7 08:48:24 2011 +# Last update: Tue Dec 6 11:07:38 2011 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -269,7 +269,7 @@ dns323 MACH_DNS323 DNS323 1542 omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 pcm038 MACH_PCM038 PCM038 1551 -ts_x09 MACH_TS209 TS209 1565 +ts209 MACH_TS209 TS209 1565 at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 @@ -321,7 +321,6 @@ lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769 mx25_3ds MACH_MX25_3DS MX25_3DS 1771 omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773 davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781 -at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783 dove_db MACH_DOVE_DB DOVE_DB 1788 overo MACH_OVERO OVERO 1798 at2440evb MACH_AT2440EVB AT2440EVB 1799 @@ -459,7 +458,7 @@ guruplug MACH_GURUPLUG GURUPLUG 2659 spear310 MACH_SPEAR310 SPEAR310 2660 spear320 MACH_SPEAR320 SPEAR320 2661 aquila MACH_AQUILA AQUILA 2676 -sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 +esata_sheevaplug MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 ea2478devkit MACH_EA2478DEVKIT EA2478DEVKIT 2683 terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 @@ -491,380 +490,53 @@ eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35SD EUKREA_CPUIMX35SD 2821 eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822 eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823 smdkc210 MACH_SMDKC210 SMDKC210 2838 -omap3_braillo MACH_OMAP3_BRAILLO OMAP3_BRAILLO 2839 -spyplug MACH_SPYPLUG SPYPLUG 2840 -ginger MACH_GINGER GINGER 2841 -tny_t3530 MACH_TNY_T3530 TNY_T3530 2842 pca102 MACH_PCA102 PCA102 2843 -spade MACH_SPADE SPADE 2844 -mxc25_topaz MACH_MXC25_TOPAZ MXC25_TOPAZ 2845 t5325 MACH_T5325 T5325 2846 -gw2361 MACH_GW2361 GW2361 2847 -elog MACH_ELOG ELOG 2848 income MACH_INCOME INCOME 2849 -bcm589x MACH_BCM589X BCM589X 2850 -etna MACH_ETNA ETNA 2851 -hawks MACH_HAWKS HAWKS 2852 -meson MACH_MESON MESON 2853 -xsbase255 MACH_XSBASE255 XSBASE255 2854 -pvm2030 MACH_PVM2030 PVM2030 2855 -mioa502 MACH_MIOA502 MIOA502 2856 vvbox_sdorig2 MACH_VVBOX_SDORIG2 VVBOX_SDORIG2 2857 vvbox_sdlite2 MACH_VVBOX_SDLITE2 VVBOX_SDLITE2 2858 vvbox_sdpro4 MACH_VVBOX_SDPRO4 VVBOX_SDPRO4 2859 -htc_spv_m700 MACH_HTC_SPV_M700 HTC_SPV_M700 2860 mx257sx MACH_MX257SX MX257SX 2861 goni MACH_GONI GONI 2862 -msm8x55_svlte_ffa MACH_MSM8X55_SVLTE_FFA MSM8X55_SVLTE_FFA 2863 -msm8x55_svlte_surf MACH_MSM8X55_SVLTE_SURF MSM8X55_SVLTE_SURF 2864 -quickstep MACH_QUICKSTEP QUICKSTEP 2865 -dmw96 MACH_DMW96 DMW96 2866 -hammerhead MACH_HAMMERHEAD HAMMERHEAD 2867 -trident MACH_TRIDENT TRIDENT 2868 -lightning MACH_LIGHTNING LIGHTNING 2869 -iconnect MACH_ICONNECT ICONNECT 2870 -autobot MACH_AUTOBOT AUTOBOT 2871 -coconut MACH_COCONUT COCONUT 2872 -durian MACH_DURIAN DURIAN 2873 -cayenne MACH_CAYENNE CAYENNE 2874 -fuji MACH_FUJI FUJI 2875 -synology_6282 MACH_SYNOLOGY_6282 SYNOLOGY_6282 2876 -em1sy MACH_EM1SY EM1SY 2877 -m502 MACH_M502 M502 2878 -matrix518 MACH_MATRIX518 MATRIX518 2879 -tiny_gurnard MACH_TINY_GURNARD TINY_GURNARD 2880 -spear1310 MACH_SPEAR1310 SPEAR1310 2881 bv07 MACH_BV07 BV07 2882 -mxt_td61 MACH_MXT_TD61 MXT_TD61 2883 openrd_ultimate MACH_OPENRD_ULTIMATE OPENRD_ULTIMATE 2884 devixp MACH_DEVIXP DEVIXP 2885 miccpt MACH_MICCPT MICCPT 2886 mic256 MACH_MIC256 MIC256 2887 -as1167 MACH_AS1167 AS1167 2888 -omap3_ibiza MACH_OMAP3_IBIZA OMAP3_IBIZA 2889 u5500 MACH_U5500 U5500 2890 -davinci_picto MACH_DAVINCI_PICTO DAVINCI_PICTO 2891 -mecha MACH_MECHA MECHA 2892 -bubba3 MACH_BUBBA3 BUBBA3 2893 -pupitre MACH_PUPITRE PUPITRE 2894 -tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896 -tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897 -simplenet MACH_SIMPLENET SIMPLENET 2898 -ec4350tbm MACH_EC4350TBM EC4350TBM 2899 -pec_tc MACH_PEC_TC PEC_TC 2900 -pec_hc2 MACH_PEC_HC2 PEC_HC2 2901 -esl_mobilis_a MACH_ESL_MOBILIS_A ESL_MOBILIS_A 2902 -esl_mobilis_b MACH_ESL_MOBILIS_B ESL_MOBILIS_B 2903 -esl_wave_a MACH_ESL_WAVE_A ESL_WAVE_A 2904 -esl_wave_b MACH_ESL_WAVE_B ESL_WAVE_B 2905 -unisense_mmm MACH_UNISENSE_MMM UNISENSE_MMM 2906 -blueshark MACH_BLUESHARK BLUESHARK 2907 -e10 MACH_E10 E10 2908 -app3k_robin MACH_APP3K_ROBIN APP3K_ROBIN 2909 -pov15hd MACH_POV15HD POV15HD 2910 -stella MACH_STELLA STELLA 2911 linkstation_lschl MACH_LINKSTATION_LSCHL LINKSTATION_LSCHL 2913 -netwalker MACH_NETWALKER NETWALKER 2914 -acsx106 MACH_ACSX106 ACSX106 2915 -atlas5_c1 MACH_ATLAS5_C1 ATLAS5_C1 2916 -nsb3ast MACH_NSB3AST NSB3AST 2917 -gnet_slc MACH_GNET_SLC GNET_SLC 2918 -af4000 MACH_AF4000 AF4000 2919 -ark9431 MACH_ARK9431 ARK9431 2920 -fs_s5pc100 MACH_FS_S5PC100 FS_S5PC100 2921 -omap3505nova8 MACH_OMAP3505NOVA8 OMAP3505NOVA8 2922 -omap3621_edp1 MACH_OMAP3621_EDP1 OMAP3621_EDP1 2923 -oratisaes MACH_ORATISAES ORATISAES 2924 smdkv310 MACH_SMDKV310 SMDKV310 2925 -siemens_l0 MACH_SIEMENS_L0 SIEMENS_L0 2926 -ventana MACH_VENTANA VENTANA 2927 wm8505_7in_netbook MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK 2928 -ec4350sdb MACH_EC4350SDB EC4350SDB 2929 -mimas MACH_MIMAS MIMAS 2930 -titan MACH_TITAN TITAN 2931 craneboard MACH_CRANEBOARD CRANEBOARD 2932 -es2440 MACH_ES2440 ES2440 2933 -najay_a9263 MACH_NAJAY_A9263 NAJAY_A9263 2934 -htctornado MACH_HTCTORNADO HTCTORNADO 2935 -dimm_mx257 MACH_DIMM_MX257 DIMM_MX257 2936 -jigen301 MACH_JIGEN JIGEN 2937 smdk6450 MACH_SMDK6450 SMDK6450 2938 -meno_qng MACH_MENO_QNG MENO_QNG 2939 -ns2416 MACH_NS2416 NS2416 2940 -rpc353 MACH_RPC353 RPC353 2941 -tq6410 MACH_TQ6410 TQ6410 2942 -sky6410 MACH_SKY6410 SKY6410 2943 -dynasty MACH_DYNASTY DYNASTY 2944 -vivo MACH_VIVO VIVO 2945 -bury_bl7582 MACH_BURY_BL7582 BURY_BL7582 2946 -bury_bps5270 MACH_BURY_BPS5270 BURY_BPS5270 2947 -basi MACH_BASI BASI 2948 -tn200 MACH_TN200 TN200 2949 -c2mmi MACH_C2MMI C2MMI 2950 -meson_6236m MACH_MESON_6236M MESON_6236M 2951 -meson_8626m MACH_MESON_8626M MESON_8626M 2952 -tube MACH_TUBE TUBE 2953 -messina MACH_MESSINA MESSINA 2954 -mx50_arm2 MACH_MX50_ARM2 MX50_ARM2 2955 -cetus9263 MACH_CETUS9263 CETUS9263 2956 brownstone MACH_BROWNSTONE BROWNSTONE 2957 -vmx25 MACH_VMX25 VMX25 2958 -vmx51 MACH_VMX51 VMX51 2959 -abacus MACH_ABACUS ABACUS 2960 -cm4745 MACH_CM4745 CM4745 2961 -oratislink MACH_ORATISLINK ORATISLINK 2962 -davinci_dm365_dvr MACH_DAVINCI_DM365_DVR DAVINCI_DM365_DVR 2963 -netviz MACH_NETVIZ NETVIZ 2964 flexibity MACH_FLEXIBITY FLEXIBITY 2965 -wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966 -lpc24xx MACH_LPC24XX LPC24XX 2967 -spica MACH_SPICA SPICA 2968 -gpsdisplay MACH_GPSDISPLAY GPSDISPLAY 2969 -bipnet MACH_BIPNET BIPNET 2970 -overo_ctu_inertial MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL 2971 -davinci_dm355_mmm MACH_DAVINCI_DM355_MMM DAVINCI_DM355_MMM 2972 -pc9260_v2 MACH_PC9260_V2 PC9260_V2 2973 -ptx7545 MACH_PTX7545 PTX7545 2974 -tm_efdc MACH_TM_EFDC TM_EFDC 2975 -omap3_waldo1 MACH_OMAP3_WALDO1 OMAP3_WALDO1 2977 -flyer MACH_FLYER FLYER 2978 -tornado3240 MACH_TORNADO3240 TORNADO3240 2979 -soli_01 MACH_SOLI_01 SOLI_01 2980 -omapl138_europalc MACH_OMAPL138_EUROPALC OMAPL138_EUROPALC 2981 -helios_v1 MACH_HELIOS_V1 HELIOS_V1 2982 -netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983 -ssc MACH_SSC SSC 2984 -premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 -wasabi MACH_WASABI WASABI 2986 mx50_rdp MACH_MX50_RDP MX50_RDP 2988 universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 real6410 MACH_REAL6410 REAL6410 2990 -spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991 -ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992 -omap3_bc10 MACH_OMAP3_BC10 OMAP3_BC10 2993 -thebe MACH_THEBE THEBE 2994 -rv082 MACH_RV082 RV082 2995 -armlguest MACH_ARMLGUEST ARMLGUEST 2996 -tjinc1000 MACH_TJINC1000 TJINC1000 2997 dockstar MACH_DOCKSTAR DOCKSTAR 2998 -ax8008 MACH_AX8008 AX8008 2999 -gnet_sgce MACH_GNET_SGCE GNET_SGCE 3000 -pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001 -ea20 MACH_EA20 EA20 3002 -awm2 MACH_AWM2 AWM2 3003 ti8148evm MACH_TI8148EVM TI8148EVM 3004 seaboard MACH_SEABOARD SEABOARD 3005 -linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006 -tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007 -rubys MACH_RUBYS RUBYS 3008 -aquarius MACH_AQUARIUS AQUARIUS 3009 mx53_ard MACH_MX53_ARD MX53_ARD 3010 mx53_smd MACH_MX53_SMD MX53_SMD 3011 -lswxl MACH_LSWXL LSWXL 3012 -dove_avng_v3 MACH_DOVE_AVNG_V3 DOVE_AVNG_V3 3013 -sdi_ess_9263 MACH_SDI_ESS_9263 SDI_ESS_9263 3014 -jocpu550 MACH_JOCPU550 JOCPU550 3015 msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016 msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017 -yanomami MACH_YANOMAMI YANOMAMI 3018 -gta04 MACH_GTA04 GTA04 3019 cm_a510 MACH_CM_A510 CM_A510 3020 -omap3_rfs200 MACH_OMAP3_RFS200 OMAP3_RFS200 3021 -kx33xx MACH_KX33XX KX33XX 3022 -ptx7510 MACH_PTX7510 PTX7510 3023 -top9000 MACH_TOP9000 TOP9000 3024 -teenote MACH_TEENOTE TEENOTE 3025 -ts3 MACH_TS3 TS3 3026 -a0 MACH_A0 A0 3027 -fsm9xxx_surf MACH_FSM9XXX_SURF FSM9XXX_SURF 3028 -fsm9xxx_ffa MACH_FSM9XXX_FFA FSM9XXX_FFA 3029 -frrhwcdma60w MACH_FRRHWCDMA60W FRRHWCDMA60W 3030 -remus MACH_REMUS REMUS 3031 -at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032 -at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033 -kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034 -armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036 -spdm MACH_SPDM SPDM 3037 -gtib MACH_GTIB GTIB 3038 -dgm3240 MACH_DGM3240 DGM3240 3039 -htcmega MACH_HTCMEGA HTCMEGA 3041 -tricorder MACH_TRICORDER TRICORDER 3042 tx28 MACH_TX28 TX28 3043 -bstbrd MACH_BSTBRD BSTBRD 3044 -pwb3090 MACH_PWB3090 PWB3090 3045 -idea6410 MACH_IDEA6410 IDEA6410 3046 -qbc9263 MACH_QBC9263 QBC9263 3047 -borabora MACH_BORABORA BORABORA 3048 -valdez MACH_VALDEZ VALDEZ 3049 -ls9g20 MACH_LS9G20 LS9G20 3050 -mios_v1 MACH_MIOS_V1 MIOS_V1 3051 -s5pc110_crespo MACH_S5PC110_CRESPO S5PC110_CRESPO 3052 -controltek9g20 MACH_CONTROLTEK9G20 CONTROLTEK9G20 3053 -tin307 MACH_TIN307 TIN307 3054 -tin510 MACH_TIN510 TIN510 3055 -bluecheese MACH_BLUECHEESE BLUECHEESE 3057 -tem3x30 MACH_TEM3X30 TEM3X30 3058 -harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059 -msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060 -spear900 MACH_SPEAR900 SPEAR900 3061 pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 -rdstor MACH_RDSTOR RDSTOR 3063 -usdloader MACH_USDLOADER USDLOADER 3064 -tsoploader MACH_TSOPLOADER TSOPLOADER 3065 -kronos MACH_KRONOS KRONOS 3066 -ffcore MACH_FFCORE FFCORE 3067 -mone MACH_MONE MONE 3068 -unit2s MACH_UNIT2S UNIT2S 3069 -acer_a5 MACH_ACER_A5 ACER_A5 3070 -etherpro_isp MACH_ETHERPRO_ISP ETHERPRO_ISP 3071 -stretchs7000 MACH_STRETCHS7000 STRETCHS7000 3072 -p87_smartsim MACH_P87_SMARTSIM P87_SMARTSIM 3073 -tulip MACH_TULIP TULIP 3074 -sunflower MACH_SUNFLOWER SUNFLOWER 3075 -rib MACH_RIB RIB 3076 -clod MACH_CLOD CLOD 3077 -rump MACH_RUMP RUMP 3078 -tenderloin MACH_TENDERLOIN TENDERLOIN 3079 -shortloin MACH_SHORTLOIN SHORTLOIN 3080 -antares MACH_ANTARES ANTARES 3082 -wb40n MACH_WB40N WB40N 3083 -herring MACH_HERRING HERRING 3084 -naxy400 MACH_NAXY400 NAXY400 3085 -naxy1200 MACH_NAXY1200 NAXY1200 3086 vpr200 MACH_VPR200 VPR200 3087 -bug20 MACH_BUG20 BUG20 3088 -goflexnet MACH_GOFLEXNET GOFLEXNET 3089 torbreck MACH_TORBRECK TORBRECK 3090 -saarb_mg1 MACH_SAARB_MG1 SAARB_MG1 3091 -callisto MACH_CALLISTO CALLISTO 3092 -multhsu MACH_MULTHSU MULTHSU 3093 -saluda MACH_SALUDA SALUDA 3094 -pemp_omap3_apollo MACH_PEMP_OMAP3_APOLLO PEMP_OMAP3_APOLLO 3095 -vc0718 MACH_VC0718 VC0718 3096 -mvblx MACH_MVBLX MVBLX 3097 -inhand_apeiron MACH_INHAND_APEIRON INHAND_APEIRON 3098 -inhand_fury MACH_INHAND_FURY INHAND_FURY 3099 -inhand_siren MACH_INHAND_SIREN INHAND_SIREN 3100 -hdnvp MACH_HDNVP HDNVP 3101 -softwinner MACH_SOFTWINNER SOFTWINNER 3102 prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103 -nas6210 MACH_NAS6210 NAS6210 3104 -unisdev MACH_UNISDEV UNISDEV 3105 -sbca11 MACH_SBCA11 SBCA11 3106 -saga MACH_SAGA SAGA 3107 -ns_k330 MACH_NS_K330 NS_K330 3108 -tanna MACH_TANNA TANNA 3109 -imate8502 MACH_IMATE8502 IMATE8502 3110 -aspen MACH_ASPEN ASPEN 3111 -daintree_cwac MACH_DAINTREE_CWAC DAINTREE_CWAC 3112 -zmx25 MACH_ZMX25 ZMX25 3113 -maple1 MACH_MAPLE1 MAPLE1 3114 -qsd8x72_surf MACH_QSD8X72_SURF QSD8X72_SURF 3115 -qsd8x72_ffa MACH_QSD8X72_FFA QSD8X72_FFA 3116 -abilene MACH_ABILENE ABILENE 3117 -eigen_ttr MACH_EIGEN_TTR EIGEN_TTR 3118 -iomega_ix2_200 MACH_IOMEGA_IX2_200 IOMEGA_IX2_200 3119 -coretec_vcx7400 MACH_CORETEC_VCX7400 CORETEC_VCX7400 3120 -santiago MACH_SANTIAGO SANTIAGO 3121 -mx257sol MACH_MX257SOL MX257SOL 3122 -strasbourg MACH_STRASBOURG STRASBOURG 3123 -msm8x60_fluid MACH_MSM8X60_FLUID MSM8X60_FLUID 3124 -smartqv5 MACH_SMARTQV5 SMARTQV5 3125 -smartqv3 MACH_SMARTQV3 SMARTQV3 3126 -smartqv7 MACH_SMARTQV7 SMARTQV7 3127 paz00 MACH_PAZ00 PAZ00 3128 acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 -fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131 -hdgu MACH_HDGU HDGU 3132 -pyramid MACH_PYRAMID PYRAMID 3133 -epiphan MACH_EPIPHAN EPIPHAN 3134 -omap_bender MACH_OMAP_BENDER OMAP_BENDER 3135 -gurnard MACH_GURNARD GURNARD 3136 -gtl_it5100 MACH_GTL_IT5100 GTL_IT5100 3137 -bcm2708 MACH_BCM2708 BCM2708 3138 -mx51_ggc MACH_MX51_GGC MX51_GGC 3139 -sharespace MACH_SHARESPACE SHARESPACE 3140 -haba_knx_explorer MACH_HABA_KNX_EXPLORER HABA_KNX_EXPLORER 3141 -simtec_kirkmod MACH_SIMTEC_KIRKMOD SIMTEC_KIRKMOD 3142 -crux MACH_CRUX CRUX 3143 -mx51_bravo MACH_MX51_BRAVO MX51_BRAVO 3144 -charon MACH_CHARON CHARON 3145 -picocom3 MACH_PICOCOM3 PICOCOM3 3146 -picocom4 MACH_PICOCOM4 PICOCOM4 3147 -serrano MACH_SERRANO SERRANO 3148 -doubleshot MACH_DOUBLESHOT DOUBLESHOT 3149 -evsy MACH_EVSY EVSY 3150 -huashan MACH_HUASHAN HUASHAN 3151 -lausanne MACH_LAUSANNE LAUSANNE 3152 -emerald MACH_EMERALD EMERALD 3153 -tqma35 MACH_TQMA35 TQMA35 3154 -marvel MACH_MARVEL MARVEL 3155 -manuae MACH_MANUAE MANUAE 3156 -chacha MACH_CHACHA CHACHA 3157 -lemon MACH_LEMON LEMON 3158 -csc MACH_CSC CSC 3159 -gira_knxip_router MACH_GIRA_KNXIP_ROUTER GIRA_KNXIP_ROUTER 3160 -t20 MACH_T20 T20 3161 -hdmini MACH_HDMINI HDMINI 3162 -sciphone_g2 MACH_SCIPHONE_G2 SCIPHONE_G2 3163 -express MACH_EXPRESS EXPRESS 3164 -express_kt MACH_EXPRESS_KT EXPRESS_KT 3165 -maximasp MACH_MAXIMASP MAXIMASP 3166 -nitrogen_imx51 MACH_NITROGEN_IMX51 NITROGEN_IMX51 3167 -nitrogen_imx53 MACH_NITROGEN_IMX53 NITROGEN_IMX53 3168 -sunfire MACH_SUNFIRE SUNFIRE 3169 -arowana MACH_AROWANA AROWANA 3170 -tegra_daytona MACH_TEGRA_DAYTONA TEGRA_DAYTONA 3171 -tegra_swordfish MACH_TEGRA_SWORDFISH TEGRA_SWORDFISH 3172 -edison MACH_EDISON EDISON 3173 -svp8500v1 MACH_SVP8500V1 SVP8500V1 3174 -svp8500v2 MACH_SVP8500V2 SVP8500V2 3175 -svp5500 MACH_SVP5500 SVP5500 3176 -b5500 MACH_B5500 B5500 3177 -s5500 MACH_S5500 S5500 3178 -icon MACH_ICON ICON 3179 -elephant MACH_ELEPHANT ELEPHANT 3180 -shooter MACH_SHOOTER SHOOTER 3182 -spade_lte MACH_SPADE_LTE SPADE_LTE 3183 -philhwani MACH_PHILHWANI PHILHWANI 3184 -gsncomm MACH_GSNCOMM GSNCOMM 3185 -strasbourg_a2 MACH_STRASBOURG_A2 STRASBOURG_A2 3186 -mmm MACH_MMM MMM 3187 -davinci_dm365_bv MACH_DAVINCI_DM365_BV DAVINCI_DM365_BV 3188 ag5evm MACH_AG5EVM AG5EVM 3189 -sc575plc MACH_SC575PLC SC575PLC 3190 -sc575hmi MACH_SC575IPC SC575IPC 3191 -omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192 -top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194 -top9000_su MACH_TOP9000_SU TOP9000_SU 3195 -utm300 MACH_UTM300 UTM300 3196 tsunagi MACH_TSUNAGI TSUNAGI 3197 -ts75xx MACH_TS75XX TS75XX 3198 -ts47xx MACH_TS47XX TS47XX 3200 -da850_k5 MACH_DA850_K5 DA850_K5 3201 -ax502 MACH_AX502 AX502 3202 -igep0032 MACH_IGEP0032 IGEP0032 3203 -antero MACH_ANTERO ANTERO 3204 -synergy MACH_SYNERGY SYNERGY 3205 ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 -punica MACH_PUNICA PUNICA 3208 trimslice MACH_TRIMSLICE TRIMSLICE 3209 -mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210 mackerel MACH_MACKEREL MACKEREL 3211 -fa9x27 MACH_FA9X27 FA9X27 3213 -ns2816tb MACH_NS2816TB NS2816TB 3214 -ns2816_ntpad MACH_NS2816_NTPAD NS2816_NTPAD 3215 -ns2816_ntnb MACH_NS2816_NTNB NS2816_NTNB 3216 kaen MACH_KAEN KAEN 3217 -nv1000 MACH_NV1000 NV1000 3218 -nuc950ts MACH_NUC950TS NUC950TS 3219 nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220 -ast2200 MACH_AST2200 AST2200 3221 -lead MACH_LEAD LEAD 3222 -unino1 MACH_UNINO1 UNINO1 3223 -greeco MACH_GREECO GREECO 3224 -verdi MACH_VERDI VERDI 3225 dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226 quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227 abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228 @@ -949,13 +621,11 @@ koi MACH_KOI KOI 3312 ts4800 MACH_TS4800 TS4800 3313 tqma9263 MACH_TQMA9263 TQMA9263 3314 holiday MACH_HOLIDAY HOLIDAY 3315 -dma_6410 MACH_DMA6410 DMA6410 3316 pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317 hwgw6410 MACH_HWGW6410 HWGW6410 3318 shenzhou MACH_SHENZHOU SHENZHOU 3319 cwme9210 MACH_CWME9210 CWME9210 3320 cwme9210js MACH_CWME9210JS CWME9210JS 3321 -pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322 colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323 w21 MACH_W21 W21 3324 polysat1 MACH_POLYSAT1 POLYSAT1 3325 @@ -1021,13 +691,11 @@ viprinet MACH_VIPRINET VIPRINET 3385 bockw MACH_BOCKW BOCKW 3386 eva2000 MACH_EVA2000 EVA2000 3387 steelyard MACH_STEELYARD STEELYARD 3388 -sdh001 MACH_MACH_SDH001 MACH_SDH001 3390 nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392 geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393 spear1340 MACH_SPEAR1340 SPEAR1340 3394 rexmas MACH_REXMAS REXMAS 3395 msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396 -msm8960_mdp MACH_MSM8960_MDP MSM8960_MDP 3397 msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398 msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399 helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400 @@ -1123,6 +791,381 @@ blissc MACH_BLISSC BLISSC 3491 thales_adc MACH_THALES_ADC THALES_ADC 3492 ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 atdgp318 MACH_ATDGP318 ATDGP318 3494 +dma210u MACH_DMA210U DMA210U 3495 +em_t3 MACH_EM_T3 EM_T3 3496 +htx3250 MACH_HTX3250 HTX3250 3497 +g50 MACH_G50 G50 3498 +eco5 MACH_ECO5 ECO5 3499 +wintergrasp MACH_WINTERGRASP WINTERGRASP 3500 +puro MACH_PURO PURO 3501 +shooter_k MACH_SHOOTER_K SHOOTER_K 3502 +nspire MACH_NSPIRE NSPIRE 3503 +mickxx MACH_MICKXX MICKXX 3504 +lxmb MACH_LXMB LXMB 3505 +adam MACH_ADAM ADAM 3507 +b1004 MACH_B1004 B1004 3508 +oboea MACH_OBOEA OBOEA 3509 +a1015 MACH_A1015 A1015 3510 +robin_vbdt30 MACH_ROBIN_VBDT30 ROBIN_VBDT30 3511 +tegra_enterprise MACH_TEGRA_ENTERPRISE TEGRA_ENTERPRISE 3512 +rfl108200_mk10 MACH_RFL108200_MK10 RFL108200_MK10 3513 +rfl108300_mk16 MACH_RFL108300_MK16 RFL108300_MK16 3514 +rover_v7 MACH_ROVER_V7 ROVER_V7 3515 +miphone MACH_MIPHONE MIPHONE 3516 +femtobts MACH_FEMTOBTS FEMTOBTS 3517 +monopoli MACH_MONOPOLI MONOPOLI 3518 +boss MACH_BOSS BOSS 3519 +davinci_dm368_vtam MACH_DAVINCI_DM368_VTAM DAVINCI_DM368_VTAM 3520 +clcon MACH_CLCON CLCON 3521 +nokia_rm696 MACH_NOKIA_RM696 NOKIA_RM696 3522 +tahiti MACH_TAHITI TAHITI 3523 +fighter MACH_FIGHTER FIGHTER 3524 +sgh_i710 MACH_SGH_I710 SGH_I710 3525 +integreproscb MACH_INTEGREPROSCB INTEGREPROSCB 3526 +monza MACH_MONZA MONZA 3527 +calimain MACH_CALIMAIN CALIMAIN 3528 +mx6q_sabreauto MACH_MX6Q_SABREAUTO MX6Q_SABREAUTO 3529 +gma01x MACH_GMA01X GMA01X 3530 +sbc51 MACH_SBC51 SBC51 3531 +fit MACH_FIT FIT 3532 +steelhead MACH_STEELHEAD STEELHEAD 3533 +panther MACH_PANTHER PANTHER 3534 +msm8960_liquid MACH_MSM8960_LIQUID MSM8960_LIQUID 3535 +lexikonct MACH_LEXIKONCT LEXIKONCT 3536 +ns2816_stb MACH_NS2816_STB NS2816_STB 3537 +sei_mm2_lpc3250 MACH_SEI_MM2_LPC3250 SEI_MM2_LPC3250 3538 +cmimx53 MACH_CMIMX53 CMIMX53 3539 +sandwich MACH_SANDWICH SANDWICH 3540 +chief MACH_CHIEF CHIEF 3541 +pogo_e02 MACH_POGO_E02 POGO_E02 3542 +mikrap_x168 MACH_MIKRAP_X168 MIKRAP_X168 3543 +htcmozart MACH_HTCMOZART HTCMOZART 3544 +htcgold MACH_HTCGOLD HTCGOLD 3545 +mt72xx MACH_MT72XX MT72XX 3546 +mx51_ivy MACH_MX51_IVY MX51_IVY 3547 +mx51_lvd MACH_MX51_LVD MX51_LVD 3548 +omap3_wiser2 MACH_OMAP3_WISER2 OMAP3_WISER2 3549 +dreamplug MACH_DREAMPLUG DREAMPLUG 3550 +cobas_c_111 MACH_COBAS_C_111 COBAS_C_111 3551 +cobas_u_411 MACH_COBAS_U_411 COBAS_U_411 3552 +hssd MACH_HSSD HSSD 3553 +iom35x MACH_IOM35X IOM35X 3554 +psom_omap MACH_PSOM_OMAP PSOM_OMAP 3555 +iphone_2g MACH_IPHONE_2G IPHONE_2G 3556 +iphone_3g MACH_IPHONE_3G IPHONE_3G 3557 +ipod_touch_1g MACH_IPOD_TOUCH_1G IPOD_TOUCH_1G 3558 +pharos_tpc MACH_PHAROS_TPC PHAROS_TPC 3559 +mx53_hydra MACH_MX53_HYDRA MX53_HYDRA 3560 +ns2816_dev_board MACH_NS2816_DEV_BOARD NS2816_DEV_BOARD 3561 +iphone_3gs MACH_IPHONE_3GS IPHONE_3GS 3562 +iphone_4 MACH_IPHONE_4 IPHONE_4 3563 +ipod_touch_4g MACH_IPOD_TOUCH_4G IPOD_TOUCH_4G 3564 +dragon_e1100 MACH_DRAGON_E1100 DRAGON_E1100 3565 +topside MACH_TOPSIDE TOPSIDE 3566 +irisiii MACH_IRISIII IRISIII 3567 +deto_macarm9 MACH_DETO_MACARM9 DETO_MACARM9 3568 +eti_d1 MACH_ETI_D1 ETI_D1 3569 +som3530sdk MACH_SOM3530SDK SOM3530SDK 3570 +oc_engine MACH_OC_ENGINE OC_ENGINE 3571 +apq8064_sim MACH_APQ8064_SIM APQ8064_SIM 3572 +alps MACH_ALPS ALPS 3575 +tny_t3730 MACH_TNY_T3730 TNY_T3730 3576 +geryon_nfe MACH_GERYON_NFE GERYON_NFE 3577 +ns2816_ref_board MACH_NS2816_REF_BOARD NS2816_REF_BOARD 3578 +silverstone MACH_SILVERSTONE SILVERSTONE 3579 +mtt2440 MACH_MTT2440 MTT2440 3580 +ynicdb MACH_YNICDB YNICDB 3581 +bct MACH_BCT BCT 3582 +tuscan MACH_TUSCAN TUSCAN 3583 +xbt_sam9g45 MACH_XBT_SAM9G45 XBT_SAM9G45 3584 +enbw_cmc MACH_ENBW_CMC ENBW_CMC 3585 +ch104mx257 MACH_CH104MX257 CH104MX257 3587 +openpri MACH_OPENPRI OPENPRI 3588 +am335xevm MACH_AM335XEVM AM335XEVM 3589 +picodmb MACH_PICODMB PICODMB 3590 +waluigi MACH_WALUIGI WALUIGI 3591 +punicag7 MACH_PUNICAG7 PUNICAG7 3592 +ipad_1g MACH_IPAD_1G IPAD_1G 3593 +appletv_2g MACH_APPLETV_2G APPLETV_2G 3594 +mach_ecog45 MACH_MACH_ECOG45 MACH_ECOG45 3595 +ait_cam_enc_4xx MACH_AIT_CAM_ENC_4XX AIT_CAM_ENC_4XX 3596 +runnymede MACH_RUNNYMEDE RUNNYMEDE 3597 +play MACH_PLAY PLAY 3598 +hw90260 MACH_HW90260 HW90260 3599 +tagh MACH_TAGH TAGH 3600 +filbert MACH_FILBERT FILBERT 3601 +getinge_netcomv3 MACH_GETINGE_NETCOMV3 GETINGE_NETCOMV3 3602 +cw20 MACH_CW20 CW20 3603 +cinema MACH_CINEMA CINEMA 3604 +cinema_tea MACH_CINEMA_TEA CINEMA_TEA 3605 +cinema_coffee MACH_CINEMA_COFFEE CINEMA_COFFEE 3606 +cinema_juice MACH_CINEMA_JUICE CINEMA_JUICE 3607 +mx53_mirage2 MACH_MX53_MIRAGE2 MX53_MIRAGE2 3609 +mx53_efikasb MACH_MX53_EFIKASB MX53_EFIKASB 3610 +stm_b2000 MACH_STM_B2000 STM_B2000 3612 m28evk MACH_M28EVK M28EVK 3613 +pda MACH_PDA PDA 3614 +meraki_mr58 MACH_MERAKI_MR58 MERAKI_MR58 3615 +kota2 MACH_KOTA2 KOTA2 3616 +letcool MACH_LETCOOL LETCOOL 3617 +mx27iat MACH_MX27IAT MX27IAT 3618 +apollo_td MACH_APOLLO_TD APOLLO_TD 3619 +arena MACH_ARENA ARENA 3620 +gsngateway MACH_GSNGATEWAY GSNGATEWAY 3621 +lf2000 MACH_LF2000 LF2000 3622 +bonito MACH_BONITO BONITO 3623 +asymptote MACH_ASYMPTOTE ASYMPTOTE 3624 +bst2brd MACH_BST2BRD BST2BRD 3625 +tx335s MACH_TX335S TX335S 3626 +pelco_tesla MACH_PELCO_TESLA PELCO_TESLA 3627 +rrhtestplat MACH_RRHTESTPLAT RRHTESTPLAT 3628 +vidtonic_pro MACH_VIDTONIC_PRO VIDTONIC_PRO 3629 +pl_apollo MACH_PL_APOLLO PL_APOLLO 3630 +pl_phoenix MACH_PL_PHOENIX PL_PHOENIX 3631 +m28cu3 MACH_M28CU3 M28CU3 3632 +vvbox_hd MACH_VVBOX_HD VVBOX_HD 3633 +coreware_sam9260_ MACH_COREWARE_SAM9260_ COREWARE_SAM9260_ 3634 +marmaduke MACH_MARMADUKE MARMADUKE 3635 +amg_xlcore_camera MACH_AMG_XLCORE_CAMERA AMG_XLCORE_CAMERA 3636 +omap3_egf MACH_OMAP3_EGF OMAP3_EGF 3637 smdk4212 MACH_SMDK4212 SMDK4212 3638 +dnp9200 MACH_DNP9200 DNP9200 3639 +tf101 MACH_TF101 TF101 3640 +omap3silvio MACH_OMAP3SILVIO OMAP3SILVIO 3641 +picasso2 MACH_PICASSO2 PICASSO2 3642 +vangogh2 MACH_VANGOGH2 VANGOGH2 3643 +olpc_xo_1_75 MACH_OLPC_XO_1_75 OLPC_XO_1_75 3644 +gx400 MACH_GX400 GX400 3645 +gs300 MACH_GS300 GS300 3646 +acer_a9 MACH_ACER_A9 ACER_A9 3647 +vivow_evm MACH_VIVOW_EVM VIVOW_EVM 3648 +veloce_cxq MACH_VELOCE_CXQ VELOCE_CXQ 3649 +veloce_cxm MACH_VELOCE_CXM VELOCE_CXM 3650 +p1852 MACH_P1852 P1852 3651 +naxy100 MACH_NAXY100 NAXY100 3652 +taishan MACH_TAISHAN TAISHAN 3653 +touchlink MACH_TOUCHLINK TOUCHLINK 3654 +stm32f103ze MACH_STM32F103ZE STM32F103ZE 3655 +mcx MACH_MCX MCX 3656 +stm_nmhdk_fli7610 MACH_STM_NMHDK_FLI7610 STM_NMHDK_FLI7610 3657 +top28x MACH_TOP28X TOP28X 3658 +okl4vp_microvisor MACH_OKL4VP_MICROVISOR OKL4VP_MICROVISOR 3659 +pop MACH_POP POP 3660 +layer MACH_LAYER LAYER 3661 +trondheim MACH_TRONDHEIM TRONDHEIM 3662 +eva MACH_EVA EVA 3663 +trust_taurus MACH_TRUST_TAURUS TRUST_TAURUS 3664 +ns2816_huashan MACH_NS2816_HUASHAN NS2816_HUASHAN 3665 +ns2816_yangcheng MACH_NS2816_YANGCHENG NS2816_YANGCHENG 3666 +p852 MACH_P852 P852 3667 +flea3 MACH_FLEA3 FLEA3 3668 +bowfin MACH_BOWFIN BOWFIN 3669 +mv88de3100 MACH_MV88DE3100 MV88DE3100 3670 +pia_am35x MACH_PIA_AM35X PIA_AM35X 3671 +cedar MACH_CEDAR CEDAR 3672 +picasso_e MACH_PICASSO_E PICASSO_E 3673 +samsung_e60 MACH_SAMSUNG_E60 SAMSUNG_E60 3674 +sdvr_mini MACH_SDVR_MINI SDVR_MINI 3676 +omap3_ij3k MACH_OMAP3_IJ3K OMAP3_IJ3K 3677 +modasmc1 MACH_MODASMC1 MODASMC1 3678 +apq8064_rumi3 MACH_APQ8064_RUMI3 APQ8064_RUMI3 3679 +matrix506 MACH_MATRIX506 MATRIX506 3680 +msm9615_mtp MACH_MSM9615_MTP MSM9615_MTP 3681 +dm36x_spawndc MACH_DM36X_SPAWNDC DM36X_SPAWNDC 3682 +sff792 MACH_SFF792 SFF792 3683 +am335xiaevm MACH_AM335XIAEVM AM335XIAEVM 3684 +g3c2440 MACH_G3C2440 G3C2440 3685 +tion270 MACH_TION270 TION270 3686 +w22q7arm02 MACH_W22Q7ARM02 W22Q7ARM02 3687 +omap_cat MACH_OMAP_CAT OMAP_CAT 3688 +at91sam9n12ek MACH_AT91SAM9N12EK AT91SAM9N12EK 3689 +morrison MACH_MORRISON MORRISON 3690 +svdu MACH_SVDU SVDU 3691 +lpp01 MACH_LPP01 LPP01 3692 +ubc283 MACH_UBC283 UBC283 3693 +zeppelin MACH_ZEPPELIN ZEPPELIN 3694 +motus MACH_MOTUS MOTUS 3695 +neomainboard MACH_NEOMAINBOARD NEOMAINBOARD 3696 +devkit3250 MACH_DEVKIT3250 DEVKIT3250 3697 +devkit7000 MACH_DEVKIT7000 DEVKIT7000 3698 +fmc_uic MACH_FMC_UIC FMC_UIC 3699 +fmc_dcm MACH_FMC_DCM FMC_DCM 3700 +batwm MACH_BATWM BATWM 3701 +atlas6cb MACH_ATLAS6CB ATLAS6CB 3702 +blue MACH_BLUE BLUE 3705 +colorado MACH_COLORADO COLORADO 3706 +popc MACH_POPC POPC 3707 +promwad_jade MACH_PROMWAD_JADE PROMWAD_JADE 3708 +amp MACH_AMP AMP 3709 +gnet_amp MACH_GNET_AMP GNET_AMP 3710 +toques MACH_TOQUES TOQUES 3711 +dct_storm MACH_DCT_STORM DCT_STORM 3713 +owl MACH_OWL OWL 3715 +cogent_csb1741 MACH_COGENT_CSB1741 COGENT_CSB1741 3716 +adillustra610 MACH_ADILLUSTRA610 ADILLUSTRA610 3718 +ecafe_na04 MACH_ECAFE_NA04 ECAFE_NA04 3719 +popct MACH_POPCT POPCT 3720 +omap3_helena MACH_OMAP3_HELENA OMAP3_HELENA 3721 +ach MACH_ACH ACH 3722 +module_dtb MACH_MODULE_DTB MODULE_DTB 3723 +oslo_elisabeth MACH_OSLO_ELISABETH OSLO_ELISABETH 3725 +tt01 MACH_TT01 TT01 3726 +msm8930_cdp MACH_MSM8930_CDP MSM8930_CDP 3727 +msm8930_mtp MACH_MSM8930_MTP MSM8930_MTP 3728 +msm8930_fluid MACH_MSM8930_FLUID MSM8930_FLUID 3729 +ltu11 MACH_LTU11 LTU11 3730 +am1808_spawnco MACH_AM1808_SPAWNCO AM1808_SPAWNCO 3731 +flx6410 MACH_FLX6410 FLX6410 3732 +mx6q_qsb MACH_MX6Q_QSB MX6Q_QSB 3733 +mx53_plt424 MACH_MX53_PLT424 MX53_PLT424 3734 +jasmine MACH_JASMINE JASMINE 3735 +l138_owlboard_plus MACH_L138_OWLBOARD_PLUS L138_OWLBOARD_PLUS 3736 +wr21 MACH_WR21 WR21 3737 +peaboy MACH_PEABOY PEABOY 3739 +mx28_plato MACH_MX28_PLATO MX28_PLATO 3740 +kacom2 MACH_KACOM2 KACOM2 3741 +slco MACH_SLCO SLCO 3742 +imx51pico MACH_IMX51PICO IMX51PICO 3743 +glink1 MACH_GLINK1 GLINK1 3744 +diamond MACH_DIAMOND DIAMOND 3745 +d9000 MACH_D9000 D9000 3746 +w5300e01 MACH_W5300E01 W5300E01 3747 +im6000 MACH_IM6000 IM6000 3748 +mx51_fred51 MACH_MX51_FRED51 MX51_FRED51 3749 +stm32f2 MACH_STM32F2 STM32F2 3750 +ville MACH_VILLE VILLE 3751 +ptip_murnau MACH_PTIP_MURNAU PTIP_MURNAU 3752 +ptip_classic MACH_PTIP_CLASSIC PTIP_CLASSIC 3753 +mx53grb MACH_MX53GRB MX53GRB 3754 +gagarin MACH_GAGARIN GAGARIN 3755 +nas2big MACH_NAS2BIG NAS2BIG 3757 +superfemto MACH_SUPERFEMTO SUPERFEMTO 3758 +teufel MACH_TEUFEL TEUFEL 3759 +dinara MACH_DINARA DINARA 3760 +vanquish MACH_VANQUISH VANQUISH 3761 +zipabox1 MACH_ZIPABOX1 ZIPABOX1 3762 +u9540 MACH_U9540 U9540 3763 +jet MACH_JET JET 3764 smdk4412 MACH_SMDK4412 SMDK4412 3765 +elite MACH_ELITE ELITE 3766 +spear320_hmi MACH_SPEAR320_HMI SPEAR320_HMI 3767 +ontario MACH_ONTARIO ONTARIO 3768 +mx6q_sabrelite MACH_MX6Q_SABRELITE MX6Q_SABRELITE 3769 +vc200 MACH_VC200 VC200 3770 +msm7625a_ffa MACH_MSM7625A_FFA MSM7625A_FFA 3771 +msm7625a_surf MACH_MSM7625A_SURF MSM7625A_SURF 3772 +benthossbp MACH_BENTHOSSBP BENTHOSSBP 3773 +smdk5210 MACH_SMDK5210 SMDK5210 3774 +empq2300 MACH_EMPQ2300 EMPQ2300 3775 +minipos MACH_MINIPOS MINIPOS 3776 +omap5_sevm MACH_OMAP5_SEVM OMAP5_SEVM 3777 +shelter MACH_SHELTER SHELTER 3778 +omap3_devkit8500 MACH_OMAP3_DEVKIT8500 OMAP3_DEVKIT8500 3779 +edgetd MACH_EDGETD EDGETD 3780 +copperyard MACH_COPPERYARD COPPERYARD 3781 +edge MACH_EDGE EDGE 3782 +edge_u MACH_EDGE_U EDGE_U 3783 +edge_td MACH_EDGE_TD EDGE_TD 3784 +wdss MACH_WDSS WDSS 3785 +dl_pb25 MACH_DL_PB25 DL_PB25 3786 +dss11 MACH_DSS11 DSS11 3787 +cpa MACH_CPA CPA 3788 +aptp2000 MACH_APTP2000 APTP2000 3789 +marzen MACH_MARZEN MARZEN 3790 +st_turbine MACH_ST_TURBINE ST_TURBINE 3791 +gtl_it3300 MACH_GTL_IT3300 GTL_IT3300 3792 +mx6_mule MACH_MX6_MULE MX6_MULE 3793 +v7pxa_dt MACH_V7PXA_DT V7PXA_DT 3794 +v7mmp_dt MACH_V7MMP_DT V7MMP_DT 3795 +dragon7 MACH_DRAGON7 DRAGON7 3796 +krome MACH_KROME KROME 3797 +oratisdante MACH_ORATISDANTE ORATISDANTE 3798 +fathom MACH_FATHOM FATHOM 3799 +dns325 MACH_DNS325 DNS325 3800 +sarnen MACH_SARNEN SARNEN 3801 +ubisys_g1 MACH_UBISYS_G1 UBISYS_G1 3802 +mx53_pf1 MACH_MX53_PF1 MX53_PF1 3803 +asanti MACH_ASANTI ASANTI 3804 +volta MACH_VOLTA VOLTA 3805 +knight MACH_KNIGHT KNIGHT 3807 +beaglebone MACH_BEAGLEBONE BEAGLEBONE 3808 +becker MACH_BECKER BECKER 3809 +fc360 MACH_FC360 FC360 3810 +pmi2_xls MACH_PMI2_XLS PMI2_XLS 3811 +taranto MACH_TARANTO TARANTO 3812 +plutux MACH_PLUTUX PLUTUX 3813 +ipmp_medcom MACH_IPMP_MEDCOM IPMP_MEDCOM 3814 +absolut MACH_ABSOLUT ABSOLUT 3815 +awpb3 MACH_AWPB3 AWPB3 3816 +nfp32xx_dt MACH_NFP32XX_DT NFP32XX_DT 3817 +dl_pb53 MACH_DL_PB53 DL_PB53 3818 +acu_ii MACH_ACU_II ACU_II 3819 +avalon MACH_AVALON AVALON 3820 +sphinx MACH_SPHINX SPHINX 3821 +titan_t MACH_TITAN_T TITAN_T 3822 +harvest_boris MACH_HARVEST_BORIS HARVEST_BORIS 3823 +mach_msm7x30_m3s MACH_MACH_MSM7X30_M3S MACH_MSM7X30_M3S 3824 +smdk5250 MACH_SMDK5250 SMDK5250 3825 +imxt_lite MACH_IMXT_LITE IMXT_LITE 3826 +imxt_std MACH_IMXT_STD IMXT_STD 3827 +imxt_log MACH_IMXT_LOG IMXT_LOG 3828 +imxt_nav MACH_IMXT_NAV IMXT_NAV 3829 +imxt_full MACH_IMXT_FULL IMXT_FULL 3830 +ag09015 MACH_AG09015 AG09015 3831 +am3517_mt_ventoux MACH_AM3517_MT_VENTOUX AM3517_MT_VENTOUX 3832 +dp1arm9 MACH_DP1ARM9 DP1ARM9 3833 +picasso_m MACH_PICASSO_M PICASSO_M 3834 +video_gadget MACH_VIDEO_GADGET VIDEO_GADGET 3835 +mtt_om3x MACH_MTT_OM3X MTT_OM3X 3836 +mx6q_arm2 MACH_MX6Q_ARM2 MX6Q_ARM2 3837 +picosam9g45 MACH_PICOSAM9G45 PICOSAM9G45 3838 +vpm_dm365 MACH_VPM_DM365 VPM_DM365 3839 +bonfire MACH_BONFIRE BONFIRE 3840 +mt2p2d MACH_MT2P2D MT2P2D 3841 +sigpda01 MACH_SIGPDA01 SIGPDA01 3842 +cn27 MACH_CN27 CN27 3843 +mx25_cwtap MACH_MX25_CWTAP MX25_CWTAP 3844 +apf28 MACH_APF28 APF28 3845 +pelco_maxwell MACH_PELCO_MAXWELL PELCO_MAXWELL 3846 +ge_phoenix MACH_GE_PHOENIX GE_PHOENIX 3847 +empc_a500 MACH_EMPC_A500 EMPC_A500 3848 +ims_arm9 MACH_IMS_ARM9 IMS_ARM9 3849 +mini2416 MACH_MINI2416 MINI2416 3850 +mini2450 MACH_MINI2450 MINI2450 3851 +mini310 MACH_MINI310 MINI310 3852 +spear_hurricane MACH_SPEAR_HURRICANE SPEAR_HURRICANE 3853 +mt7208 MACH_MT7208 MT7208 3854 +lpc178x MACH_LPC178X LPC178X 3855 +farleys MACH_FARLEYS FARLEYS 3856 +efm32gg_dk3750 MACH_EFM32GG_DK3750 EFM32GG_DK3750 3857 +zeus_board MACH_ZEUS_BOARD ZEUS_BOARD 3858 +cc51 MACH_CC51 CC51 3859 +fxi_c210 MACH_FXI_C210 FXI_C210 3860 +msm8627_cdp MACH_MSM8627_CDP MSM8627_CDP 3861 +msm8627_mtp MACH_MSM8627_MTP MSM8627_MTP 3862 +armadillo800eva MACH_ARMADILLO800EVA ARMADILLO800EVA 3863 +primou MACH_PRIMOU PRIMOU 3864 +primoc MACH_PRIMOC PRIMOC 3865 +primoct MACH_PRIMOCT PRIMOCT 3866 +a9500 MACH_A9500 A9500 3867 +pluto MACH_PLUTO PLUTO 3869 +acfx100 MACH_ACFX100 ACFX100 3870 +msm8625_rumi3 MACH_MSM8625_RUMI3 MSM8625_RUMI3 3871 +valente MACH_VALENTE VALENTE 3872 +crfs_rfeye MACH_CRFS_RFEYE CRFS_RFEYE 3873 +rfeye MACH_RFEYE RFEYE 3874 +phidget_sbc3 MACH_PHIDGET_SBC3 PHIDGET_SBC3 3875 +tcw_mika MACH_TCW_MIKA TCW_MIKA 3876 +imx28_egf MACH_IMX28_EGF IMX28_EGF 3877 +valente_wx MACH_VALENTE_WX VALENTE_WX 3878 +huangshans MACH_HUANGSHANS HUANGSHANS 3879 +bosphorus1 MACH_BOSPHORUS1 BOSPHORUS1 3880 +prima MACH_PRIMA PRIMA 3881 +evita_ulk MACH_EVITA_ULK EVITA_ULK 3884 +merisc600 MACH_MERISC600 MERISC600 3885 +dolak MACH_DOLAK DOLAK 3886 +sbc53 MACH_SBC53 SBC53 3887 +elite_ulk MACH_ELITE_ULK ELITE_ULK 3888 +pov2 MACH_POV2 POV2 3889 +ipod_touch_2g MACH_IPOD_TOUCH_2G IPOD_TOUCH_2G 3890 +da850_pqab MACH_DA850_PQAB DA850_PQAB 3891 diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h index 6073b18..5a274af 100644 --- a/arch/ia64/include/asm/cputime.h +++ b/arch/ia64/include/asm/cputime.h @@ -60,6 +60,7 @@ typedef u64 cputime64_t; */ #define cputime_to_usecs(__ct) ((__ct) / NSEC_PER_USEC) #define usecs_to_cputime(__usecs) ((__usecs) * NSEC_PER_USEC) +#define usecs_to_cputime64(__usecs) usecs_to_cputime(__usecs) /* * Convert cputime <-> seconds diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h index 1cf20bd..98b7c4b 100644 --- a/arch/powerpc/include/asm/cputime.h +++ b/arch/powerpc/include/asm/cputime.h @@ -150,6 +150,8 @@ static inline cputime_t usecs_to_cputime(const unsigned long us) return ct; } +#define usecs_to_cputime64(us) usecs_to_cputime(us) + /* * Convert cputime <-> seconds */ diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h index d4df013..69c7377 100644 --- a/arch/powerpc/include/asm/kvm_book3s.h +++ b/arch/powerpc/include/asm/kvm_book3s.h @@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) } #endif -static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r, - unsigned long pte_index) -{ - unsigned long rb, va_low; - - rb = (v & ~0x7fUL) << 16; /* AVA field */ - va_low = pte_index >> 3; - if (v & HPTE_V_SECONDARY) - va_low = ~va_low; - /* xor vsid from AVA */ - if (!(v & HPTE_V_1TB_SEG)) - va_low ^= v >> 12; - else - va_low ^= v >> 24; - va_low &= 0x7ff; - if (v & HPTE_V_LARGE) { - rb |= 1; /* L field */ - if (cpu_has_feature(CPU_FTR_ARCH_206) && - (r & 0xff000)) { - /* non-16MB large page, must be 64k */ - /* (masks depend on page size) */ - rb |= 0x1000; /* page encoding in LP field */ - rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */ - rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */ - } - } else { - /* 4kB page */ - rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */ - } - rb |= (v >> 54) & 0x300; /* B field */ - return rb; -} - /* Magic register values loaded into r3 and r4 before the 'sc' assembly * instruction for the OSI hypercalls */ #define OSI_SC_MAGIC_R3 0x113724FA diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h index e43fe42..d0ac94f 100644 --- a/arch/powerpc/include/asm/kvm_book3s_64.h +++ b/arch/powerpc/include/asm/kvm_book3s_64.h @@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu) #define SPAPR_TCE_SHIFT 12 +static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r, + unsigned long pte_index) +{ + unsigned long rb, va_low; + + rb = (v & ~0x7fUL) << 16; /* AVA field */ + va_low = pte_index >> 3; + if (v & HPTE_V_SECONDARY) + va_low = ~va_low; + /* xor vsid from AVA */ + if (!(v & HPTE_V_1TB_SEG)) + va_low ^= v >> 12; + else + va_low ^= v >> 24; + va_low &= 0x7ff; + if (v & HPTE_V_LARGE) { + rb |= 1; /* L field */ + if (cpu_has_feature(CPU_FTR_ARCH_206) && + (r & 0xff000)) { + /* non-16MB large page, must be 64k */ + /* (masks depend on page size) */ + rb |= 0x1000; /* page encoding in LP field */ + rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */ + rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */ + } + } else { + /* 4kB page */ + rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */ + } + rb |= (v >> 54) & 0x300; /* B field */ + return rb; +} + #endif /* __ASM_KVM_BOOK3S_64_H__ */ diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index 0cb137a..336983d 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -538,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu) tpaca->kvm_hstate.napping = 0; vcpu->cpu = vc->pcpu; smp_wmb(); -#ifdef CONFIG_PPC_ICP_NATIVE +#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) if (vcpu->arch.ptid) { tpaca->cpu_start = 0x80; wmb(); diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index 3c791e1..e2cfb9e 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c @@ -658,10 +658,12 @@ program_interrupt: ulong cmd = kvmppc_get_gpr(vcpu, 3); int i; +#ifdef CONFIG_KVM_BOOK3S_64_PR if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { r = RESUME_GUEST; break; } +#endif run->papr_hcall.nr = cmd; for (i = 0; i < 9; ++i) { diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c index 26d20903..8c0d45a 100644 --- a/arch/powerpc/kvm/e500.c +++ b/arch/powerpc/kvm/e500.c @@ -15,6 +15,7 @@ #include <linux/kvm_host.h> #include <linux/slab.h> #include <linux/err.h> +#include <linux/export.h> #include <asm/reg.h> #include <asm/cputable.h> diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h index 0814348..b9acaaa 100644 --- a/arch/s390/include/asm/cputime.h +++ b/arch/s390/include/asm/cputime.h @@ -87,6 +87,8 @@ usecs_to_cputime(const unsigned int m) return (cputime_t) m * 4096; } +#define usecs_to_cputime64(m) usecs_to_cputime(m) + /* * Convert cputime to milliseconds and back. */ diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c index 6efc18b..bd58b72 100644 --- a/arch/s390/oprofile/init.c +++ b/arch/s390/oprofile/init.c @@ -88,7 +88,7 @@ static ssize_t hwsampler_write(struct file *file, char const __user *buf, return -EINVAL; retval = oprofilefs_ulong_from_user(&val, buf, count); - if (retval) + if (retval <= 0) return retval; if (oprofile_started) diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c index ec8c84c..895e337 100644 --- a/arch/sh/boards/board-sh7757lcr.c +++ b/arch/sh/boards/board-sh7757lcr.c @@ -50,9 +50,9 @@ static struct platform_device heartbeat_device = { #define GBECONT 0xffc10100 #define GBECONT_RMII1 BIT(17) #define GBECONT_RMII0 BIT(16) -static void sh7757_eth_set_mdio_gate(unsigned long addr) +static void sh7757_eth_set_mdio_gate(void *addr) { - if ((addr & 0x00000fff) < 0x0800) + if (((unsigned long)addr & 0x00000fff) < 0x0800) writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); else writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); @@ -116,9 +116,9 @@ static struct platform_device sh7757_eth1_device = { }, }; -static void sh7757_eth_giga_set_mdio_gate(unsigned long addr) +static void sh7757_eth_giga_set_mdio_gate(void *addr) { - if ((addr & 0x00000fff) < 0x0800) { + if (((unsigned long)addr & 0x00000fff) < 0x0800) { gpio_set_value(GPIO_PTT4, 1); writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT); } else { @@ -210,8 +210,12 @@ static struct resource sh_mmcif_resources[] = { }; static struct sh_mmcif_dma sh7757lcr_mmcif_dma = { - .chan_priv_tx = SHDMA_SLAVE_MMCIF_TX, - .chan_priv_rx = SHDMA_SLAVE_MMCIF_RX, + .chan_priv_tx = { + .slave_id = SHDMA_SLAVE_MMCIF_TX, + }, + .chan_priv_rx = { + .slave_id = SHDMA_SLAVE_MMCIF_RX, + } }; static struct sh_mmcif_plat_data sh_mmcif_plat = { diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c index b4c2d2b..e4dd5d5 100644 --- a/arch/sh/oprofile/common.c +++ b/arch/sh/oprofile/common.c @@ -49,7 +49,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) return oprofile_perf_init(ops); } -void __exit oprofile_arch_exit(void) +void oprofile_arch_exit(void) { oprofile_perf_exit(); kfree(sh_pmu_op_name); @@ -60,5 +60,5 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) ops->backtrace = sh_backtrace; return -ENODEV; } -void __exit oprofile_arch_exit(void) {} +void oprofile_arch_exit(void) {} #endif /* CONFIG_HW_PERF_EVENTS */ diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c index b272cda..af5755d 100644 --- a/arch/sparc/kernel/pci_sun4v.c +++ b/arch/sparc/kernel/pci_sun4v.c @@ -849,10 +849,10 @@ static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm, if (!irq) return -ENOMEM; - if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE)) - return -EINVAL; if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID)) return -EINVAL; + if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE)) + return -EINVAL; return irq; } diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 8d601b1..121f1be 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1169,7 +1169,7 @@ again: */ c = &unconstrained; } else if (intel_try_alt_er(event, orig_idx)) { - raw_spin_unlock(&era->lock); + raw_spin_unlock_irqrestore(&era->lock, flags); goto again; } raw_spin_unlock_irqrestore(&era->lock, flags); diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c index 3b97a80..c99f9ed 100644 --- a/arch/x86/kernel/dumpstack_32.c +++ b/arch/x86/kernel/dumpstack_32.c @@ -116,16 +116,16 @@ void show_registers(struct pt_regs *regs) for (i = 0; i < code_len; i++, ip++) { if (ip < (u8 *)PAGE_OFFSET || probe_kernel_address(ip, c)) { - printk(" Bad EIP value."); + printk(KERN_CONT " Bad EIP value."); break; } if (ip == (u8 *)regs->ip) - printk("<%02x> ", c); + printk(KERN_CONT "<%02x> ", c); else - printk("%02x ", c); + printk(KERN_CONT "%02x ", c); } } - printk("\n"); + printk(KERN_CONT "\n"); } int is_valid_bugaddr(unsigned long ip) diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c index 19853ad..6d728d9 100644 --- a/arch/x86/kernel/dumpstack_64.c +++ b/arch/x86/kernel/dumpstack_64.c @@ -284,16 +284,16 @@ void show_registers(struct pt_regs *regs) for (i = 0; i < code_len; i++, ip++) { if (ip < (u8 *)PAGE_OFFSET || probe_kernel_address(ip, c)) { - printk(" Bad RIP value."); + printk(KERN_CONT " Bad RIP value."); break; } if (ip == (u8 *)regs->ip) - printk("<%02x> ", c); + printk(KERN_CONT "<%02x> ", c); else - printk("%02x ", c); + printk(KERN_CONT "%02x ", c); } } - printk("\n"); + printk(KERN_CONT "\n"); } int is_valid_bugaddr(unsigned long ip) diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c index 76e3f1c..405f262 100644 --- a/arch/x86/kvm/i8254.c +++ b/arch/x86/kvm/i8254.c @@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) return HRTIMER_NORESTART; } -static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) +static void create_pit_timer(struct kvm *kvm, u32 val, int is_period) { + struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; struct kvm_timer *pt = &ps->pit_timer; s64 interval; + if (!irqchip_in_kernel(kvm)) + return; + interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); pr_debug("create pit timer, interval is %llu nsec\n", interval); @@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val) /* FIXME: enhance mode 4 precision */ case 4: if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) { - create_pit_timer(ps, val, 0); + create_pit_timer(kvm, val, 0); } break; case 2: case 3: if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){ - create_pit_timer(ps, val, 1); + create_pit_timer(kvm, val, 1); } break; default: diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c38efd7..4c938da 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu) { struct kvm_cpuid_entry2 *best; struct kvm_lapic *apic = vcpu->arch.apic; - u32 timer_mode_mask; best = kvm_find_cpuid_entry(vcpu, 1, 0); if (!best) @@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu) best->ecx |= bit(X86_FEATURE_OSXSAVE); } - if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && - best->function == 0x1) { - best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER); - timer_mode_mask = 3 << 17; - } else - timer_mode_mask = 1 << 17; - - if (apic) - apic->lapic_timer.timer_mode_mask = timer_mode_mask; + if (apic) { + if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER)) + apic->lapic_timer.timer_mode_mask = 3 << 17; + else + apic->lapic_timer.timer_mode_mask = 1 << 17; + } } int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) @@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext) case KVM_CAP_TSC_CONTROL: r = kvm_has_tsc_control; break; + case KVM_CAP_TSC_DEADLINE_TIMER: + r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER); + break; default: r = 0; break; diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c index bfab3fa..7b65f75 100644 --- a/arch/x86/net/bpf_jit_comp.c +++ b/arch/x86/net/bpf_jit_comp.c @@ -568,8 +568,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i]; break; } if (filter[i].jt != 0) { - if (filter[i].jf) - t_offset += is_near(f_offset) ? 2 : 6; + if (filter[i].jf && f_offset) + t_offset += is_near(f_offset) ? 2 : 5; EMIT_COND_JMP(t_op, t_offset); if (filter[i].jf) EMIT_JMP(f_offset); diff --git a/block/blk-map.c b/block/blk-map.c index 164cd00..623e1cd 100644 --- a/block/blk-map.c +++ b/block/blk-map.c @@ -311,7 +311,7 @@ int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf, if (IS_ERR(bio)) return PTR_ERR(bio); - if (rq_data_dir(rq) == WRITE) + if (!reading) bio->bi_rw |= REQ_WRITE; if (do_copy) diff --git a/block/blk-tag.c b/block/blk-tag.c index e74d6d1..4af6f5c 100644 --- a/block/blk-tag.c +++ b/block/blk-tag.c @@ -282,18 +282,9 @@ EXPORT_SYMBOL(blk_queue_resize_tags); void blk_queue_end_tag(struct request_queue *q, struct request *rq) { struct blk_queue_tag *bqt = q->queue_tags; - int tag = rq->tag; + unsigned tag = rq->tag; /* negative tags invalid */ - BUG_ON(tag == -1); - - if (unlikely(tag >= bqt->max_depth)) { - /* - * This can happen after tag depth has been reduced. - * But tag shouldn't be larger than real_max_depth. - */ - WARN_ON(tag >= bqt->real_max_depth); - return; - } + BUG_ON(tag >= bqt->real_max_depth); list_del_init(&rq->queuelist); rq->cmd_flags &= ~REQ_QUEUED; diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c index 4c12869..3548705 100644 --- a/block/cfq-iosched.c +++ b/block/cfq-iosched.c @@ -1655,6 +1655,8 @@ cfq_merged_requests(struct request_queue *q, struct request *rq, struct request *next) { struct cfq_queue *cfqq = RQ_CFQQ(rq); + struct cfq_data *cfqd = q->elevator->elevator_data; + /* * reposition in fifo if next is older than rq */ @@ -1669,6 +1671,16 @@ cfq_merged_requests(struct request_queue *q, struct request *rq, cfq_remove_request(next); cfq_blkiocg_update_io_merged_stats(&(RQ_CFQG(rq))->blkg, rq_data_dir(next), rq_is_sync(next)); + + cfqq = RQ_CFQQ(next); + /* + * all requests of this queue are merged to other queues, delete it + * from the service tree. If it's the active_queue, + * cfq_dispatch_requests() will choose to expire it or do idle + */ + if (cfq_cfqq_on_rr(cfqq) && RB_EMPTY_ROOT(&cfqq->sort_list) && + cfqq != cfqd->active_queue) + cfq_del_cfqq_rr(cfqd, cfqq); } static int cfq_allow_merge(struct request_queue *q, struct request *rq, diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 6bdedd7..cf047c4 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -820,7 +820,7 @@ config PATA_PLATFORM config PATA_OF_PLATFORM tristate "OpenFirmware platform device PATA support" - depends on PATA_PLATFORM && OF + depends on PATA_PLATFORM && OF && OF_IRQ help This option enables support for generic directly connected ATA devices commonly found on embedded systems with OpenFirmware diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c index a76f24a..5249e6d 100644 --- a/drivers/ata/pata_at91.c +++ b/drivers/ata/pata_at91.c @@ -360,7 +360,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev) ap->flags |= ATA_FLAG_SLAVE_POSS; ap->pio_mask = ATA_PIO4; - if (!irq) { + if (!gpio_is_valid(irq)) { ap->flags |= ATA_FLAG_PIO_POLLING; ata_port_desc(ap, "no IRQ, using PIO polling"); } @@ -414,8 +414,8 @@ static int __devinit pata_at91_probe(struct platform_device *pdev) host->private_data = info; - ret = ata_host_activate(host, irq ? gpio_to_irq(irq) : 0, - irq ? ata_sff_interrupt : NULL, + return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0, + gpio_is_valid(irq) ? ata_sff_interrupt : NULL, irq_flags, &pata_at91_sht); if (!ret) diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c index c2917ffa..34767a6 100644 --- a/drivers/char/ipmi/ipmi_watchdog.c +++ b/drivers/char/ipmi/ipmi_watchdog.c @@ -139,6 +139,8 @@ #define IPMI_WDOG_SET_TIMER 0x24 #define IPMI_WDOG_GET_TIMER 0x25 +#define IPMI_WDOG_TIMER_NOT_INIT_RESP 0x80 + /* These are here until the real ones get into the watchdog.h interface. */ #ifndef WDIOC_GETTIMEOUT #define WDIOC_GETTIMEOUT _IOW(WATCHDOG_IOCTL_BASE, 20, int) @@ -596,6 +598,7 @@ static int ipmi_heartbeat(void) struct kernel_ipmi_msg msg; int rv; struct ipmi_system_interface_addr addr; + int timeout_retries = 0; if (ipmi_ignore_heartbeat) return 0; @@ -616,6 +619,7 @@ static int ipmi_heartbeat(void) mutex_lock(&heartbeat_lock); +restart: atomic_set(&heartbeat_tofree, 2); /* @@ -653,7 +657,33 @@ static int ipmi_heartbeat(void) /* Wait for the heartbeat to be sent. */ wait_for_completion(&heartbeat_wait); - if (heartbeat_recv_msg.msg.data[0] != 0) { + if (heartbeat_recv_msg.msg.data[0] == IPMI_WDOG_TIMER_NOT_INIT_RESP) { + timeout_retries++; + if (timeout_retries > 3) { + printk(KERN_ERR PFX ": Unable to restore the IPMI" + " watchdog's settings, giving up.\n"); + rv = -EIO; + goto out_unlock; + } + + /* + * The timer was not initialized, that means the BMC was + * probably reset and lost the watchdog information. Attempt + * to restore the timer's info. Note that we still hold + * the heartbeat lock, to keep a heartbeat from happening + * in this process, so must say no heartbeat to avoid a + * deadlock on this mutex. + */ + rv = ipmi_set_timeout(IPMI_SET_TIMEOUT_NO_HB); + if (rv) { + printk(KERN_ERR PFX ": Unable to send the command to" + " set the watchdog's settings, giving up.\n"); + goto out_unlock; + } + + /* We might need a new heartbeat, so do it now */ + goto restart; + } else if (heartbeat_recv_msg.msg.data[0] != 0) { /* * Got an error in the heartbeat response. It was already * reported in ipmi_wdog_msg_handler, but we should return @@ -662,6 +692,7 @@ static int ipmi_heartbeat(void) rv = -EINVAL; } +out_unlock: mutex_unlock(&heartbeat_lock); return rv; @@ -922,11 +953,15 @@ static struct miscdevice ipmi_wdog_miscdev = { static void ipmi_wdog_msg_handler(struct ipmi_recv_msg *msg, void *handler_data) { - if (msg->msg.data[0] != 0) { + if (msg->msg.cmd == IPMI_WDOG_RESET_TIMER && + msg->msg.data[0] == IPMI_WDOG_TIMER_NOT_INIT_RESP) + printk(KERN_INFO PFX "response: The IPMI controller appears" + " to have been reset, will attempt to reinitialize" + " the watchdog timer\n"); + else if (msg->msg.data[0] != 0) printk(KERN_ERR PFX "response: Error %x on cmd %x\n", msg->msg.data[0], msg->msg.cmd); - } ipmi_free_recv_msg(msg); } diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index 59feefe..fb6b6d2 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -58,25 +58,15 @@ static struct clocksource clocksource_dbx500_prcmu = { }; #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK -static DEFINE_CLOCK_DATA(cd); -unsigned long long notrace sched_clock(void) +static u32 notrace dbx500_prcmu_sched_clock_read(void) { - u32 cyc; - if (unlikely(!clksrc_dbx500_timer_base)) return 0; - cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); - - return cyc_to_sched_clock(&cd, cyc, (u32)~0); + return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); } -static void notrace clksrc_dbx500_prcmu_update_sched_clock(void) -{ - u32 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); - update_sched_clock(&cd, cyc, (u32)~0); -} #endif void __init clksrc_dbx500_prcmu_init(void __iomem *base) @@ -97,7 +87,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base) clksrc_dbx500_timer_base + PRCMU_TIMER_REF); } #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK - init_sched_clock(&cd, clksrc_dbx500_prcmu_update_sched_clock, + setup_sched_clock(dbx500_prcmu_sched_clock_read, 32, RATE_32K); #endif clocksource_calc_mult_shift(&clocksource_dbx500_prcmu, diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index ab8f469..5a99bb3 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -124,7 +124,7 @@ config MV_XOR config MX3_IPU bool "MX3x Image Processing Unit support" - depends on ARCH_MX3 + depends on SOC_IMX31 ||Â SOC_IMX35 select DMA_ENGINE default y help @@ -216,7 +216,7 @@ config PCH_DMA config IMX_SDMA tristate "i.MX SDMA support" - depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5 + depends on ARCH_MX25 || SOC_IMX31 ||Â SOC_IMX35 || ARCH_MX5 select DMA_ENGINE help Support the i.MX SDMA engine. This engine is integrated into diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index c681dc1..b9da890 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -756,9 +756,9 @@ intel_enable_semaphores(struct drm_device *dev) if (i915_semaphores >= 0) return i915_semaphores; - /* Enable semaphores on SNB when IO remapping is off */ + /* Disable semaphores on SNB */ if (INTEL_INFO(dev)->gen == 6) - return !intel_iommu_enabled; + return 0; return 1; } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d809b03..daa5743 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7922,13 +7922,11 @@ static bool intel_enable_rc6(struct drm_device *dev) return 0; /* - * Enable rc6 on Sandybridge if DMA remapping is disabled + * Disable rc6 on Sandybridge */ if (INTEL_INFO(dev)->gen == 6) { - DRM_DEBUG_DRIVER("Sandybridge: intel_iommu_enabled %s -- RC6 %sabled\n", - intel_iommu_enabled ? "true" : "false", - !intel_iommu_enabled ? "en" : "dis"); - return !intel_iommu_enabled; + DRM_DEBUG_DRIVER("Sandybridge: RC6 disabled\n"); + return 0; } DRM_DEBUG_DRIVER("RC6 enabled\n"); return 1; diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 5e00d16..92c9628 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -3276,6 +3276,18 @@ int evergreen_init(struct radeon_device *rdev) rdev->accel_working = false; } } + + /* Don't start up if the MC ucode is missing on BTC parts. + * The default clocks and voltages before the MC ucode + * is loaded are not suffient for advanced operations. + */ + if (ASIC_IS_DCE5(rdev)) { + if (!rdev->mc_fw && !(rdev->flags & RADEON_IS_IGP)) { + DRM_ERROR("radeon: MC ucode required for NI+.\n"); + return -EINVAL; + } + } + return 0; } diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index 8cca91a..dc27970 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h @@ -390,6 +390,11 @@ extern int vmw_context_check(struct vmw_private *dev_priv, struct ttm_object_file *tfile, int id, struct vmw_resource **p_res); +extern int vmw_user_lookup_handle(struct vmw_private *dev_priv, + struct ttm_object_file *tfile, + uint32_t handle, + struct vmw_surface **out_surf, + struct vmw_dma_buffer **out_buf); extern void vmw_surface_res_free(struct vmw_resource *res); extern int vmw_surface_init(struct vmw_private *dev_priv, struct vmw_surface *srf, diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c index 03bbc2a..a0c2f12 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c @@ -33,6 +33,7 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv) { __le32 __iomem *fifo_mem = dev_priv->mmio_virt; uint32_t fifo_min, hwversion; + const struct vmw_fifo_state *fifo = &dev_priv->fifo; if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)) return false; @@ -41,7 +42,12 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv) if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int)) return false; - hwversion = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION); + hwversion = ioread32(fifo_mem + + ((fifo->capabilities & + SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ? + SVGA_FIFO_3D_HWVERSION_REVISED : + SVGA_FIFO_3D_HWVERSION)); + if (hwversion == 0) return false; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c index 5ff561d..66917c6 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c @@ -58,8 +58,14 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data, case DRM_VMW_PARAM_FIFO_HW_VERSION: { __le32 __iomem *fifo_mem = dev_priv->mmio_virt; - - param->value = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION); + const struct vmw_fifo_state *fifo = &dev_priv->fifo; + + param->value = + ioread32(fifo_mem + + ((fifo->capabilities & + SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ? + SVGA_FIFO_3D_HWVERSION_REVISED : + SVGA_FIFO_3D_HWVERSION)); break; } default: @@ -166,13 +172,7 @@ int vmw_present_ioctl(struct drm_device *dev, void *data, ret = -EINVAL; goto out_no_fb; } - vfb = vmw_framebuffer_to_vfb(obj_to_fb(obj)); - if (!vfb->dmabuf) { - DRM_ERROR("Framebuffer not dmabuf backed.\n"); - ret = -EINVAL; - goto out_no_fb; - } ret = ttm_read_lock(&vmaster->lock, true); if (unlikely(ret != 0)) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 37d4054..f94b33a 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c @@ -31,6 +31,44 @@ /* Might need a hrtimer here? */ #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1) + +struct vmw_clip_rect { + int x1, x2, y1, y2; +}; + +/** + * Clip @num_rects number of @rects against @clip storing the + * results in @out_rects and the number of passed rects in @out_num. + */ +void vmw_clip_cliprects(struct drm_clip_rect *rects, + int num_rects, + struct vmw_clip_rect clip, + SVGASignedRect *out_rects, + int *out_num) +{ + int i, k; + + for (i = 0, k = 0; i < num_rects; i++) { + int x1 = max_t(int, clip.x1, rects[i].x1); + int y1 = max_t(int, clip.y1, rects[i].y1); + int x2 = min_t(int, clip.x2, rects[i].x2); + int y2 = min_t(int, clip.y2, rects[i].y2); + + if (x1 >= x2) + continue; + if (y1 >= y2) + continue; + + out_rects[k].left = x1; + out_rects[k].top = y1; + out_rects[k].right = x2; + out_rects[k].bottom = y2; + k++; + } + + *out_num = k; +} + void vmw_display_unit_cleanup(struct vmw_display_unit *du) { if (du->cursor_surface) @@ -82,6 +120,43 @@ int vmw_cursor_update_image(struct vmw_private *dev_priv, return 0; } +int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, + struct vmw_dma_buffer *dmabuf, + u32 width, u32 height, + u32 hotspotX, u32 hotspotY) +{ + struct ttm_bo_kmap_obj map; + unsigned long kmap_offset; + unsigned long kmap_num; + void *virtual; + bool dummy; + int ret; + + kmap_offset = 0; + kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT; + + ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0); + if (unlikely(ret != 0)) { + DRM_ERROR("reserve failed\n"); + return -EINVAL; + } + + ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map); + if (unlikely(ret != 0)) + goto err_unreserve; + + virtual = ttm_kmap_obj_virtual(&map, &dummy); + ret = vmw_cursor_update_image(dev_priv, virtual, width, height, + hotspotX, hotspotY); + + ttm_bo_kunmap(&map); +err_unreserve: + ttm_bo_unreserve(&dmabuf->base); + + return ret; +} + + void vmw_cursor_update_position(struct vmw_private *dev_priv, bool show, int x, int y) { @@ -110,24 +185,21 @@ int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, return -EINVAL; if (handle) { - ret = vmw_user_surface_lookup_handle(dev_priv, tfile, - handle, &surface); - if (!ret) { - if (!surface->snooper.image) { - DRM_ERROR("surface not suitable for cursor\n"); - vmw_surface_unreference(&surface); - return -EINVAL; - } - } else { - ret = vmw_user_dmabuf_lookup(tfile, - handle, &dmabuf); - if (ret) { - DRM_ERROR("failed to find surface or dmabuf: %i\n", ret); - return -EINVAL; - } + ret = vmw_user_lookup_handle(dev_priv, tfile, + handle, &surface, &dmabuf); + if (ret) { + DRM_ERROR("failed to find surface or dmabuf: %i\n", ret); + return -EINVAL; } } + /* need to do this before taking down old image */ + if (surface && !surface->snooper.image) { + DRM_ERROR("surface not suitable for cursor\n"); + vmw_surface_unreference(&surface); + return -EINVAL; + } + /* takedown old cursor */ if (du->cursor_surface) { du->cursor_surface->snooper.crtc = NULL; @@ -146,36 +218,11 @@ int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, vmw_cursor_update_image(dev_priv, surface->snooper.image, 64, 64, du->hotspot_x, du->hotspot_y); } else if (dmabuf) { - struct ttm_bo_kmap_obj map; - unsigned long kmap_offset; - unsigned long kmap_num; - void *virtual; - bool dummy; - /* vmw_user_surface_lookup takes one reference */ du->cursor_dmabuf = dmabuf; - kmap_offset = 0; - kmap_num = (64*64*4) >> PAGE_SHIFT; - - ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0); - if (unlikely(ret != 0)) { - DRM_ERROR("reserve failed\n"); - return -EINVAL; - } - - ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map); - if (unlikely(ret != 0)) - goto err_unreserve; - - virtual = ttm_kmap_obj_virtual(&map, &dummy); - vmw_cursor_update_image(dev_priv, virtual, 64, 64, - du->hotspot_x, du->hotspot_y); - - ttm_bo_kunmap(&map); -err_unreserve: - ttm_bo_unreserve(&dmabuf->base); - + ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height, + du->hotspot_x, du->hotspot_y); } else { vmw_cursor_update_position(dev_priv, false, 0, 0); return 0; @@ -377,8 +424,9 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, struct drm_clip_rect *clips, unsigned num_clips, int inc) { - struct drm_clip_rect *clips_ptr; struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; + struct drm_clip_rect *clips_ptr; + struct drm_clip_rect *tmp; struct drm_crtc *crtc; size_t fifo_size; int i, num_units; @@ -391,7 +439,6 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, } *cmd; SVGASignedRect *blits; - num_units = 0; list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { @@ -402,13 +449,24 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, BUG_ON(!clips || !num_clips); + tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); + if (unlikely(tmp == NULL)) { + DRM_ERROR("Temporary cliprect memory alloc failed.\n"); + return -ENOMEM; + } + fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; cmd = kzalloc(fifo_size, GFP_KERNEL); if (unlikely(cmd == NULL)) { DRM_ERROR("Temporary fifo memory alloc failed.\n"); - return -ENOMEM; + ret = -ENOMEM; + goto out_free_tmp; } + /* setup blits pointer */ + blits = (SVGASignedRect *)&cmd[1]; + + /* initial clip region */ left = clips->x1; right = clips->x2; top = clips->y1; @@ -434,45 +492,60 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, cmd->body.srcRect.bottom = bottom; clips_ptr = clips; - blits = (SVGASignedRect *)&cmd[1]; for (i = 0; i < num_clips; i++, clips_ptr += inc) { - blits[i].left = clips_ptr->x1 - left; - blits[i].right = clips_ptr->x2 - left; - blits[i].top = clips_ptr->y1 - top; - blits[i].bottom = clips_ptr->y2 - top; + tmp[i].x1 = clips_ptr->x1 - left; + tmp[i].x2 = clips_ptr->x2 - left; + tmp[i].y1 = clips_ptr->y1 - top; + tmp[i].y2 = clips_ptr->y2 - top; } /* do per unit writing, reuse fifo for each */ for (i = 0; i < num_units; i++) { struct vmw_display_unit *unit = units[i]; - int clip_x1 = left - unit->crtc.x; - int clip_y1 = top - unit->crtc.y; - int clip_x2 = right - unit->crtc.x; - int clip_y2 = bottom - unit->crtc.y; + struct vmw_clip_rect clip; + int num; + + clip.x1 = left - unit->crtc.x; + clip.y1 = top - unit->crtc.y; + clip.x2 = right - unit->crtc.x; + clip.y2 = bottom - unit->crtc.y; /* skip any crtcs that misses the clip region */ - if (clip_x1 >= unit->crtc.mode.hdisplay || - clip_y1 >= unit->crtc.mode.vdisplay || - clip_x2 <= 0 || clip_y2 <= 0) + if (clip.x1 >= unit->crtc.mode.hdisplay || + clip.y1 >= unit->crtc.mode.vdisplay || + clip.x2 <= 0 || clip.y2 <= 0) continue; + /* + * In order for the clip rects to be correctly scaled + * the src and dest rects needs to be the same size. + */ + cmd->body.destRect.left = clip.x1; + cmd->body.destRect.right = clip.x2; + cmd->body.destRect.top = clip.y1; + cmd->body.destRect.bottom = clip.y2; + + /* create a clip rect of the crtc in dest coords */ + clip.x2 = unit->crtc.mode.hdisplay - clip.x1; + clip.y2 = unit->crtc.mode.vdisplay - clip.y1; + clip.x1 = 0 - clip.x1; + clip.y1 = 0 - clip.y1; + /* need to reset sid as it is changed by execbuf */ cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle); - cmd->body.destScreenId = unit->unit; - /* - * The blit command is a lot more resilient then the - * readback command when it comes to clip rects. So its - * okay to go out of bounds. - */ + /* clip and write blits to cmd stream */ + vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); - cmd->body.destRect.left = clip_x1; - cmd->body.destRect.right = clip_x2; - cmd->body.destRect.top = clip_y1; - cmd->body.destRect.bottom = clip_y2; + /* if no cliprects hit skip this */ + if (num == 0) + continue; + /* recalculate package length */ + fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; + cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size, 0, NULL); @@ -480,7 +553,10 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, break; } + kfree(cmd); +out_free_tmp: + kfree(tmp); return ret; } @@ -556,6 +632,10 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, * Sanity checks. */ + /* Surface must be marked as a scanout. */ + if (unlikely(!surface->scanout)) + return -EINVAL; + if (unlikely(surface->mip_levels[0] != 1 || surface->num_sizes != 1 || surface->sizes[0].width < mode_cmd->width || @@ -782,6 +862,7 @@ static int do_dmabuf_dirty_sou(struct drm_file *file_priv, int clip_y1 = clips_ptr->y1 - unit->crtc.y; int clip_x2 = clips_ptr->x2 - unit->crtc.x; int clip_y2 = clips_ptr->y2 - unit->crtc.y; + int move_x, move_y; /* skip any crtcs that misses the clip region */ if (clip_x1 >= unit->crtc.mode.hdisplay || @@ -789,12 +870,21 @@ static int do_dmabuf_dirty_sou(struct drm_file *file_priv, clip_x2 <= 0 || clip_y2 <= 0) continue; + /* clip size to crtc size */ + clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay); + clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay); + + /* translate both src and dest to bring clip into screen */ + move_x = min_t(int, clip_x1, 0); + move_y = min_t(int, clip_y1, 0); + + /* actual translate done here */ blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN; blits[hit_num].body.destScreenId = unit->unit; - blits[hit_num].body.srcOrigin.x = clips_ptr->x1; - blits[hit_num].body.srcOrigin.y = clips_ptr->y1; - blits[hit_num].body.destRect.left = clip_x1; - blits[hit_num].body.destRect.top = clip_y1; + blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x; + blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y; + blits[hit_num].body.destRect.left = clip_x1 - move_x; + blits[hit_num].body.destRect.top = clip_y1 - move_y; blits[hit_num].body.destRect.right = clip_x2; blits[hit_num].body.destRect.bottom = clip_y2; hit_num++; @@ -1003,7 +1093,6 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, struct vmw_surface *surface = NULL; struct vmw_dma_buffer *bo = NULL; struct ttm_base_object *user_obj; - u64 required_size; int ret; /** @@ -1012,8 +1101,9 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, * requested framebuffer. */ - required_size = mode_cmd->pitch * mode_cmd->height; - if (unlikely(required_size > (u64) dev_priv->vram_size)) { + if (!vmw_kms_validate_mode_vram(dev_priv, + mode_cmd->pitch, + mode_cmd->height)) { DRM_ERROR("VRAM size is too small for requested mode.\n"); return ERR_PTR(-ENOMEM); } @@ -1033,46 +1123,29 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, return ERR_PTR(-ENOENT); } - /** - * End conditioned code. - */ - - ret = vmw_user_surface_lookup_handle(dev_priv, tfile, - mode_cmd->handle, &surface); + /* returns either a dmabuf or surface */ + ret = vmw_user_lookup_handle(dev_priv, tfile, + mode_cmd->handle, + &surface, &bo); if (ret) - goto try_dmabuf; - - if (!surface->scanout) - goto err_not_scanout; - - ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface, - &vfb, mode_cmd); - - /* vmw_user_surface_lookup takes one ref so does new_fb */ - vmw_surface_unreference(&surface); - - if (ret) { - DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); - ttm_base_object_unref(&user_obj); - return ERR_PTR(ret); - } else - vfb->user_obj = user_obj; - return &vfb->base; - -try_dmabuf: - DRM_INFO("%s: trying buffer\n", __func__); - - ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo); - if (ret) { - DRM_ERROR("failed to find buffer: %i\n", ret); - return ERR_PTR(-ENOENT); - } - - ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb, - mode_cmd); + goto err_out; + + /* Create the new framebuffer depending one what we got back */ + if (bo) + ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb, + mode_cmd); + else if (surface) + ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, + surface, &vfb, mode_cmd); + else + BUG(); - /* vmw_user_dmabuf_lookup takes one ref so does new_fb */ - vmw_dmabuf_unreference(&bo); +err_out: + /* vmw_user_lookup_handle takes one ref so does new_fb */ + if (bo) + vmw_dmabuf_unreference(&bo); + if (surface) + vmw_surface_unreference(&surface); if (ret) { DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret); @@ -1082,14 +1155,6 @@ try_dmabuf: vfb->user_obj = user_obj; return &vfb->base; - -err_not_scanout: - DRM_ERROR("surface not marked as scanout\n"); - /* vmw_user_surface_lookup takes one ref */ - vmw_surface_unreference(&surface); - ttm_base_object_unref(&user_obj); - - return ERR_PTR(-EINVAL); } static struct drm_mode_config_funcs vmw_kms_funcs = { @@ -1106,10 +1171,12 @@ int vmw_kms_present(struct vmw_private *dev_priv, uint32_t num_clips) { struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS]; + struct drm_clip_rect *tmp; struct drm_crtc *crtc; size_t fifo_size; int i, k, num_units; int ret = 0; /* silence warning */ + int left, right, top, bottom; struct { SVGA3dCmdHeader header; @@ -1127,60 +1194,95 @@ int vmw_kms_present(struct vmw_private *dev_priv, BUG_ON(surface == NULL); BUG_ON(!clips || !num_clips); + tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL); + if (unlikely(tmp == NULL)) { + DRM_ERROR("Temporary cliprect memory alloc failed.\n"); + return -ENOMEM; + } + fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips; cmd = kmalloc(fifo_size, GFP_KERNEL); if (unlikely(cmd == NULL)) { DRM_ERROR("Failed to allocate temporary fifo memory.\n"); - return -ENOMEM; + ret = -ENOMEM; + goto out_free_tmp; + } + + left = clips->x; + right = clips->x + clips->w; + top = clips->y; + bottom = clips->y + clips->h; + + for (i = 1; i < num_clips; i++) { + left = min_t(int, left, (int)clips[i].x); + right = max_t(int, right, (int)clips[i].x + clips[i].w); + top = min_t(int, top, (int)clips[i].y); + bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h); } /* only need to do this once */ memset(cmd, 0, fifo_size); cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN); - cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); - - cmd->body.srcRect.left = 0; - cmd->body.srcRect.right = surface->sizes[0].width; - cmd->body.srcRect.top = 0; - cmd->body.srcRect.bottom = surface->sizes[0].height; blits = (SVGASignedRect *)&cmd[1]; + + cmd->body.srcRect.left = left; + cmd->body.srcRect.right = right; + cmd->body.srcRect.top = top; + cmd->body.srcRect.bottom = bottom; + for (i = 0; i < num_clips; i++) { - blits[i].left = clips[i].x; - blits[i].right = clips[i].x + clips[i].w; - blits[i].top = clips[i].y; - blits[i].bottom = clips[i].y + clips[i].h; + tmp[i].x1 = clips[i].x - left; + tmp[i].x2 = clips[i].x + clips[i].w - left; + tmp[i].y1 = clips[i].y - top; + tmp[i].y2 = clips[i].y + clips[i].h - top; } for (k = 0; k < num_units; k++) { struct vmw_display_unit *unit = units[k]; - int clip_x1 = destX - unit->crtc.x; - int clip_y1 = destY - unit->crtc.y; - int clip_x2 = clip_x1 + surface->sizes[0].width; - int clip_y2 = clip_y1 + surface->sizes[0].height; + struct vmw_clip_rect clip; + int num; + + clip.x1 = left + destX - unit->crtc.x; + clip.y1 = top + destY - unit->crtc.y; + clip.x2 = right + destX - unit->crtc.x; + clip.y2 = bottom + destY - unit->crtc.y; /* skip any crtcs that misses the clip region */ - if (clip_x1 >= unit->crtc.mode.hdisplay || - clip_y1 >= unit->crtc.mode.vdisplay || - clip_x2 <= 0 || clip_y2 <= 0) + if (clip.x1 >= unit->crtc.mode.hdisplay || + clip.y1 >= unit->crtc.mode.vdisplay || + clip.x2 <= 0 || clip.y2 <= 0) continue; + /* + * In order for the clip rects to be correctly scaled + * the src and dest rects needs to be the same size. + */ + cmd->body.destRect.left = clip.x1; + cmd->body.destRect.right = clip.x2; + cmd->body.destRect.top = clip.y1; + cmd->body.destRect.bottom = clip.y2; + + /* create a clip rect of the crtc in dest coords */ + clip.x2 = unit->crtc.mode.hdisplay - clip.x1; + clip.y2 = unit->crtc.mode.vdisplay - clip.y1; + clip.x1 = 0 - clip.x1; + clip.y1 = 0 - clip.y1; + /* need to reset sid as it is changed by execbuf */ cmd->body.srcImage.sid = sid; - cmd->body.destScreenId = unit->unit; - /* - * The blit command is a lot more resilient then the - * readback command when it comes to clip rects. So its - * okay to go out of bounds. - */ + /* clip and write blits to cmd stream */ + vmw_clip_cliprects(tmp, num_clips, clip, blits, &num); - cmd->body.destRect.left = clip_x1; - cmd->body.destRect.right = clip_x2; - cmd->body.destRect.top = clip_y1; - cmd->body.destRect.bottom = clip_y2; + /* if no cliprects hit skip this */ + if (num == 0) + continue; + /* recalculate package length */ + fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num; + cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header)); ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size, 0, NULL); @@ -1189,6 +1291,8 @@ int vmw_kms_present(struct vmw_private *dev_priv, } kfree(cmd); +out_free_tmp: + kfree(tmp); return ret; } diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h index af8e6e5..e1cb855 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h @@ -62,9 +62,14 @@ struct vmw_framebuffer { int vmw_cursor_update_image(struct vmw_private *dev_priv, u32 *image, u32 width, u32 height, u32 hotspotX, u32 hotspotY); +int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, + struct vmw_dma_buffer *dmabuf, + u32 width, u32 height, + u32 hotspotX, u32 hotspotY); void vmw_cursor_update_position(struct vmw_private *dev_priv, bool show, int x, int y); + /** * Base class display unit. * diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c index 90c5e39..8f8dbd4 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c @@ -74,9 +74,10 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv) { struct vmw_legacy_display *lds = dev_priv->ldu_priv; struct vmw_legacy_display_unit *entry; + struct vmw_display_unit *du = NULL; struct drm_framebuffer *fb = NULL; struct drm_crtc *crtc = NULL; - int i = 0; + int i = 0, ret; /* If there is no display topology the host just assumes * that the guest will set the same layout as the host. @@ -129,6 +130,25 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv) lds->last_num_active = lds->num_active; + + /* Find the first du with a cursor. */ + list_for_each_entry(entry, &lds->active, active) { + du = &entry->base; + + if (!du->cursor_dmabuf) + continue; + + ret = vmw_cursor_update_dmabuf(dev_priv, + du->cursor_dmabuf, + 64, 64, + du->hotspot_x, + du->hotspot_y); + if (ret == 0) + break; + + DRM_ERROR("Could not update cursor image\n"); + } + return 0; } diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c index 86c5e4c..1c7f09e 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c @@ -1190,6 +1190,29 @@ void vmw_resource_unreserve(struct list_head *list) write_unlock(lock); } +/** + * Helper function that looks either a surface or dmabuf. + * + * The pointer this pointed at by out_surf and out_buf needs to be null. + */ +int vmw_user_lookup_handle(struct vmw_private *dev_priv, + struct ttm_object_file *tfile, + uint32_t handle, + struct vmw_surface **out_surf, + struct vmw_dma_buffer **out_buf) +{ + int ret; + + BUG_ON(*out_surf || *out_buf); + + ret = vmw_user_surface_lookup_handle(dev_priv, tfile, handle, out_surf); + if (!ret) + return 0; + + ret = vmw_user_dmabuf_lookup(tfile, handle, out_buf); + return ret; +} + int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv, struct ttm_object_file *tfile, diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 8cebef4..18936ac 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -893,6 +893,13 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev, /* Set the number of I2C channel instance */ adap_info->ch_num = id->driver_data; + ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED, + KBUILD_MODNAME, adap_info); + if (ret) { + pch_pci_err(pdev, "request_irq FAILED\n"); + goto err_request_irq; + } + for (i = 0; i < adap_info->ch_num; i++) { pch_adap = &adap_info->pch_data[i].pch_adapter; adap_info->pch_i2c_suspended = false; @@ -910,28 +917,23 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev, pch_adap->dev.parent = &pdev->dev; + pch_i2c_init(&adap_info->pch_data[i]); ret = i2c_add_adapter(pch_adap); if (ret) { pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i); - goto err_i2c_add_adapter; + goto err_add_adapter; } - - pch_i2c_init(&adap_info->pch_data[i]); - } - ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED, - KBUILD_MODNAME, adap_info); - if (ret) { - pch_pci_err(pdev, "request_irq FAILED\n"); - goto err_i2c_add_adapter; } pci_set_drvdata(pdev, adap_info); pch_pci_dbg(pdev, "returns %d.\n", ret); return 0; -err_i2c_add_adapter: +err_add_adapter: for (j = 0; j < i; j++) i2c_del_adapter(&adap_info->pch_data[j].pch_adapter); + free_irq(pdev->irq, adap_info); +err_request_irq: pci_iounmap(pdev, base_addr); err_pci_iomap: pci_release_regions(pdev); diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index a43d002..fa23faa 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -1047,13 +1047,14 @@ omap_i2c_probe(struct platform_device *pdev) * size. This is to ensure that we can handle the status on int * call back latencies. */ - if (dev->rev >= OMAP_I2C_REV_ON_3530_4430) { - dev->fifo_size = 0; + + dev->fifo_size = (dev->fifo_size / 2); + + if (dev->rev >= OMAP_I2C_REV_ON_3530_4430) dev->b_hw = 0; /* Disable hardware fixes */ - } else { - dev->fifo_size = (dev->fifo_size / 2); + else dev->b_hw = 1; /* Enable hardware fixes */ - } + /* calculate wakeup latency constraint for MPU */ if (dev->set_mpu_wkup_lat != NULL) dev->latency = (1000000 * dev->fifo_size) / diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 2754cef8..4c17180 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -534,6 +534,7 @@ static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, /* first, try busy waiting briefly */ do { + cpu_relax(); iicstat = readl(i2c->regs + S3C2410_IICSTAT); } while ((iicstat & S3C2410_IICSTAT_START) && --spins); @@ -786,7 +787,7 @@ static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) #else static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) { - return -EINVAL; + return 0; } static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) diff --git a/drivers/ide/at91_ide.c b/drivers/ide/at91_ide.c index 6dede8f..41d4155 100644 --- a/drivers/ide/at91_ide.c +++ b/drivers/ide/at91_ide.c @@ -314,7 +314,7 @@ static int __init at91_ide_probe(struct platform_device *pdev) apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0); /* with GPIO interrupt we have to do quirks in handler */ - if (board->irq_pin >= PIN_BASE) + if (gpio_is_valid(board->irq_pin)) host->irq_handler = at91_irq_handler; host->ports[0]->select_data = board->chipselect; diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c index 75ff821..d0d4aa9 100644 --- a/drivers/infiniband/core/cma.c +++ b/drivers/infiniband/core/cma.c @@ -2513,6 +2513,9 @@ static int cma_resolve_ib_udp(struct rdma_id_private *id_priv, req.private_data_len = sizeof(struct cma_hdr) + conn_param->private_data_len; + if (req.private_data_len < conn_param->private_data_len) + return -EINVAL; + req.private_data = kzalloc(req.private_data_len, GFP_ATOMIC); if (!req.private_data) return -ENOMEM; @@ -2562,6 +2565,9 @@ static int cma_connect_ib(struct rdma_id_private *id_priv, memset(&req, 0, sizeof req); offset = cma_user_data_offset(id_priv->id.ps); req.private_data_len = offset + conn_param->private_data_len; + if (req.private_data_len < conn_param->private_data_len) + return -EINVAL; + private_data = kzalloc(req.private_data_len, GFP_ATOMIC); if (!private_data) return -ENOMEM; diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c index 77f3dbc..18836cd 100644 --- a/drivers/infiniband/hw/mlx4/main.c +++ b/drivers/infiniband/hw/mlx4/main.c @@ -1244,7 +1244,8 @@ err_reg: err_counter: for (; i; --i) - mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]); + if (ibdev->counters[i - 1] != -1) + mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]); err_map: iounmap(ibdev->uar_map); @@ -1275,7 +1276,8 @@ static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) } iounmap(ibdev->uar_map); for (p = 0; p < ibdev->num_ports; ++p) - mlx4_counter_free(ibdev->dev, ibdev->counters[p]); + if (ibdev->counters[p] != -1) + mlx4_counter_free(ibdev->dev, ibdev->counters[p]); mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) mlx4_CLOSE_PORT(dev, p); diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c index 574600e..a740324 100644 --- a/drivers/infiniband/hw/qib/qib_file_ops.c +++ b/drivers/infiniband/hw/qib/qib_file_ops.c @@ -1285,7 +1285,7 @@ static int setup_ctxt(struct qib_pportdata *ppd, int ctxt, strlcpy(rcd->comm, current->comm, sizeof(rcd->comm)); ctxt_fp(fp) = rcd; qib_stats.sps_ctxts++; - dd->freectxts++; + dd->freectxts--; ret = 0; goto bail; @@ -1794,7 +1794,7 @@ static int qib_close(struct inode *in, struct file *fp) if (dd->pageshadow) unlock_expected_tids(rcd); qib_stats.sps_ctxts--; - dd->freectxts--; + dd->freectxts++; } mutex_unlock(&qib_mutex); diff --git a/drivers/input/misc/cma3000_d0x.c b/drivers/input/misc/cma3000_d0x.c index 80793f1..06517e6 100644 --- a/drivers/input/misc/cma3000_d0x.c +++ b/drivers/input/misc/cma3000_d0x.c @@ -115,8 +115,8 @@ static void decode_mg(struct cma3000_accl_data *data, int *datax, static irqreturn_t cma3000_thread_irq(int irq, void *dev_id) { struct cma3000_accl_data *data = dev_id; - int datax, datay, dataz; - u8 ctrl, mode, range, intr_status; + int datax, datay, dataz, intr_status; + u8 ctrl, mode, range; intr_status = CMA3000_READ(data, CMA3000_INTSTATUS, "interrupt status"); if (intr_status < 0) diff --git a/drivers/input/mouse/sentelic.c b/drivers/input/mouse/sentelic.c index c5b12d2..86d6f39 100644 --- a/drivers/input/mouse/sentelic.c +++ b/drivers/input/mouse/sentelic.c @@ -2,7 +2,7 @@ * Finger Sensing Pad PS/2 mouse driver. * * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. - * Copyright (C) 2005-2010 Tai-hwa Liang, Sentelic Corporation. + * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -162,7 +162,7 @@ static int fsp_reg_write(struct psmouse *psmouse, int reg_addr, int reg_val) ps2_sendbyte(ps2dev, v, FSP_CMD_TIMEOUT2); if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) - return -1; + goto out; if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { /* inversion is required */ @@ -261,7 +261,7 @@ static int fsp_page_reg_write(struct psmouse *psmouse, int reg_val) ps2_sendbyte(ps2dev, 0x88, FSP_CMD_TIMEOUT2); if (ps2_sendbyte(ps2dev, 0xf3, FSP_CMD_TIMEOUT) < 0) - return -1; + goto out; if ((v = fsp_test_invert_cmd(reg_val)) != reg_val) { ps2_sendbyte(ps2dev, 0x47, FSP_CMD_TIMEOUT2); @@ -309,7 +309,7 @@ static int fsp_get_buttons(struct psmouse *psmouse, int *btn) }; int val; - if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS1, &val) == -1) + if (fsp_reg_read(psmouse, FSP_REG_TMOD_STATUS, &val) == -1) return -EIO; *btn = buttons[(val & 0x30) >> 4]; diff --git a/drivers/input/mouse/sentelic.h b/drivers/input/mouse/sentelic.h index ed1395a..2e4af24 100644 --- a/drivers/input/mouse/sentelic.h +++ b/drivers/input/mouse/sentelic.h @@ -2,7 +2,7 @@ * Finger Sensing Pad PS/2 mouse driver. * * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. - * Copyright (C) 2005-2009 Tai-hwa Liang, Sentelic Corporation. + * Copyright (C) 2005-2011 Tai-hwa Liang, Sentelic Corporation. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -33,6 +33,7 @@ /* Finger-sensing Pad control registers */ #define FSP_REG_SYSCTL1 0x10 #define FSP_BIT_EN_REG_CLK BIT(5) +#define FSP_REG_TMOD_STATUS 0x20 #define FSP_REG_OPC_QDOWN 0x31 #define FSP_BIT_EN_OPC_TAG BIT(7) #define FSP_REG_OPTZ_XLO 0x34 diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c index c080b82..a6dcd18 100644 --- a/drivers/input/mouse/synaptics.c +++ b/drivers/input/mouse/synaptics.c @@ -24,6 +24,7 @@ */ #include <linux/module.h> +#include <linux/delay.h> #include <linux/dmi.h> #include <linux/input/mt.h> #include <linux/serio.h> @@ -1220,6 +1221,16 @@ static int synaptics_reconnect(struct psmouse *psmouse) do { psmouse_reset(psmouse); + if (retry) { + /* + * On some boxes, right after resuming, the touchpad + * needs some time to finish initializing (I assume + * it needs time to calibrate) and start responding + * to Synaptics-specific queries, so let's wait a + * bit. + */ + ssleep(1); + } error = synaptics_detect(psmouse, 0); } while (error && ++retry < 3); diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index da0d8761e..2ee47d0 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c @@ -1470,6 +1470,9 @@ static const struct wacom_features wacom_features_0xE3 = static const struct wacom_features wacom_features_0xE6 = { "Wacom ISDv4 E6", WACOM_PKGLEN_TPC2FG, 27760, 15694, 255, 0, TABLETPC2FG, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; +static const struct wacom_features wacom_features_0xEC = + { "Wacom ISDv4 EC", WACOM_PKGLEN_GRAPHIRE, 25710, 14500, 255, + 0, TABLETPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; static const struct wacom_features wacom_features_0x47 = { "Wacom Intuos2 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023, 31, INTUOS, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; @@ -1611,6 +1614,7 @@ const struct usb_device_id wacom_ids[] = { { USB_DEVICE_WACOM(0xE2) }, { USB_DEVICE_WACOM(0xE3) }, { USB_DEVICE_WACOM(0xE6) }, + { USB_DEVICE_WACOM(0xEC) }, { USB_DEVICE_WACOM(0x47) }, { USB_DEVICE_LENOVO(0x6004) }, { } diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 2fb2963..5b5fa5c 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -90,7 +90,7 @@ struct iommu_domain *iommu_domain_alloc(struct bus_type *bus) if (bus == NULL || bus->iommu_ops == NULL) return NULL; - domain = kmalloc(sizeof(*domain), GFP_KERNEL); + domain = kzalloc(sizeof(*domain), GFP_KERNEL); if (!domain) return NULL; diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c index b690711..6d03774 100644 --- a/drivers/md/bitmap.c +++ b/drivers/md/bitmap.c @@ -1393,9 +1393,6 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto atomic_read(&bitmap->behind_writes), bitmap->mddev->bitmap_info.max_write_behind); } - if (bitmap->mddev->degraded) - /* Never clear bits or update events_cleared when degraded */ - success = 0; while (sectors) { sector_t blocks; @@ -1409,7 +1406,7 @@ void bitmap_endwrite(struct bitmap *bitmap, sector_t offset, unsigned long secto return; } - if (success && + if (success && !bitmap->mddev->degraded && bitmap->events_cleared < bitmap->mddev->events) { bitmap->events_cleared = bitmap->mddev->events; bitmap->need_sync = 1; diff --git a/drivers/md/linear.c b/drivers/md/linear.c index c3273ef..6274565 100644 --- a/drivers/md/linear.c +++ b/drivers/md/linear.c @@ -230,6 +230,7 @@ static int linear_add(struct mddev *mddev, struct md_rdev *rdev) return -EINVAL; rdev->raid_disk = rdev->saved_raid_disk; + rdev->saved_raid_disk = -1; newconf = linear_conf(mddev,mddev->raid_disks+1); diff --git a/drivers/md/md.c b/drivers/md/md.c index ee98173..f47f1f8 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c @@ -7360,8 +7360,7 @@ static int remove_and_add_spares(struct mddev *mddev) spares++; md_new_event(mddev); set_bit(MD_CHANGE_DEVS, &mddev->flags); - } else - break; + } } } } diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 31670f8..858fdbb 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c @@ -3065,11 +3065,17 @@ static void analyse_stripe(struct stripe_head *sh, struct stripe_head_state *s) } } else if (test_bit(In_sync, &rdev->flags)) set_bit(R5_Insync, &dev->flags); - else { + else if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset) /* in sync if before recovery_offset */ - if (sh->sector + STRIPE_SECTORS <= rdev->recovery_offset) - set_bit(R5_Insync, &dev->flags); - } + set_bit(R5_Insync, &dev->flags); + else if (test_bit(R5_UPTODATE, &dev->flags) && + test_bit(R5_Expanded, &dev->flags)) + /* If we've reshaped into here, we assume it is Insync. + * We will shortly update recovery_offset to make + * it official. + */ + set_bit(R5_Insync, &dev->flags); + if (rdev && test_bit(R5_WriteError, &dev->flags)) { clear_bit(R5_Insync, &dev->flags); if (!test_bit(Faulty, &rdev->flags)) { diff --git a/drivers/media/common/tuners/mxl5007t.c b/drivers/media/common/tuners/mxl5007t.c index 7eb1bf7..5d02221 100644 --- a/drivers/media/common/tuners/mxl5007t.c +++ b/drivers/media/common/tuners/mxl5007t.c @@ -488,9 +488,10 @@ static int mxl5007t_write_regs(struct mxl5007t_state *state, static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val) { + u8 buf[2] = { 0xfb, reg }; struct i2c_msg msg[] = { { .addr = state->i2c_props.addr, .flags = 0, - .buf = ®, .len = 1 }, + .buf = buf, .len = 2 }, { .addr = state->i2c_props.addr, .flags = I2C_M_RD, .buf = val, .len = 1 }, }; diff --git a/drivers/media/common/tuners/tda18218.c b/drivers/media/common/tuners/tda18218.c index aacfe23..4fc2973 100644 --- a/drivers/media/common/tuners/tda18218.c +++ b/drivers/media/common/tuners/tda18218.c @@ -141,7 +141,7 @@ static int tda18218_set_params(struct dvb_frontend *fe, switch (params->u.ofdm.bandwidth) { case BANDWIDTH_6_MHZ: LP_Fc = 0; - LO_Frac = params->frequency + 4000000; + LO_Frac = params->frequency + 3000000; break; case BANDWIDTH_7_MHZ: LP_Fc = 1; diff --git a/drivers/media/rc/ati_remote.c b/drivers/media/rc/ati_remote.c index 303f22e..01bb8da 100644 --- a/drivers/media/rc/ati_remote.c +++ b/drivers/media/rc/ati_remote.c @@ -189,7 +189,7 @@ struct ati_remote { dma_addr_t inbuf_dma; dma_addr_t outbuf_dma; - unsigned char old_data[2]; /* Detect duplicate events */ + unsigned char old_data; /* Detect duplicate events */ unsigned long old_jiffies; unsigned long acc_jiffies; /* handle acceleration */ unsigned long first_jiffies; @@ -221,35 +221,35 @@ struct ati_remote { /* Translation table from hardware messages to input events. */ static const struct { short kind; - unsigned char data1, data2; + unsigned char data; int type; unsigned int code; int value; } ati_remote_tbl[] = { /* Directional control pad axes */ - {KIND_ACCEL, 0x35, 0x70, EV_REL, REL_X, -1}, /* left */ - {KIND_ACCEL, 0x36, 0x71, EV_REL, REL_X, 1}, /* right */ - {KIND_ACCEL, 0x37, 0x72, EV_REL, REL_Y, -1}, /* up */ - {KIND_ACCEL, 0x38, 0x73, EV_REL, REL_Y, 1}, /* down */ + {KIND_ACCEL, 0x70, EV_REL, REL_X, -1}, /* left */ + {KIND_ACCEL, 0x71, EV_REL, REL_X, 1}, /* right */ + {KIND_ACCEL, 0x72, EV_REL, REL_Y, -1}, /* up */ + {KIND_ACCEL, 0x73, EV_REL, REL_Y, 1}, /* down */ /* Directional control pad diagonals */ - {KIND_LU, 0x39, 0x74, EV_REL, 0, 0}, /* left up */ - {KIND_RU, 0x3a, 0x75, EV_REL, 0, 0}, /* right up */ - {KIND_LD, 0x3c, 0x77, EV_REL, 0, 0}, /* left down */ - {KIND_RD, 0x3b, 0x76, EV_REL, 0, 0}, /* right down */ + {KIND_LU, 0x74, EV_REL, 0, 0}, /* left up */ + {KIND_RU, 0x75, EV_REL, 0, 0}, /* right up */ + {KIND_LD, 0x77, EV_REL, 0, 0}, /* left down */ + {KIND_RD, 0x76, EV_REL, 0, 0}, /* right down */ /* "Mouse button" buttons */ - {KIND_LITERAL, 0x3d, 0x78, EV_KEY, BTN_LEFT, 1}, /* left btn down */ - {KIND_LITERAL, 0x3e, 0x79, EV_KEY, BTN_LEFT, 0}, /* left btn up */ - {KIND_LITERAL, 0x41, 0x7c, EV_KEY, BTN_RIGHT, 1},/* right btn down */ - {KIND_LITERAL, 0x42, 0x7d, EV_KEY, BTN_RIGHT, 0},/* right btn up */ + {KIND_LITERAL, 0x78, EV_KEY, BTN_LEFT, 1}, /* left btn down */ + {KIND_LITERAL, 0x79, EV_KEY, BTN_LEFT, 0}, /* left btn up */ + {KIND_LITERAL, 0x7c, EV_KEY, BTN_RIGHT, 1},/* right btn down */ + {KIND_LITERAL, 0x7d, EV_KEY, BTN_RIGHT, 0},/* right btn up */ /* Artificial "doubleclick" events are generated by the hardware. * They are mapped to the "side" and "extra" mouse buttons here. */ - {KIND_FILTERED, 0x3f, 0x7a, EV_KEY, BTN_SIDE, 1}, /* left dblclick */ - {KIND_FILTERED, 0x43, 0x7e, EV_KEY, BTN_EXTRA, 1},/* right dblclick */ + {KIND_FILTERED, 0x7a, EV_KEY, BTN_SIDE, 1}, /* left dblclick */ + {KIND_FILTERED, 0x7e, EV_KEY, BTN_EXTRA, 1},/* right dblclick */ /* Non-mouse events are handled by rc-core */ - {KIND_END, 0x00, 0x00, EV_MAX + 1, 0, 0} + {KIND_END, 0x00, EV_MAX + 1, 0, 0} }; /* Local function prototypes */ @@ -397,25 +397,6 @@ static int ati_remote_sendpacket(struct ati_remote *ati_remote, u16 cmd, unsigne } /* - * ati_remote_event_lookup - */ -static int ati_remote_event_lookup(int rem, unsigned char d1, unsigned char d2) -{ - int i; - - for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) { - /* - * Decide if the table entry matches the remote input. - */ - if (ati_remote_tbl[i].data1 == d1 && - ati_remote_tbl[i].data2 == d2) - return i; - - } - return -1; -} - -/* * ati_remote_compute_accel * * Implements acceleration curve for directional control pad @@ -463,7 +444,15 @@ static void ati_remote_input_report(struct urb *urb) int index = -1; int acc; int remote_num; - unsigned char scancode[2]; + unsigned char scancode; + int i; + + /* + * data[0] = 0x14 + * data[1] = data[2] + data[3] + 0xd5 (a checksum byte) + * data[2] = the key code (with toggle bit in MSB with some models) + * data[3] = channel << 4 (the low 4 bits must be zero) + */ /* Deal with strange looking inputs */ if ( (urb->actual_length != 4) || (data[0] != 0x14) || @@ -472,6 +461,13 @@ static void ati_remote_input_report(struct urb *urb) return; } + if (data[1] != ((data[2] + data[3] + 0xd5) & 0xff)) { + dbginfo(&ati_remote->interface->dev, + "wrong checksum in input: %02x %02x %02x %02x\n", + data[0], data[1], data[2], data[3]); + return; + } + /* Mask unwanted remote channels. */ /* note: remote_num is 0-based, channel 1 on remote == 0 here */ remote_num = (data[3] >> 4) & 0x0f; @@ -482,31 +478,30 @@ static void ati_remote_input_report(struct urb *urb) return; } - scancode[0] = (((data[1] - ((remote_num + 1) << 4)) & 0xf0) | (data[1] & 0x0f)); - /* - * Some devices (e.g. SnapStream Firefly) use 8080 as toggle code, - * so we have to clear them. The first bit is a bit tricky as the - * "non-toggled" state depends on remote_num, so we xor it with the - * second bit which is only used for toggle. + * MSB is a toggle code, though only used by some devices + * (e.g. SnapStream Firefly) */ - scancode[0] ^= (data[2] & 0x80); - - scancode[1] = data[2] & ~0x80; + scancode = data[2] & 0x7f; - /* Look up event code index in mouse translation table. */ - index = ati_remote_event_lookup(remote_num, scancode[0], scancode[1]); + /* Look up event code index in the mouse translation table. */ + for (i = 0; ati_remote_tbl[i].kind != KIND_END; i++) { + if (scancode == ati_remote_tbl[i].data) { + index = i; + break; + } + } if (index >= 0) { dbginfo(&ati_remote->interface->dev, - "channel 0x%02x; mouse data %02x,%02x; index %d; keycode %d\n", - remote_num, data[1], data[2], index, ati_remote_tbl[index].code); + "channel 0x%02x; mouse data %02x; index %d; keycode %d\n", + remote_num, data[2], index, ati_remote_tbl[index].code); if (!dev) return; /* no mouse device */ } else dbginfo(&ati_remote->interface->dev, - "channel 0x%02x; key data %02x,%02x, scancode %02x,%02x\n", - remote_num, data[1], data[2], scancode[0], scancode[1]); + "channel 0x%02x; key data %02x, scancode %02x\n", + remote_num, data[2], scancode); if (index >= 0 && ati_remote_tbl[index].kind == KIND_LITERAL) { @@ -523,8 +518,7 @@ static void ati_remote_input_report(struct urb *urb) unsigned long now = jiffies; /* Filter duplicate events which happen "too close" together. */ - if (ati_remote->old_data[0] == data[1] && - ati_remote->old_data[1] == data[2] && + if (ati_remote->old_data == data[2] && time_before(now, ati_remote->old_jiffies + msecs_to_jiffies(repeat_filter))) { ati_remote->repeat_count++; @@ -533,8 +527,7 @@ static void ati_remote_input_report(struct urb *urb) ati_remote->first_jiffies = now; } - ati_remote->old_data[0] = data[1]; - ati_remote->old_data[1] = data[2]; + ati_remote->old_data = data[2]; ati_remote->old_jiffies = now; /* Ensure we skip at least the 4 first duplicate events (generated @@ -549,14 +542,13 @@ static void ati_remote_input_report(struct urb *urb) if (index < 0) { /* Not a mouse event, hand it to rc-core. */ - u32 rc_code = (scancode[0] << 8) | scancode[1]; /* * We don't use the rc-core repeat handling yet as * it would cause ghost repeats which would be a * regression for this driver. */ - rc_keydown_notimeout(ati_remote->rdev, rc_code, + rc_keydown_notimeout(ati_remote->rdev, scancode, data[2]); rc_keyup(ati_remote->rdev); return; @@ -607,8 +599,7 @@ static void ati_remote_input_report(struct urb *urb) input_sync(dev); ati_remote->old_jiffies = jiffies; - ati_remote->old_data[0] = data[1]; - ati_remote->old_data[1] = data[2]; + ati_remote->old_data = data[2]; } } diff --git a/drivers/media/rc/keymaps/rc-ati-x10.c b/drivers/media/rc/keymaps/rc-ati-x10.c index e1b8b26..81506440 100644 --- a/drivers/media/rc/keymaps/rc-ati-x10.c +++ b/drivers/media/rc/keymaps/rc-ati-x10.c @@ -27,55 +27,55 @@ #include <media/rc-map.h> static struct rc_map_table ati_x10[] = { - { 0xd20d, KEY_1 }, - { 0xd30e, KEY_2 }, - { 0xd40f, KEY_3 }, - { 0xd510, KEY_4 }, - { 0xd611, KEY_5 }, - { 0xd712, KEY_6 }, - { 0xd813, KEY_7 }, - { 0xd914, KEY_8 }, - { 0xda15, KEY_9 }, - { 0xdc17, KEY_0 }, - { 0xc500, KEY_A }, - { 0xc601, KEY_B }, - { 0xde19, KEY_C }, - { 0xe01b, KEY_D }, - { 0xe621, KEY_E }, - { 0xe823, KEY_F }, + { 0x0d, KEY_1 }, + { 0x0e, KEY_2 }, + { 0x0f, KEY_3 }, + { 0x10, KEY_4 }, + { 0x11, KEY_5 }, + { 0x12, KEY_6 }, + { 0x13, KEY_7 }, + { 0x14, KEY_8 }, + { 0x15, KEY_9 }, + { 0x17, KEY_0 }, + { 0x00, KEY_A }, + { 0x01, KEY_B }, + { 0x19, KEY_C }, + { 0x1b, KEY_D }, + { 0x21, KEY_E }, + { 0x23, KEY_F }, - { 0xdd18, KEY_KPENTER }, /* "check" */ - { 0xdb16, KEY_MENU }, /* "menu" */ - { 0xc702, KEY_POWER }, /* Power */ - { 0xc803, KEY_TV }, /* TV */ - { 0xc904, KEY_DVD }, /* DVD */ - { 0xca05, KEY_WWW }, /* WEB */ - { 0xcb06, KEY_BOOKMARKS }, /* "book" */ - { 0xcc07, KEY_EDIT }, /* "hand" */ - { 0xe11c, KEY_COFFEE }, /* "timer" */ - { 0xe520, KEY_FRONT }, /* "max" */ - { 0xe21d, KEY_LEFT }, /* left */ - { 0xe41f, KEY_RIGHT }, /* right */ - { 0xe722, KEY_DOWN }, /* down */ - { 0xdf1a, KEY_UP }, /* up */ - { 0xe31e, KEY_OK }, /* "OK" */ - { 0xce09, KEY_VOLUMEDOWN }, /* VOL + */ - { 0xcd08, KEY_VOLUMEUP }, /* VOL - */ - { 0xcf0a, KEY_MUTE }, /* MUTE */ - { 0xd00b, KEY_CHANNELUP }, /* CH + */ - { 0xd10c, KEY_CHANNELDOWN },/* CH - */ - { 0xec27, KEY_RECORD }, /* ( o) red */ - { 0xea25, KEY_PLAY }, /* ( >) */ - { 0xe924, KEY_REWIND }, /* (<<) */ - { 0xeb26, KEY_FORWARD }, /* (>>) */ - { 0xed28, KEY_STOP }, /* ([]) */ - { 0xee29, KEY_PAUSE }, /* ('') */ - { 0xf02b, KEY_PREVIOUS }, /* (<-) */ - { 0xef2a, KEY_NEXT }, /* (>+) */ - { 0xf22d, KEY_INFO }, /* PLAYING */ - { 0xf32e, KEY_HOME }, /* TOP */ - { 0xf42f, KEY_END }, /* END */ - { 0xf530, KEY_SELECT }, /* SELECT */ + { 0x18, KEY_KPENTER }, /* "check" */ + { 0x16, KEY_MENU }, /* "menu" */ + { 0x02, KEY_POWER }, /* Power */ + { 0x03, KEY_TV }, /* TV */ + { 0x04, KEY_DVD }, /* DVD */ + { 0x05, KEY_WWW }, /* WEB */ + { 0x06, KEY_BOOKMARKS }, /* "book" */ + { 0x07, KEY_EDIT }, /* "hand" */ + { 0x1c, KEY_COFFEE }, /* "timer" */ + { 0x20, KEY_FRONT }, /* "max" */ + { 0x1d, KEY_LEFT }, /* left */ + { 0x1f, KEY_RIGHT }, /* right */ + { 0x22, KEY_DOWN }, /* down */ + { 0x1a, KEY_UP }, /* up */ + { 0x1e, KEY_OK }, /* "OK" */ + { 0x09, KEY_VOLUMEDOWN }, /* VOL + */ + { 0x08, KEY_VOLUMEUP }, /* VOL - */ + { 0x0a, KEY_MUTE }, /* MUTE */ + { 0x0b, KEY_CHANNELUP }, /* CH + */ + { 0x0c, KEY_CHANNELDOWN },/* CH - */ + { 0x27, KEY_RECORD }, /* ( o) red */ + { 0x25, KEY_PLAY }, /* ( >) */ + { 0x24, KEY_REWIND }, /* (<<) */ + { 0x26, KEY_FORWARD }, /* (>>) */ + { 0x28, KEY_STOP }, /* ([]) */ + { 0x29, KEY_PAUSE }, /* ('') */ + { 0x2b, KEY_PREVIOUS }, /* (<-) */ + { 0x2a, KEY_NEXT }, /* (>+) */ + { 0x2d, KEY_INFO }, /* PLAYING */ + { 0x2e, KEY_HOME }, /* TOP */ + { 0x2f, KEY_END }, /* END */ + { 0x30, KEY_SELECT }, /* SELECT */ }; static struct rc_map_list ati_x10_map = { diff --git a/drivers/media/rc/keymaps/rc-medion-x10.c b/drivers/media/rc/keymaps/rc-medion-x10.c index 09e2cc0..479cdb8 100644 --- a/drivers/media/rc/keymaps/rc-medion-x10.c +++ b/drivers/media/rc/keymaps/rc-medion-x10.c @@ -25,70 +25,70 @@ #include <media/rc-map.h> static struct rc_map_table medion_x10[] = { - { 0xf12c, KEY_TV }, /* TV */ - { 0xf22d, KEY_VCR }, /* VCR */ - { 0xc904, KEY_DVD }, /* DVD */ - { 0xcb06, KEY_AUDIO }, /* MUSIC */ - - { 0xf32e, KEY_RADIO }, /* RADIO */ - { 0xca05, KEY_DIRECTORY }, /* PHOTO */ - { 0xf42f, KEY_INFO }, /* TV-PREVIEW */ - { 0xf530, KEY_LIST }, /* CHANNEL-LST */ - - { 0xe01b, KEY_SETUP }, /* SETUP */ - { 0xf631, KEY_VIDEO }, /* VIDEO DESKTOP */ - - { 0xcd08, KEY_VOLUMEDOWN }, /* VOL - */ - { 0xce09, KEY_VOLUMEUP }, /* VOL + */ - { 0xd00b, KEY_CHANNELUP }, /* CHAN + */ - { 0xd10c, KEY_CHANNELDOWN }, /* CHAN - */ - { 0xc500, KEY_MUTE }, /* MUTE */ - - { 0xf732, KEY_RED }, /* red */ - { 0xf833, KEY_GREEN }, /* green */ - { 0xf934, KEY_YELLOW }, /* yellow */ - { 0xfa35, KEY_BLUE }, /* blue */ - { 0xdb16, KEY_TEXT }, /* TXT */ - - { 0xd20d, KEY_1 }, - { 0xd30e, KEY_2 }, - { 0xd40f, KEY_3 }, - { 0xd510, KEY_4 }, - { 0xd611, KEY_5 }, - { 0xd712, KEY_6 }, - { 0xd813, KEY_7 }, - { 0xd914, KEY_8 }, - { 0xda15, KEY_9 }, - { 0xdc17, KEY_0 }, - { 0xe11c, KEY_SEARCH }, /* TV/RAD, CH SRC */ - { 0xe520, KEY_DELETE }, /* DELETE */ - - { 0xfb36, KEY_KEYBOARD }, /* RENAME */ - { 0xdd18, KEY_SCREEN }, /* SNAPSHOT */ - - { 0xdf1a, KEY_UP }, /* up */ - { 0xe722, KEY_DOWN }, /* down */ - { 0xe21d, KEY_LEFT }, /* left */ - { 0xe41f, KEY_RIGHT }, /* right */ - { 0xe31e, KEY_OK }, /* OK */ - - { 0xfc37, KEY_SELECT }, /* ACQUIRE IMAGE */ - { 0xfd38, KEY_EDIT }, /* EDIT IMAGE */ - - { 0xe924, KEY_REWIND }, /* rewind (<<) */ - { 0xea25, KEY_PLAY }, /* play ( >) */ - { 0xeb26, KEY_FORWARD }, /* forward (>>) */ - { 0xec27, KEY_RECORD }, /* record ( o) */ - { 0xed28, KEY_STOP }, /* stop ([]) */ - { 0xee29, KEY_PAUSE }, /* pause ('') */ - - { 0xe621, KEY_PREVIOUS }, /* prev */ - { 0xfe39, KEY_SWITCHVIDEOMODE }, /* F SCR */ - { 0xe823, KEY_NEXT }, /* next */ - { 0xde19, KEY_MENU }, /* MENU */ - { 0xff3a, KEY_LANGUAGE }, /* AUDIO */ - - { 0xc702, KEY_POWER }, /* POWER */ + { 0x2c, KEY_TV }, /* TV */ + { 0x2d, KEY_VCR }, /* VCR */ + { 0x04, KEY_DVD }, /* DVD */ + { 0x06, KEY_AUDIO }, /* MUSIC */ + + { 0x2e, KEY_RADIO }, /* RADIO */ + { 0x05, KEY_DIRECTORY }, /* PHOTO */ + { 0x2f, KEY_INFO }, /* TV-PREVIEW */ + { 0x30, KEY_LIST }, /* CHANNEL-LST */ + + { 0x1b, KEY_SETUP }, /* SETUP */ + { 0x31, KEY_VIDEO }, /* VIDEO DESKTOP */ + + { 0x08, KEY_VOLUMEDOWN }, /* VOL - */ + { 0x09, KEY_VOLUMEUP }, /* VOL + */ + { 0x0b, KEY_CHANNELUP }, /* CHAN + */ + { 0x0c, KEY_CHANNELDOWN }, /* CHAN - */ + { 0x00, KEY_MUTE }, /* MUTE */ + + { 0x32, KEY_RED }, /* red */ + { 0x33, KEY_GREEN }, /* green */ + { 0x34, KEY_YELLOW }, /* yellow */ + { 0x35, KEY_BLUE }, /* blue */ + { 0x16, KEY_TEXT }, /* TXT */ + + { 0x0d, KEY_1 }, + { 0x0e, KEY_2 }, + { 0x0f, KEY_3 }, + { 0x10, KEY_4 }, + { 0x11, KEY_5 }, + { 0x12, KEY_6 }, + { 0x13, KEY_7 }, + { 0x14, KEY_8 }, + { 0x15, KEY_9 }, + { 0x17, KEY_0 }, + { 0x1c, KEY_SEARCH }, /* TV/RAD, CH SRC */ + { 0x20, KEY_DELETE }, /* DELETE */ + + { 0x36, KEY_KEYBOARD }, /* RENAME */ + { 0x18, KEY_SCREEN }, /* SNAPSHOT */ + + { 0x1a, KEY_UP }, /* up */ + { 0x22, KEY_DOWN }, /* down */ + { 0x1d, KEY_LEFT }, /* left */ + { 0x1f, KEY_RIGHT }, /* right */ + { 0x1e, KEY_OK }, /* OK */ + + { 0x37, KEY_SELECT }, /* ACQUIRE IMAGE */ + { 0x38, KEY_EDIT }, /* EDIT IMAGE */ + + { 0x24, KEY_REWIND }, /* rewind (<<) */ + { 0x25, KEY_PLAY }, /* play ( >) */ + { 0x26, KEY_FORWARD }, /* forward (>>) */ + { 0x27, KEY_RECORD }, /* record ( o) */ + { 0x28, KEY_STOP }, /* stop ([]) */ + { 0x29, KEY_PAUSE }, /* pause ('') */ + + { 0x21, KEY_PREVIOUS }, /* prev */ + { 0x39, KEY_SWITCHVIDEOMODE }, /* F SCR */ + { 0x23, KEY_NEXT }, /* next */ + { 0x19, KEY_MENU }, /* MENU */ + { 0x3a, KEY_LANGUAGE }, /* AUDIO */ + + { 0x02, KEY_POWER }, /* POWER */ }; static struct rc_map_list medion_x10_map = { diff --git a/drivers/media/rc/keymaps/rc-snapstream-firefly.c b/drivers/media/rc/keymaps/rc-snapstream-firefly.c index ef14652..c7f33ec 100644 --- a/drivers/media/rc/keymaps/rc-snapstream-firefly.c +++ b/drivers/media/rc/keymaps/rc-snapstream-firefly.c @@ -22,63 +22,63 @@ #include <media/rc-map.h> static struct rc_map_table snapstream_firefly[] = { - { 0xf12c, KEY_ZOOM }, /* Maximize */ - { 0xc702, KEY_CLOSE }, - - { 0xd20d, KEY_1 }, - { 0xd30e, KEY_2 }, - { 0xd40f, KEY_3 }, - { 0xd510, KEY_4 }, - { 0xd611, KEY_5 }, - { 0xd712, KEY_6 }, - { 0xd813, KEY_7 }, - { 0xd914, KEY_8 }, - { 0xda15, KEY_9 }, - { 0xdc17, KEY_0 }, - { 0xdb16, KEY_BACK }, - { 0xdd18, KEY_KPENTER }, /* ent */ - - { 0xce09, KEY_VOLUMEUP }, - { 0xcd08, KEY_VOLUMEDOWN }, - { 0xcf0a, KEY_MUTE }, - { 0xd00b, KEY_CHANNELUP }, - { 0xd10c, KEY_CHANNELDOWN }, - { 0xc500, KEY_VENDOR }, /* firefly */ - - { 0xf32e, KEY_INFO }, - { 0xf42f, KEY_OPTION }, - - { 0xe21d, KEY_LEFT }, - { 0xe41f, KEY_RIGHT }, - { 0xe722, KEY_DOWN }, - { 0xdf1a, KEY_UP }, - { 0xe31e, KEY_OK }, - - { 0xe11c, KEY_MENU }, - { 0xe520, KEY_EXIT }, - - { 0xec27, KEY_RECORD }, - { 0xea25, KEY_PLAY }, - { 0xed28, KEY_STOP }, - { 0xe924, KEY_REWIND }, - { 0xeb26, KEY_FORWARD }, - { 0xee29, KEY_PAUSE }, - { 0xf02b, KEY_PREVIOUS }, - { 0xef2a, KEY_NEXT }, - - { 0xcb06, KEY_AUDIO }, /* Music */ - { 0xca05, KEY_IMAGES }, /* Photos */ - { 0xc904, KEY_DVD }, - { 0xc803, KEY_TV }, - { 0xcc07, KEY_VIDEO }, - - { 0xc601, KEY_HELP }, - { 0xf22d, KEY_MODE }, /* Mouse */ - - { 0xde19, KEY_A }, - { 0xe01b, KEY_B }, - { 0xe621, KEY_C }, - { 0xe823, KEY_D }, + { 0x2c, KEY_ZOOM }, /* Maximize */ + { 0x02, KEY_CLOSE }, + + { 0x0d, KEY_1 }, + { 0x0e, KEY_2 }, + { 0x0f, KEY_3 }, + { 0x10, KEY_4 }, + { 0x11, KEY_5 }, + { 0x12, KEY_6 }, + { 0x13, KEY_7 }, + { 0x14, KEY_8 }, + { 0x15, KEY_9 }, + { 0x17, KEY_0 }, + { 0x16, KEY_BACK }, + { 0x18, KEY_KPENTER }, /* ent */ + + { 0x09, KEY_VOLUMEUP }, + { 0x08, KEY_VOLUMEDOWN }, + { 0x0a, KEY_MUTE }, + { 0x0b, KEY_CHANNELUP }, + { 0x0c, KEY_CHANNELDOWN }, + { 0x00, KEY_VENDOR }, /* firefly */ + + { 0x2e, KEY_INFO }, + { 0x2f, KEY_OPTION }, + + { 0x1d, KEY_LEFT }, + { 0x1f, KEY_RIGHT }, + { 0x22, KEY_DOWN }, + { 0x1a, KEY_UP }, + { 0x1e, KEY_OK }, + + { 0x1c, KEY_MENU }, + { 0x20, KEY_EXIT }, + + { 0x27, KEY_RECORD }, + { 0x25, KEY_PLAY }, + { 0x28, KEY_STOP }, + { 0x24, KEY_REWIND }, + { 0x26, KEY_FORWARD }, + { 0x29, KEY_PAUSE }, + { 0x2b, KEY_PREVIOUS }, + { 0x2a, KEY_NEXT }, + + { 0x06, KEY_AUDIO }, /* Music */ + { 0x05, KEY_IMAGES }, /* Photos */ + { 0x04, KEY_DVD }, + { 0x03, KEY_TV }, + { 0x07, KEY_VIDEO }, + + { 0x01, KEY_HELP }, + { 0x2d, KEY_MODE }, /* Mouse */ + + { 0x19, KEY_A }, + { 0x1b, KEY_B }, + { 0x21, KEY_C }, + { 0x23, KEY_D }, }; static struct rc_map_list snapstream_firefly_map = { diff --git a/drivers/media/video/au0828/au0828-cards.c b/drivers/media/video/au0828/au0828-cards.c index 39fc923..1c6015a 100644 --- a/drivers/media/video/au0828/au0828-cards.c +++ b/drivers/media/video/au0828/au0828-cards.c @@ -162,11 +162,14 @@ static void hauppauge_eeprom(struct au0828_dev *dev, u8 *eeprom_data) switch (tv.model) { case 72000: /* WinTV-HVR950q (Retail, IR, ATSC/QAM */ case 72001: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ + case 72101: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ + case 72201: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ case 72211: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ case 72221: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ case 72231: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ case 72241: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM and analog video */ case 72251: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and analog video */ + case 72261: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and analog video */ case 72301: /* WinTV-HVR850 (Retail, IR, ATSC and analog video */ case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */ break; @@ -324,6 +327,10 @@ struct usb_device_id au0828_usb_id_table[] = { .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q_MXL }, { USB_DEVICE(0x2040, 0x8200), .driver_info = AU0828_BOARD_HAUPPAUGE_WOODBURY }, + { USB_DEVICE(0x2040, 0x7260), + .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, + { USB_DEVICE(0x2040, 0x7213), + .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, { }, }; diff --git a/drivers/media/video/davinci/vpif.h b/drivers/media/video/davinci/vpif.h index 10550bd..25036cb 100644 --- a/drivers/media/video/davinci/vpif.h +++ b/drivers/media/video/davinci/vpif.h @@ -20,6 +20,7 @@ #include <linux/videodev2.h> #include <mach/hardware.h> #include <mach/dm646x.h> +#include <media/davinci/vpif_types.h> /* Maximum channel allowed */ #define VPIF_NUM_CHANNELS (4) diff --git a/drivers/media/video/davinci/vpif_capture.h b/drivers/media/video/davinci/vpif_capture.h index 064550f..a693d4e 100644 --- a/drivers/media/video/davinci/vpif_capture.h +++ b/drivers/media/video/davinci/vpif_capture.h @@ -27,7 +27,7 @@ #include <media/v4l2-device.h> #include <media/videobuf-core.h> #include <media/videobuf-dma-contig.h> -#include <mach/dm646x.h> +#include <media/davinci/vpif_types.h> #include "vpif.h" diff --git a/drivers/media/video/davinci/vpif_display.h b/drivers/media/video/davinci/vpif_display.h index 5d1936d..56879d1 100644 --- a/drivers/media/video/davinci/vpif_display.h +++ b/drivers/media/video/davinci/vpif_display.h @@ -22,6 +22,7 @@ #include <media/v4l2-device.h> #include <media/videobuf-core.h> #include <media/videobuf-dma-contig.h> +#include <media/davinci/vpif_types.h> #include "vpif.h" diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c index 881e04c..2ca10df 100644 --- a/drivers/media/video/gspca/gspca.c +++ b/drivers/media/video/gspca/gspca.c @@ -838,13 +838,13 @@ static int gspca_init_transfer(struct gspca_dev *gspca_dev) gspca_dev->usb_err = 0; /* do the specific subdriver stuff before endpoint selection */ - gspca_dev->alt = 0; + intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface); + gspca_dev->alt = gspca_dev->cam.bulk ? intf->num_altsetting : 0; if (gspca_dev->sd_desc->isoc_init) { ret = gspca_dev->sd_desc->isoc_init(gspca_dev); if (ret < 0) goto unlock; } - intf = usb_ifnum_to_if(gspca_dev->dev, gspca_dev->iface); xfer = gspca_dev->cam.bulk ? USB_ENDPOINT_XFER_BULK : USB_ENDPOINT_XFER_ISOC; @@ -957,7 +957,7 @@ retry: ret = -EIO; goto out; } - alt = ep_tb[--alt_idx].alt; + gspca_dev->alt = ep_tb[--alt_idx].alt; } } out: diff --git a/drivers/media/video/m5mols/m5mols.h b/drivers/media/video/m5mols/m5mols.h index 89d09a8..82c8817 100644 --- a/drivers/media/video/m5mols/m5mols.h +++ b/drivers/media/video/m5mols/m5mols.h @@ -162,7 +162,6 @@ struct m5mols_version { * @pad: media pad * @ffmt: current fmt according to resolution type * @res_type: current resolution type - * @code: current code * @irq_waitq: waitqueue for the capture * @work_irq: workqueue for the IRQ * @flags: state variable for the interrupt handler @@ -192,7 +191,6 @@ struct m5mols_info { struct media_pad pad; struct v4l2_mbus_framefmt ffmt[M5MOLS_RESTYPE_MAX]; int res_type; - enum v4l2_mbus_pixelcode code; wait_queue_head_t irq_waitq; struct work_struct work_irq; unsigned long flags; diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c index 05ab370..e0f09e5 100644 --- a/drivers/media/video/m5mols/m5mols_core.c +++ b/drivers/media/video/m5mols/m5mols_core.c @@ -334,7 +334,7 @@ int m5mols_mode(struct m5mols_info *info, u8 mode) int ret = -EINVAL; u8 reg; - if (mode < REG_PARAMETER && mode > REG_CAPTURE) + if (mode < REG_PARAMETER || mode > REG_CAPTURE) return ret; ret = m5mols_read_u8(sd, SYSTEM_SYSMODE, ®); @@ -511,9 +511,6 @@ static int m5mols_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, struct m5mols_info *info = to_m5mols(sd); struct v4l2_mbus_framefmt *format; - if (fmt->pad != 0) - return -EINVAL; - format = __find_format(info, fh, fmt->which, info->res_type); if (!format) return -EINVAL; @@ -532,9 +529,6 @@ static int m5mols_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, u32 resolution = 0; int ret; - if (fmt->pad != 0) - return -EINVAL; - ret = __find_resolution(sd, format, &type, &resolution); if (ret < 0) return ret; @@ -543,13 +537,14 @@ static int m5mols_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh, if (!sfmt) return 0; - *sfmt = m5mols_default_ffmt[type]; - sfmt->width = format->width; - sfmt->height = format->height; + + format->code = m5mols_default_ffmt[type].code; + format->colorspace = V4L2_COLORSPACE_JPEG; + format->field = V4L2_FIELD_NONE; if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { + *sfmt = *format; info->resolution = resolution; - info->code = format->code; info->res_type = type; } @@ -626,13 +621,14 @@ static int m5mols_start_monitor(struct m5mols_info *info) static int m5mols_s_stream(struct v4l2_subdev *sd, int enable) { struct m5mols_info *info = to_m5mols(sd); + u32 code = info->ffmt[info->res_type].code; if (enable) { int ret = -EINVAL; - if (is_code(info->code, M5MOLS_RESTYPE_MONITOR)) + if (is_code(code, M5MOLS_RESTYPE_MONITOR)) ret = m5mols_start_monitor(info); - if (is_code(info->code, M5MOLS_RESTYPE_CAPTURE)) + if (is_code(code, M5MOLS_RESTYPE_CAPTURE)) ret = m5mols_start_capture(info); return ret; diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c index cf2c0fb..398f96f 100644 --- a/drivers/media/video/mt9m111.c +++ b/drivers/media/video/mt9m111.c @@ -955,6 +955,7 @@ static int mt9m111_probe(struct i2c_client *client, mt9m111->rect.height = MT9M111_MAX_HEIGHT; mt9m111->fmt = &mt9m111_colour_fmts[0]; mt9m111->lastpage = -1; + mutex_init(&mt9m111->power_lock); ret = mt9m111_video_probe(client); if (ret) { diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c index 32114a3..7b34b11 100644 --- a/drivers/media/video/mt9t112.c +++ b/drivers/media/video/mt9t112.c @@ -1083,8 +1083,10 @@ static int mt9t112_probe(struct i2c_client *client, v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops); ret = mt9t112_camera_probe(client); - if (ret) + if (ret) { kfree(priv); + return ret; + } /* Cannot fail: using the default supported pixel code */ mt9t112_set_params(priv, &rect, V4L2_MBUS_FMT_UYVY8_2X8); diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c index 9c5c19f..ee0d0b3 100644 --- a/drivers/media/video/omap/omap_vout.c +++ b/drivers/media/video/omap/omap_vout.c @@ -38,6 +38,7 @@ #include <linux/irq.h> #include <linux/videodev2.h> #include <linux/dma-mapping.h> +#include <linux/slab.h> #include <media/videobuf-dma-contig.h> #include <media/v4l2-device.h> @@ -2169,6 +2170,14 @@ static int __init omap_vout_probe(struct platform_device *pdev) vid_dev->num_displays = 0; for_each_dss_dev(dssdev) { omap_dss_get_device(dssdev); + + if (!dssdev->driver) { + dev_warn(&pdev->dev, "no driver for display: %s\n", + dssdev->name); + omap_dss_put_device(dssdev); + continue; + } + vid_dev->displays[vid_dev->num_displays++] = dssdev; } diff --git a/drivers/media/video/omap1_camera.c b/drivers/media/video/omap1_camera.c index e87ae2f..6a6cf38 100644 --- a/drivers/media/video/omap1_camera.c +++ b/drivers/media/video/omap1_camera.c @@ -24,6 +24,7 @@ #include <linux/clk.h> #include <linux/dma-mapping.h> #include <linux/interrupt.h> +#include <linux/module.h> #include <linux/platform_device.h> #include <linux/slab.h> diff --git a/drivers/media/video/omap24xxcam-dma.c b/drivers/media/video/omap24xxcam-dma.c index 1d54b86..3ea38a8 100644 --- a/drivers/media/video/omap24xxcam-dma.c +++ b/drivers/media/video/omap24xxcam-dma.c @@ -506,7 +506,7 @@ int omap24xxcam_sgdma_queue(struct omap24xxcam_sgdma *sgdma, unsigned long flags; struct sgdma_state *sg_state; - if ((sglen < 0) || ((sglen > 0) & !sglist)) + if ((sglen < 0) || ((sglen > 0) && !sglist)) return -EINVAL; spin_lock_irqsave(&sgdma->lock, flags); diff --git a/drivers/media/video/omap3isp/ispccdc.c b/drivers/media/video/omap3isp/ispccdc.c index b0b0fa5..54a4a3f 100644 --- a/drivers/media/video/omap3isp/ispccdc.c +++ b/drivers/media/video/omap3isp/ispccdc.c @@ -1408,7 +1408,7 @@ static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc) { struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->video_out.video.entity); - struct video_device *vdev = &ccdc->subdev.devnode; + struct video_device *vdev = ccdc->subdev.devnode; struct v4l2_event event; memset(&event, 0, sizeof(event)); diff --git a/drivers/media/video/omap3isp/ispstat.c b/drivers/media/video/omap3isp/ispstat.c index 68d5394..bc0b2c7 100644 --- a/drivers/media/video/omap3isp/ispstat.c +++ b/drivers/media/video/omap3isp/ispstat.c @@ -496,7 +496,7 @@ static int isp_stat_bufs_alloc(struct ispstat *stat, u32 size) static void isp_stat_queue_event(struct ispstat *stat, int err) { - struct video_device *vdev = &stat->subdev.devnode; + struct video_device *vdev = stat->subdev.devnode; struct v4l2_event event; struct omap3isp_stat_event_status *status = (void *)event.u.data; diff --git a/drivers/media/video/omap3isp/ispvideo.c b/drivers/media/video/omap3isp/ispvideo.c index d100072..f229057 100644 --- a/drivers/media/video/omap3isp/ispvideo.c +++ b/drivers/media/video/omap3isp/ispvideo.c @@ -26,6 +26,7 @@ #include <asm/cacheflush.h> #include <linux/clk.h> #include <linux/mm.h> +#include <linux/module.h> #include <linux/pagemap.h> #include <linux/scatterlist.h> #include <linux/sched.h> diff --git a/drivers/media/video/ov6650.c b/drivers/media/video/ov6650.c index 9f2d26b..6806345 100644 --- a/drivers/media/video/ov6650.c +++ b/drivers/media/video/ov6650.c @@ -540,7 +540,7 @@ static u8 to_clkrc(struct v4l2_fract *timeperframe, static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf) { struct i2c_client *client = v4l2_get_subdevdata(sd); - struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; + struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd); struct soc_camera_sense *sense = icd->sense; struct ov6650 *priv = to_ov6650(client); bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect); diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index c8d91b0..2cc3b91 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c @@ -98,6 +98,10 @@ static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend) vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); } set_bit(ST_CAPT_SUSPENDED, &fimc->state); + + fimc_hw_reset(fimc); + cap->buf_index = 0; + spin_unlock_irqrestore(&fimc->slock, flags); if (streaming) @@ -137,7 +141,7 @@ int fimc_capture_config_update(struct fimc_ctx *ctx) struct fimc_dev *fimc = ctx->fimc_dev; int ret; - if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) + if (!test_bit(ST_CAPT_APPLY_CFG, &fimc->state)) return 0; spin_lock(&ctx->slock); @@ -150,7 +154,7 @@ int fimc_capture_config_update(struct fimc_ctx *ctx) fimc_hw_set_rotation(ctx); fimc_prepare_dma_offset(ctx, &ctx->d_frame); fimc_hw_set_out_dma(ctx); - set_bit(ST_CAPT_APPLY_CFG, &fimc->state); + clear_bit(ST_CAPT_APPLY_CFG, &fimc->state); } spin_unlock(&ctx->slock); return ret; @@ -164,7 +168,6 @@ static int start_streaming(struct vb2_queue *q, unsigned int count) int min_bufs; int ret; - fimc_hw_reset(fimc); vid_cap->frame_count = 0; ret = fimc_init_capture(fimc); @@ -523,7 +526,7 @@ static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx, max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w; min_w = ctx->state & FIMC_DST_CROP ? dst->width : var->min_out_pixsize; min_h = ctx->state & FIMC_DST_CROP ? dst->height : var->min_out_pixsize; - if (fimc->id == 1 && var->pix_hoff) + if (var->min_vsize_align == 1 && !rotation) align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1; depth = fimc_get_format_depth(ffmt); @@ -1239,6 +1242,7 @@ static int fimc_subdev_set_fmt(struct v4l2_subdev *sd, mutex_lock(&fimc->lock); set_frame_bounds(ff, mf->width, mf->height); + fimc->vid_cap.mf = *mf; ff->fmt = ffmt; /* Reset the crop rectangle if required. */ @@ -1375,7 +1379,7 @@ static void fimc_destroy_capture_subdev(struct fimc_dev *fimc) media_entity_cleanup(&sd->entity); v4l2_device_unregister_subdev(sd); kfree(sd); - sd = NULL; + fimc->vid_cap.subdev = NULL; } /* Set default format at the sensor and host interface */ diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index 19ca6db..07c6254 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c @@ -37,7 +37,7 @@ static char *fimc_clocks[MAX_FIMC_CLOCKS] = { static struct fimc_fmt fimc_formats[] = { { .name = "RGB565", - .fourcc = V4L2_PIX_FMT_RGB565X, + .fourcc = V4L2_PIX_FMT_RGB565, .depth = { 16 }, .color = S5P_FIMC_RGB565, .memplanes = 1, @@ -1038,12 +1038,11 @@ static int fimc_try_fmt_mplane(struct fimc_ctx *ctx, struct v4l2_format *f) mod_x = 6; /* 64 x 32 pixels tile */ mod_y = 5; } else { - if (fimc->id == 1 && variant->pix_hoff) + if (variant->min_vsize_align == 1) mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1; else - mod_y = mod_x; + mod_y = ffs(variant->min_vsize_align) - 1; } - dbg("mod_x: %d, mod_y: %d, max_w: %d", mod_x, mod_y, max_w); v4l_bound_align_image(&pix->width, 16, max_w, mod_x, &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0); @@ -1226,10 +1225,10 @@ static int fimc_m2m_try_crop(struct fimc_ctx *ctx, struct v4l2_crop *cr) fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize; /* Get pixel alignment constraints. */ - if (fimc->id == 1 && fimc->variant->pix_hoff) + if (fimc->variant->min_vsize_align == 1) halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1; else - halign = ffs(min_size) - 1; + halign = ffs(fimc->variant->min_vsize_align) - 1; for (i = 0; i < f->fmt->colplanes; i++) depth += f->fmt->depth[i]; @@ -1615,7 +1614,6 @@ static int fimc_probe(struct platform_device *pdev) pdata = pdev->dev.platform_data; fimc->pdata = pdata; - set_bit(ST_LPM, &fimc->state); init_waitqueue_head(&fimc->irq_queue); spin_lock_init(&fimc->slock); @@ -1707,8 +1705,6 @@ static int fimc_runtime_resume(struct device *dev) /* Enable clocks and perform basic initalization */ clk_enable(fimc->clock[CLK_GATE]); fimc_hw_reset(fimc); - if (fimc->variant->out_buf_count > 4) - fimc_hw_set_dma_seq(fimc, 0xF); /* Resume the capture or mem-to-mem device */ if (fimc_capture_busy(fimc)) @@ -1750,8 +1746,6 @@ static int fimc_resume(struct device *dev) return 0; } fimc_hw_reset(fimc); - if (fimc->variant->out_buf_count > 4) - fimc_hw_set_dma_seq(fimc, 0xF); spin_unlock_irqrestore(&fimc->slock, flags); if (fimc_capture_busy(fimc)) @@ -1780,7 +1774,6 @@ static int __devexit fimc_remove(struct platform_device *pdev) struct fimc_dev *fimc = platform_get_drvdata(pdev); pm_runtime_disable(&pdev->dev); - fimc_runtime_suspend(&pdev->dev); pm_runtime_set_suspended(&pdev->dev); vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx); @@ -1840,6 +1833,7 @@ static struct samsung_fimc_variant fimc0_variant_s5p = { .min_inp_pixsize = 16, .min_out_pixsize = 16, .hor_offs_align = 8, + .min_vsize_align = 16, .out_buf_count = 4, .pix_limit = &s5p_pix_limit[0], }; @@ -1849,6 +1843,7 @@ static struct samsung_fimc_variant fimc2_variant_s5p = { .min_inp_pixsize = 16, .min_out_pixsize = 16, .hor_offs_align = 8, + .min_vsize_align = 16, .out_buf_count = 4, .pix_limit = &s5p_pix_limit[1], }; @@ -1861,6 +1856,7 @@ static struct samsung_fimc_variant fimc0_variant_s5pv210 = { .min_inp_pixsize = 16, .min_out_pixsize = 16, .hor_offs_align = 8, + .min_vsize_align = 16, .out_buf_count = 4, .pix_limit = &s5p_pix_limit[1], }; @@ -1874,6 +1870,7 @@ static struct samsung_fimc_variant fimc1_variant_s5pv210 = { .min_inp_pixsize = 16, .min_out_pixsize = 16, .hor_offs_align = 1, + .min_vsize_align = 1, .out_buf_count = 4, .pix_limit = &s5p_pix_limit[2], }; @@ -1884,6 +1881,7 @@ static struct samsung_fimc_variant fimc2_variant_s5pv210 = { .min_inp_pixsize = 16, .min_out_pixsize = 16, .hor_offs_align = 8, + .min_vsize_align = 16, .out_buf_count = 4, .pix_limit = &s5p_pix_limit[2], }; @@ -1898,6 +1896,7 @@ static struct samsung_fimc_variant fimc0_variant_exynos4 = { .min_inp_pixsize = 16, .min_out_pixsize = 16, .hor_offs_align = 2, + .min_vsize_align = 1, .out_buf_count = 32, .pix_limit = &s5p_pix_limit[1], }; @@ -1910,6 +1909,7 @@ static struct samsung_fimc_variant fimc3_variant_exynos4 = { .min_inp_pixsize = 16, .min_out_pixsize = 16, .hor_offs_align = 2, + .min_vsize_align = 1, .out_buf_count = 32, .pix_limit = &s5p_pix_limit[3], }; diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h index a6936da..c7f01c4 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.h +++ b/drivers/media/video/s5p-fimc/fimc-core.h @@ -377,6 +377,7 @@ struct fimc_pix_limit { * @min_inp_pixsize: minimum input pixel size * @min_out_pixsize: minimum output pixel size * @hor_offs_align: horizontal pixel offset aligment + * @min_vsize_align: minimum vertical pixel size alignment * @out_buf_count: the number of buffers in output DMA sequence */ struct samsung_fimc_variant { @@ -390,6 +391,7 @@ struct samsung_fimc_variant { u16 min_inp_pixsize; u16 min_out_pixsize; u16 hor_offs_align; + u16 min_vsize_align; u16 out_buf_count; }; diff --git a/drivers/media/video/s5p-fimc/fimc-mdevice.c b/drivers/media/video/s5p-fimc/fimc-mdevice.c index cc337b1..615c862 100644 --- a/drivers/media/video/s5p-fimc/fimc-mdevice.c +++ b/drivers/media/video/s5p-fimc/fimc-mdevice.c @@ -220,6 +220,7 @@ static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd, sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter, s_info->pdata->board_info, NULL); if (IS_ERR_OR_NULL(sd)) { + i2c_put_adapter(adapter); v4l2_err(&fmd->v4l2_dev, "Failed to acquire subdev\n"); return NULL; } @@ -234,12 +235,15 @@ static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd, static void fimc_md_unregister_sensor(struct v4l2_subdev *sd) { struct i2c_client *client = v4l2_get_subdevdata(sd); + struct i2c_adapter *adapter; if (!client) return; v4l2_device_unregister_subdev(sd); + adapter = client->adapter; i2c_unregister_device(client); - i2c_put_adapter(client->adapter); + if (adapter) + i2c_put_adapter(adapter); } static int fimc_md_register_sensor_entities(struct fimc_md *fmd) @@ -381,20 +385,28 @@ static void fimc_md_unregister_entities(struct fimc_md *fmd) static int fimc_md_register_video_nodes(struct fimc_md *fmd) { + struct video_device *vdev; int i, ret = 0; for (i = 0; i < FIMC_MAX_DEVS && !ret; i++) { if (!fmd->fimc[i]) continue; - if (fmd->fimc[i]->m2m.vfd) - ret = video_register_device(fmd->fimc[i]->m2m.vfd, - VFL_TYPE_GRABBER, -1); - if (ret) - break; - if (fmd->fimc[i]->vid_cap.vfd) - ret = video_register_device(fmd->fimc[i]->vid_cap.vfd, - VFL_TYPE_GRABBER, -1); + vdev = fmd->fimc[i]->m2m.vfd; + if (vdev) { + ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); + if (ret) + break; + v4l2_info(&fmd->v4l2_dev, "Registered %s as /dev/%s\n", + vdev->name, video_device_node_name(vdev)); + } + + vdev = fmd->fimc[i]->vid_cap.vfd; + if (vdev == NULL) + continue; + ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); + v4l2_info(&fmd->v4l2_dev, "Registered %s as /dev/%s\n", + vdev->name, video_device_node_name(vdev)); } return ret; @@ -502,7 +514,7 @@ static int fimc_md_create_links(struct fimc_md *fmd) if (WARN(csis == NULL, "MIPI-CSI interface specified " "but s5p-csis module is not loaded!\n")) - continue; + return -EINVAL; ret = media_entity_create_link(&sensor->entity, 0, &csis->entity, CSIS_PAD_SINK, @@ -742,9 +754,6 @@ static int __devinit fimc_md_probe(struct platform_device *pdev) struct fimc_md *fmd; int ret; - if (WARN(!pdev->dev.platform_data, "Platform data not specified!\n")) - return -EINVAL; - fmd = kzalloc(sizeof(struct fimc_md), GFP_KERNEL); if (!fmd) return -ENOMEM; @@ -782,9 +791,11 @@ static int __devinit fimc_md_probe(struct platform_device *pdev) if (ret) goto err3; - ret = fimc_md_register_sensor_entities(fmd); - if (ret) - goto err3; + if (pdev->dev.platform_data) { + ret = fimc_md_register_sensor_entities(fmd); + if (ret) + goto err3; + } ret = fimc_md_create_links(fmd); if (ret) goto err3; diff --git a/drivers/media/video/s5p-fimc/fimc-reg.c b/drivers/media/video/s5p-fimc/fimc-reg.c index 20e664e..44f5c2d 100644 --- a/drivers/media/video/s5p-fimc/fimc-reg.c +++ b/drivers/media/video/s5p-fimc/fimc-reg.c @@ -35,6 +35,9 @@ void fimc_hw_reset(struct fimc_dev *dev) cfg = readl(dev->regs + S5P_CIGCTRL); cfg &= ~S5P_CIGCTRL_SWRST; writel(cfg, dev->regs + S5P_CIGCTRL); + + if (dev->variant->out_buf_count > 4) + fimc_hw_set_dma_seq(dev, 0xF); } static u32 fimc_hw_get_in_flip(struct fimc_ctx *ctx) @@ -251,7 +254,14 @@ static void fimc_hw_set_scaler(struct fimc_ctx *ctx) struct fimc_scaler *sc = &ctx->scaler; struct fimc_frame *src_frame = &ctx->s_frame; struct fimc_frame *dst_frame = &ctx->d_frame; - u32 cfg = 0; + + u32 cfg = readl(dev->regs + S5P_CISCCTRL); + + cfg &= ~(S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE | + S5P_CISCCTRL_SCALEUP_H | S5P_CISCCTRL_SCALEUP_V | + S5P_CISCCTRL_SCALERBYPASS | S5P_CISCCTRL_ONE2ONE | + S5P_CISCCTRL_INRGB_FMT_MASK | S5P_CISCCTRL_OUTRGB_FMT_MASK | + S5P_CISCCTRL_INTERLACE | S5P_CISCCTRL_RGB_EXT); if (!(ctx->flags & FIMC_COLOR_RANGE_NARROW)) cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE); @@ -308,9 +318,9 @@ void fimc_hw_set_mainscaler(struct fimc_ctx *ctx) fimc_hw_set_scaler(ctx); cfg = readl(dev->regs + S5P_CISCCTRL); + cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); if (variant->has_mainscaler_ext) { - cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); cfg |= S5P_CISCCTRL_MHRATIO_EXT(sc->main_hratio); cfg |= S5P_CISCCTRL_MVRATIO_EXT(sc->main_vratio); writel(cfg, dev->regs + S5P_CISCCTRL); @@ -323,7 +333,6 @@ void fimc_hw_set_mainscaler(struct fimc_ctx *ctx) cfg |= S5P_CIEXTEN_MVRATIO_EXT(sc->main_vratio); writel(cfg, dev->regs + S5P_CIEXTEN); } else { - cfg &= ~(S5P_CISCCTRL_MHRATIO_MASK | S5P_CISCCTRL_MVRATIO_MASK); cfg |= S5P_CISCCTRL_MHRATIO(sc->main_hratio); cfg |= S5P_CISCCTRL_MVRATIO(sc->main_vratio); writel(cfg, dev->regs + S5P_CISCCTRL); diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c index 1e8cdb7..dff9dc7 100644 --- a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c @@ -61,7 +61,7 @@ static struct s5p_mfc_fmt formats[] = { .num_planes = 1, }, { - .name = "H264 Encoded Stream", + .name = "H263 Encoded Stream", .fourcc = V4L2_PIX_FMT_H263, .codec_mode = S5P_FIMV_CODEC_H263_ENC, .type = MFC_FMT_ENC, diff --git a/drivers/media/video/s5p-tv/mixer_video.c b/drivers/media/video/s5p-tv/mixer_video.c index e16d3a4..b47d0c0 100644 --- a/drivers/media/video/s5p-tv/mixer_video.c +++ b/drivers/media/video/s5p-tv/mixer_video.c @@ -16,6 +16,7 @@ #include <media/v4l2-ioctl.h> #include <linux/videodev2.h> #include <linux/mm.h> +#include <linux/module.h> #include <linux/version.h> #include <linux/timer.h> #include <media/videobuf2-dma-contig.h> diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c index f390682..c51decf 100644 --- a/drivers/media/video/sh_mobile_ceu_camera.c +++ b/drivers/media/video/sh_mobile_ceu_camera.c @@ -566,8 +566,10 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) ret = sh_mobile_ceu_soft_reset(pcdev); csi2_sd = find_csi2(pcdev); - if (csi2_sd) - csi2_sd->grp_id = (long)icd; + if (csi2_sd) { + csi2_sd->grp_id = soc_camera_grp_id(icd); + v4l2_set_subdev_hostdata(csi2_sd, icd); + } ret = v4l2_subdev_call(csi2_sd, core, s_power, 1); if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) { @@ -768,7 +770,7 @@ static struct v4l2_subdev *find_bus_subdev(struct sh_mobile_ceu_dev *pcdev, { if (pcdev->csi2_pdev) { struct v4l2_subdev *csi2_sd = find_csi2(pcdev); - if (csi2_sd && csi2_sd->grp_id == (u32)icd) + if (csi2_sd && csi2_sd->grp_id == soc_camera_grp_id(icd)) return csi2_sd; } @@ -1089,8 +1091,9 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int /* Try 2560x1920, 1280x960, 640x480, 320x240 */ mf.width = 2560 >> shift; mf.height = 1920 >> shift; - ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, - s_mbus_fmt, &mf); + ret = v4l2_device_call_until_err(sd->v4l2_dev, + soc_camera_grp_id(icd), video, + s_mbus_fmt, &mf); if (ret < 0) return ret; shift++; @@ -1389,7 +1392,8 @@ static int client_s_fmt(struct soc_camera_device *icd, bool ceu_1to1; int ret; - ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, + ret = v4l2_device_call_until_err(sd->v4l2_dev, + soc_camera_grp_id(icd), video, s_mbus_fmt, mf); if (ret < 0) return ret; @@ -1426,8 +1430,9 @@ static int client_s_fmt(struct soc_camera_device *icd, tmp_h = min(2 * tmp_h, max_height); mf->width = tmp_w; mf->height = tmp_h; - ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, - s_mbus_fmt, mf); + ret = v4l2_device_call_until_err(sd->v4l2_dev, + soc_camera_grp_id(icd), video, + s_mbus_fmt, mf); dev_geo(dev, "Camera scaled to %ux%u\n", mf->width, mf->height); if (ret < 0) { @@ -1580,8 +1585,9 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd, } if (interm_width < icd->user_width || interm_height < icd->user_height) { - ret = v4l2_device_call_until_err(sd->v4l2_dev, (int)icd, video, - s_mbus_fmt, &mf); + ret = v4l2_device_call_until_err(sd->v4l2_dev, + soc_camera_grp_id(icd), video, + s_mbus_fmt, &mf); if (ret < 0) return ret; @@ -1867,7 +1873,8 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, mf.code = xlate->code; mf.colorspace = pix->colorspace; - ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, try_mbus_fmt, &mf); + ret = v4l2_device_call_until_err(sd->v4l2_dev, soc_camera_grp_id(icd), + video, try_mbus_fmt, &mf); if (ret < 0) return ret; @@ -1891,8 +1898,9 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, */ mf.width = 2560; mf.height = 1920; - ret = v4l2_device_call_until_err(sd->v4l2_dev, (long)icd, video, - try_mbus_fmt, &mf); + ret = v4l2_device_call_until_err(sd->v4l2_dev, + soc_camera_grp_id(icd), video, + try_mbus_fmt, &mf); if (ret < 0) { /* Shouldn't actually happen... */ dev_err(icd->parent, diff --git a/drivers/media/video/sh_mobile_csi2.c b/drivers/media/video/sh_mobile_csi2.c index ea4f047..8a652b5 100644 --- a/drivers/media/video/sh_mobile_csi2.c +++ b/drivers/media/video/sh_mobile_csi2.c @@ -143,7 +143,7 @@ static int sh_csi2_s_mbus_config(struct v4l2_subdev *sd, const struct v4l2_mbus_config *cfg) { struct sh_csi2 *priv = container_of(sd, struct sh_csi2, subdev); - struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; + struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd); struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); struct v4l2_mbus_config client_cfg = {.type = V4L2_MBUS_CSI2, .flags = priv->mipi_flags}; @@ -202,7 +202,7 @@ static void sh_csi2_hwinit(struct sh_csi2 *priv) static int sh_csi2_client_connect(struct sh_csi2 *priv) { struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; - struct soc_camera_device *icd = (struct soc_camera_device *)priv->subdev.grp_id; + struct soc_camera_device *icd = v4l2_get_subdev_hostdata(&priv->subdev); struct v4l2_subdev *client_sd = soc_camera_to_subdev(icd); struct device *dev = v4l2_get_subdevdata(&priv->subdev); struct v4l2_mbus_config cfg; diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index b72580c..62e4312 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c @@ -1103,7 +1103,8 @@ static int soc_camera_probe(struct soc_camera_device *icd) } sd = soc_camera_to_subdev(icd); - sd->grp_id = (long)icd; + sd->grp_id = soc_camera_grp_id(icd); + v4l2_set_subdev_hostdata(sd, icd); if (v4l2_ctrl_add_handler(&icd->ctrl_handler, sd->ctrl_handler)) goto ectrl; diff --git a/drivers/mfd/ab5500-debugfs.c b/drivers/mfd/ab5500-debugfs.c index 43c0ebb..b7b2d348 100644 --- a/drivers/mfd/ab5500-debugfs.c +++ b/drivers/mfd/ab5500-debugfs.c @@ -4,7 +4,7 @@ * Debugfs support for the AB5500 MFD driver */ -#include <linux/export.h> +#include <linux/module.h> #include <linux/debugfs.h> #include <linux/seq_file.h> #include <linux/mfd/ab5500/ab5500.h> diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index 1e91738..d3d572b 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -620,6 +620,7 @@ static struct resource __devinitdata ab8500_fg_resources[] = { static struct resource __devinitdata ab8500_chargalg_resources[] = {}; +#ifdef CONFIG_DEBUG_FS static struct resource __devinitdata ab8500_debug_resources[] = { { .name = "IRQ_FIRST", @@ -634,6 +635,7 @@ static struct resource __devinitdata ab8500_debug_resources[] = { .flags = IORESOURCE_IRQ, }, }; +#endif static struct resource __devinitdata ab8500_usb_resources[] = { { diff --git a/drivers/mfd/adp5520.c b/drivers/mfd/adp5520.c index f1d8848..8d816cc 100644 --- a/drivers/mfd/adp5520.c +++ b/drivers/mfd/adp5520.c @@ -109,7 +109,7 @@ int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask) ret = __adp5520_read(chip->client, reg, ®_val); - if (!ret && ((reg_val & bit_mask) == 0)) { + if (!ret && ((reg_val & bit_mask) != bit_mask)) { reg_val |= bit_mask; ret = __adp5520_write(chip->client, reg, reg_val); } diff --git a/drivers/mfd/da903x.c b/drivers/mfd/da903x.c index 1b79c37..1924b85 100644 --- a/drivers/mfd/da903x.c +++ b/drivers/mfd/da903x.c @@ -182,7 +182,7 @@ int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask) if (ret) goto out; - if ((reg_val & bit_mask) == 0) { + if ((reg_val & bit_mask) != bit_mask) { reg_val |= bit_mask; ret = __da903x_write(chip->client, reg, reg_val); } @@ -549,6 +549,7 @@ static int __devexit da903x_remove(struct i2c_client *client) struct da903x_chip *chip = i2c_get_clientdata(client); da903x_remove_subdevs(chip); + free_irq(client->irq, chip); kfree(chip); return 0; } diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c index 1e9ee53..ef39528 100644 --- a/drivers/mfd/jz4740-adc.c +++ b/drivers/mfd/jz4740-adc.c @@ -16,6 +16,7 @@ */ #include <linux/err.h> +#include <linux/io.h> #include <linux/irq.h> #include <linux/interrupt.h> #include <linux/kernel.h> diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c index bba26d9..a5ddf31 100644 --- a/drivers/mfd/tps6586x.c +++ b/drivers/mfd/tps6586x.c @@ -197,7 +197,7 @@ int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask) if (ret) goto out; - if ((reg_val & bit_mask) == 0) { + if ((reg_val & bit_mask) != bit_mask) { reg_val |= bit_mask; ret = __tps6586x_write(to_i2c_client(dev), reg, reg_val); } diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c index 6f5b8cf..c1da84b 100644 --- a/drivers/mfd/tps65910.c +++ b/drivers/mfd/tps65910.c @@ -120,7 +120,7 @@ int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask) goto out; } - data &= mask; + data &= ~mask; err = tps65910_i2c_write(tps65910, reg, 1, &data); if (err) dev_err(tps65910->dev, "write to reg %x failed\n", reg); diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index bfbd660..61e70cf 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c @@ -363,13 +363,13 @@ int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); return -EPERM; } - sid = twl_map[mod_no].sid; - twl = &twl_modules[sid]; - if (unlikely(!inuse)) { - pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); + pr_err("%s: not initialized\n", DRIVER_NAME); return -EPERM; } + sid = twl_map[mod_no].sid; + twl = &twl_modules[sid]; + mutex_lock(&twl->xfer_lock); /* * [MSG1]: fill the register address data @@ -420,13 +420,13 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes) pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no); return -EPERM; } - sid = twl_map[mod_no].sid; - twl = &twl_modules[sid]; - if (unlikely(!inuse)) { - pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid); + pr_err("%s: not initialized\n", DRIVER_NAME); return -EPERM; } + sid = twl_map[mod_no].sid; + twl = &twl_modules[sid]; + mutex_lock(&twl->xfer_lock); /* [MSG1] fill the register address data */ msg = &twl->xfer_msg[0]; diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c index f062c8c..29f11e0 100644 --- a/drivers/mfd/twl4030-irq.c +++ b/drivers/mfd/twl4030-irq.c @@ -432,6 +432,7 @@ struct sih_agent { u32 edge_change; struct mutex irq_lock; + char *irq_name; }; /*----------------------------------------------------------------------*/ @@ -589,7 +590,7 @@ static inline int sih_read_isr(const struct sih *sih) * Generic handler for SIH interrupts ... we "know" this is called * in task context, with IRQs enabled. */ -static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) +static irqreturn_t handle_twl4030_sih(int irq, void *data) { struct sih_agent *agent = irq_get_handler_data(irq); const struct sih *sih = agent->sih; @@ -602,7 +603,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) pr_err("twl4030: %s SIH, read ISR error %d\n", sih->name, isr); /* REVISIT: recover; eventually mask it all, etc */ - return; + return IRQ_HANDLED; } while (isr) { @@ -616,6 +617,7 @@ static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) pr_err("twl4030: %s SIH, invalid ISR bit %d\n", sih->name, irq); } + return IRQ_HANDLED; } static unsigned twl4030_irq_next; @@ -668,18 +670,19 @@ int twl4030_sih_setup(int module) activate_irq(irq); } - status = irq_base; twl4030_irq_next += i; /* replace generic PIH handler (handle_simple_irq) */ irq = sih_mod + twl4030_irq_base; irq_set_handler_data(irq, agent); - irq_set_chained_handler(irq, handle_twl4030_sih); + agent->irq_name = kasprintf(GFP_KERNEL, "twl4030_%s", sih->name); + status = request_threaded_irq(irq, NULL, handle_twl4030_sih, 0, + agent->irq_name ?: sih->name, NULL); pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name, irq, irq_base, twl4030_irq_next - 1); - return status; + return status < 0 ? status : irq_base; } /* FIXME need a call to reverse twl4030_sih_setup() ... */ @@ -733,8 +736,9 @@ int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end) } /* install an irq handler to demultiplex the TWL4030 interrupt */ - status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih, 0, - "TWL4030-PIH", NULL); + status = request_threaded_irq(irq_num, NULL, handle_twl4030_pih, + IRQF_ONESHOT, + "TWL4030-PIH", NULL); if (status < 0) { pr_err("twl4030: could not claim irq%d: %d\n", irq_num, status); goto fail_rqirq; diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index 5d6ba13..61894fc 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -239,6 +239,7 @@ static int wm8994_suspend(struct device *dev) switch (wm8994->type) { case WM8958: + case WM1811: ret = wm8994_reg_read(wm8994, WM8958_MIC_DETECT_1); if (ret < 0) { dev_err(dev, "Failed to read power status: %d\n", ret); diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index e8a5eb3..d31c78b 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c @@ -302,17 +302,6 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) host->max_blk_size = 512; host->max_blk_count = PAGE_CACHE_SIZE / 512; - /* - * Enable runtime power management by default. This flag was added due - * to runtime power management causing disruption for some users, but - * the power on/off code has been improved since then. - * - * We'll enable this flag by default as an experiment, and if no - * problems are reported, we will follow up later and remove the flag - * altogether. - */ - host->caps = MMC_CAP_POWER_OFF_CARD; - return host; free: diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c index a8b4d2a..f437c3e 100644 --- a/drivers/mmc/host/at91_mci.c +++ b/drivers/mmc/host/at91_mci.c @@ -741,7 +741,7 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); /* maybe switch power to the card */ - if (host->board->vcc_pin) { + if (gpio_is_valid(host->board->vcc_pin)) { switch (ios->power_mode) { case MMC_POWER_OFF: gpio_set_value(host->board->vcc_pin, 0); @@ -897,7 +897,7 @@ static int at91_mci_get_ro(struct mmc_host *mmc) { struct at91mci_host *host = mmc_priv(mmc); - if (host->board->wp_pin) + if (gpio_is_valid(host->board->wp_pin)) return !!gpio_get_value(host->board->wp_pin); /* * Board doesn't support read only detection; let the mmc core @@ -991,21 +991,21 @@ static int __init at91_mci_probe(struct platform_device *pdev) * Reserve GPIOs ... board init code makes sure these pins are set * up as GPIOs with the right direction (input, except for vcc) */ - if (host->board->det_pin) { + if (gpio_is_valid(host->board->det_pin)) { ret = gpio_request(host->board->det_pin, "mmc_detect"); if (ret < 0) { dev_dbg(&pdev->dev, "couldn't claim card detect pin\n"); goto fail4b; } } - if (host->board->wp_pin) { + if (gpio_is_valid(host->board->wp_pin)) { ret = gpio_request(host->board->wp_pin, "mmc_wp"); if (ret < 0) { dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n"); goto fail4; } } - if (host->board->vcc_pin) { + if (gpio_is_valid(host->board->vcc_pin)) { ret = gpio_request(host->board->vcc_pin, "mmc_vcc"); if (ret < 0) { dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n"); @@ -1057,7 +1057,7 @@ static int __init at91_mci_probe(struct platform_device *pdev) /* * Add host to MMC layer */ - if (host->board->det_pin) { + if (gpio_is_valid(host->board->det_pin)) { host->present = !gpio_get_value(host->board->det_pin); } else @@ -1068,7 +1068,7 @@ static int __init at91_mci_probe(struct platform_device *pdev) /* * monitor card insertion/removal if we can */ - if (host->board->det_pin) { + if (gpio_is_valid(host->board->det_pin)) { ret = request_irq(gpio_to_irq(host->board->det_pin), at91_mmc_det_irq, 0, mmc_hostname(mmc), host); if (ret) @@ -1087,13 +1087,13 @@ fail0: fail1: clk_put(host->mci_clk); fail2: - if (host->board->vcc_pin) + if (gpio_is_valid(host->board->vcc_pin)) gpio_free(host->board->vcc_pin); fail3: - if (host->board->wp_pin) + if (gpio_is_valid(host->board->wp_pin)) gpio_free(host->board->wp_pin); fail4: - if (host->board->det_pin) + if (gpio_is_valid(host->board->det_pin)) gpio_free(host->board->det_pin); fail4b: if (host->buffer) @@ -1125,7 +1125,7 @@ static int __exit at91_mci_remove(struct platform_device *pdev) dma_free_coherent(&pdev->dev, MCI_BUFSIZE, host->buffer, host->physical_address); - if (host->board->det_pin) { + if (gpio_is_valid(host->board->det_pin)) { if (device_can_wakeup(&pdev->dev)) free_irq(gpio_to_irq(host->board->det_pin), host); device_init_wakeup(&pdev->dev, 0); @@ -1140,9 +1140,9 @@ static int __exit at91_mci_remove(struct platform_device *pdev) clk_disable(host->mci_clk); /* Disable the peripheral clock */ clk_put(host->mci_clk); - if (host->board->vcc_pin) + if (gpio_is_valid(host->board->vcc_pin)) gpio_free(host->board->vcc_pin); - if (host->board->wp_pin) + if (gpio_is_valid(host->board->wp_pin)) gpio_free(host->board->wp_pin); iounmap(host->baseaddr); @@ -1163,7 +1163,7 @@ static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state) struct at91mci_host *host = mmc_priv(mmc); int ret = 0; - if (host->board->det_pin && device_may_wakeup(&pdev->dev)) + if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev)) enable_irq_wake(host->board->det_pin); if (mmc) @@ -1178,7 +1178,7 @@ static int at91_mci_resume(struct platform_device *pdev) struct at91mci_host *host = mmc_priv(mmc); int ret = 0; - if (host->board->det_pin && device_may_wakeup(&pdev->dev)) + if (gpio_is_valid(host->board->det_pin) && device_may_wakeup(&pdev->dev)) disable_irq_wake(host->board->det_pin); if (mmc) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 50b5f99..0726e59 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -675,7 +675,8 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, unsigned int status) { /* First check for errors */ - if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { + if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR| + MCI_TXUNDERRUN|MCI_RXOVERRUN)) { u32 remain, success; /* Terminate the DMA transfer */ @@ -754,8 +755,12 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, } if (!cmd->data || cmd->error) { - if (host->data) + if (host->data) { + /* Terminate the DMA transfer */ + if (dma_inprogress(host)) + mmci_dma_data_error(host); mmci_stop_data(host); + } mmci_request_end(host, cmd->mrq); } else if (!(cmd->data->flags & MMC_DATA_READ)) { mmci_start_data(host, cmd->data); @@ -955,8 +960,9 @@ static irqreturn_t mmci_irq(int irq, void *dev_id) dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); data = host->data; - if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN| - MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data) + if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR| + MCI_TXUNDERRUN|MCI_RXOVERRUN|MCI_DATAEND| + MCI_DATABLOCKEND) && data) mmci_data_irq(host, data, status); cmd = host->cmd; diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c index 87b6f07..b4257e7 100644 --- a/drivers/mmc/host/sdhci-cns3xxx.c +++ b/drivers/mmc/host/sdhci-cns3xxx.c @@ -109,13 +109,10 @@ static struct platform_driver sdhci_cns3xxx_driver = { .driver = { .name = "sdhci-cns3xxx", .owner = THIS_MODULE, + .pm = SDHCI_PLTFM_PMOPS, }, .probe = sdhci_cns3xxx_probe, .remove = __devexit_p(sdhci_cns3xxx_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_cns3xxx_init(void) diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index f2d29dc..a81312c 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c @@ -82,13 +82,10 @@ static struct platform_driver sdhci_dove_driver = { .driver = { .name = "sdhci-dove", .owner = THIS_MODULE, + .pm = SDHCI_PLTFM_PMOPS, }, .probe = sdhci_dove_probe, .remove = __devexit_p(sdhci_dove_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_dove_init(void) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 4b976f0..38ebc4e 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -599,14 +599,11 @@ static struct platform_driver sdhci_esdhc_imx_driver = { .name = "sdhci-esdhc-imx", .owner = THIS_MODULE, .of_match_table = imx_esdhc_dt_ids, + .pm = SDHCI_PLTFM_PMOPS, }, .id_table = imx_esdhc_devtype, .probe = sdhci_esdhc_imx_probe, .remove = __devexit_p(sdhci_esdhc_imx_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_esdhc_imx_init(void) diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index 59e9d00..01e5f62 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -125,13 +125,10 @@ static struct platform_driver sdhci_esdhc_driver = { .name = "sdhci-esdhc", .owner = THIS_MODULE, .of_match_table = sdhci_esdhc_of_match, + .pm = SDHCI_PLTFM_PMOPS, }, .probe = sdhci_esdhc_probe, .remove = __devexit_p(sdhci_esdhc_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_esdhc_init(void) diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c index 9b0d794..3619adc 100644 --- a/drivers/mmc/host/sdhci-of-hlwd.c +++ b/drivers/mmc/host/sdhci-of-hlwd.c @@ -87,13 +87,10 @@ static struct platform_driver sdhci_hlwd_driver = { .name = "sdhci-hlwd", .owner = THIS_MODULE, .of_match_table = sdhci_hlwd_of_match, + .pm = SDHCI_PLTFM_PMOPS, }, .probe = sdhci_hlwd_probe, .remove = __devexit_p(sdhci_hlwd_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_hlwd_init(void) diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index d833d9c..6878a946 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -54,8 +54,7 @@ struct sdhci_pci_fixes { int (*probe_slot) (struct sdhci_pci_slot *); void (*remove_slot) (struct sdhci_pci_slot *, int); - int (*suspend) (struct sdhci_pci_chip *, - pm_message_t); + int (*suspend) (struct sdhci_pci_chip *); int (*resume) (struct sdhci_pci_chip *); }; @@ -549,7 +548,7 @@ static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead) jmicron_enable_mmc(slot->host, 0); } -static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state) +static int jmicron_suspend(struct sdhci_pci_chip *chip) { int i; @@ -993,8 +992,9 @@ static struct sdhci_ops sdhci_pci_ops = { #ifdef CONFIG_PM -static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) +static int sdhci_pci_suspend(struct device *dev) { + struct pci_dev *pdev = to_pci_dev(dev); struct sdhci_pci_chip *chip; struct sdhci_pci_slot *slot; mmc_pm_flag_t slot_pm_flags; @@ -1010,7 +1010,7 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) if (!slot) continue; - ret = sdhci_suspend_host(slot->host, state); + ret = sdhci_suspend_host(slot->host); if (ret) { for (i--; i >= 0; i--) @@ -1026,7 +1026,7 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) } if (chip->fixes && chip->fixes->suspend) { - ret = chip->fixes->suspend(chip, state); + ret = chip->fixes->suspend(chip); if (ret) { for (i = chip->num_slots - 1; i >= 0; i--) sdhci_resume_host(chip->slots[i]->host); @@ -1042,16 +1042,17 @@ static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state) } pci_set_power_state(pdev, PCI_D3hot); } else { - pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); + pci_enable_wake(pdev, PCI_D3hot, 0); pci_disable_device(pdev); - pci_set_power_state(pdev, pci_choose_state(pdev, state)); + pci_set_power_state(pdev, PCI_D3hot); } return 0; } -static int sdhci_pci_resume(struct pci_dev *pdev) +static int sdhci_pci_resume(struct device *dev) { + struct pci_dev *pdev = to_pci_dev(dev); struct sdhci_pci_chip *chip; struct sdhci_pci_slot *slot; int i, ret; @@ -1099,7 +1100,6 @@ static int sdhci_pci_runtime_suspend(struct device *dev) struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); struct sdhci_pci_chip *chip; struct sdhci_pci_slot *slot; - pm_message_t state = { .event = PM_EVENT_SUSPEND }; int i, ret; chip = pci_get_drvdata(pdev); @@ -1121,7 +1121,7 @@ static int sdhci_pci_runtime_suspend(struct device *dev) } if (chip->fixes && chip->fixes->suspend) { - ret = chip->fixes->suspend(chip, state); + ret = chip->fixes->suspend(chip); if (ret) { for (i = chip->num_slots - 1; i >= 0; i--) sdhci_runtime_resume_host(chip->slots[i]->host); @@ -1176,6 +1176,8 @@ static int sdhci_pci_runtime_idle(struct device *dev) #endif static const struct dev_pm_ops sdhci_pci_pm_ops = { + .suspend = sdhci_pci_suspend, + .resume = sdhci_pci_resume, .runtime_suspend = sdhci_pci_runtime_suspend, .runtime_resume = sdhci_pci_runtime_resume, .runtime_idle = sdhci_pci_runtime_idle, @@ -1428,8 +1430,6 @@ static struct pci_driver sdhci_driver = { .id_table = pci_ids, .probe = sdhci_pci_probe, .remove = __devexit_p(sdhci_pci_remove), - .suspend = sdhci_pci_suspend, - .resume = sdhci_pci_resume, .driver = { .pm = &sdhci_pci_pm_ops }, diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index a9e12ea..03970bc 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -194,21 +194,25 @@ int sdhci_pltfm_unregister(struct platform_device *pdev) EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister); #ifdef CONFIG_PM -int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state) +static int sdhci_pltfm_suspend(struct device *dev) { - struct sdhci_host *host = platform_get_drvdata(dev); + struct sdhci_host *host = dev_get_drvdata(dev); - return sdhci_suspend_host(host, state); + return sdhci_suspend_host(host); } -EXPORT_SYMBOL_GPL(sdhci_pltfm_suspend); -int sdhci_pltfm_resume(struct platform_device *dev) +static int sdhci_pltfm_resume(struct device *dev) { - struct sdhci_host *host = platform_get_drvdata(dev); + struct sdhci_host *host = dev_get_drvdata(dev); return sdhci_resume_host(host); } -EXPORT_SYMBOL_GPL(sdhci_pltfm_resume); + +const struct dev_pm_ops sdhci_pltfm_pmops = { + .suspend = sdhci_pltfm_suspend, + .resume = sdhci_pltfm_resume, +}; +EXPORT_SYMBOL_GPL(sdhci_pltfm_pmops); #endif /* CONFIG_PM */ static int __init sdhci_pltfm_drv_init(void) diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h index 3a9fc3f..37e0e18 100644 --- a/drivers/mmc/host/sdhci-pltfm.h +++ b/drivers/mmc/host/sdhci-pltfm.h @@ -99,8 +99,10 @@ extern int sdhci_pltfm_register(struct platform_device *pdev, extern int sdhci_pltfm_unregister(struct platform_device *pdev); #ifdef CONFIG_PM -extern int sdhci_pltfm_suspend(struct platform_device *dev, pm_message_t state); -extern int sdhci_pltfm_resume(struct platform_device *dev); +extern const struct dev_pm_ops sdhci_pltfm_pmops; +#define SDHCI_PLTFM_PMOPS (&sdhci_pltfm_pmops) +#else +#define SDHCI_PLTFM_PMOPS NULL #endif #endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */ diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index d4bf6d3..7a039c3 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -218,13 +218,10 @@ static struct platform_driver sdhci_pxav2_driver = { .driver = { .name = "sdhci-pxav2", .owner = THIS_MODULE, + .pm = SDHCI_PLTFM_PMOPS, }, .probe = sdhci_pxav2_probe, .remove = __devexit_p(sdhci_pxav2_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_pxav2_init(void) { diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index cff4ad3..15673a7 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c @@ -264,13 +264,10 @@ static struct platform_driver sdhci_pxav3_driver = { .driver = { .name = "sdhci-pxav3", .owner = THIS_MODULE, + .pm = SDHCI_PLTFM_PMOPS, }, .probe = sdhci_pxav3_probe, .remove = __devexit_p(sdhci_pxav3_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_pxav3_init(void) { diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 6b3f366..9a20d1f 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -619,23 +619,29 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) #ifdef CONFIG_PM -static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm) +static int sdhci_s3c_suspend(struct device *dev) { - struct sdhci_host *host = platform_get_drvdata(dev); + struct sdhci_host *host = dev_get_drvdata(dev); - return sdhci_suspend_host(host, pm); + return sdhci_suspend_host(host); } -static int sdhci_s3c_resume(struct platform_device *dev) +static int sdhci_s3c_resume(struct device *dev) { - struct sdhci_host *host = platform_get_drvdata(dev); + struct sdhci_host *host = dev_get_drvdata(dev); return sdhci_resume_host(host); } +static const struct dev_pm_ops sdhci_s3c_pmops = { + .suspend = sdhci_s3c_suspend, + .resume = sdhci_s3c_resume, +}; + +#define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops) + #else -#define sdhci_s3c_suspend NULL -#define sdhci_s3c_resume NULL +#define SDHCI_S3C_PMOPS NULL #endif static struct platform_driver sdhci_s3c_driver = { @@ -644,6 +650,7 @@ static struct platform_driver sdhci_s3c_driver = { .driver = { .owner = THIS_MODULE, .name = "s3c-sdhci", + .pm = SDHCI_S3C_PMOPS, }, }; diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 89699e8..e2e18d3 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -318,13 +318,10 @@ static struct platform_driver sdhci_tegra_driver = { .name = "sdhci-tegra", .owner = THIS_MODULE, .of_match_table = sdhci_tegra_dt_match, + .pm = SDHCI_PLTFM_PMOPS, }, .probe = sdhci_tegra_probe, .remove = __devexit_p(sdhci_tegra_remove), -#ifdef CONFIG_PM - .suspend = sdhci_pltfm_suspend, - .resume = sdhci_pltfm_resume, -#endif }; static int __init sdhci_tegra_init(void) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 6d8eea3..19ed580 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -2327,7 +2327,7 @@ out: #ifdef CONFIG_PM -int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) +int sdhci_suspend_host(struct sdhci_host *host) { int ret; diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 0a5b654..a04d4d0 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -374,7 +374,7 @@ extern int sdhci_add_host(struct sdhci_host *host); extern void sdhci_remove_host(struct sdhci_host *host, int dead); #ifdef CONFIG_PM -extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state); +extern int sdhci_suspend_host(struct sdhci_host *host); extern int sdhci_resume_host(struct sdhci_host *host); extern void sdhci_enable_irq_wakeups(struct sdhci_host *host); #endif diff --git a/drivers/mmc/host/vub300.c b/drivers/mmc/host/vub300.c index e8f6e65..2ec978b 100644 --- a/drivers/mmc/host/vub300.c +++ b/drivers/mmc/host/vub300.c @@ -259,7 +259,7 @@ static int firmware_rom_wait_states = 0x04; static int firmware_rom_wait_states = 0x1C; #endif -module_param(firmware_rom_wait_states, bool, 0644); +module_param(firmware_rom_wait_states, int, 0644); MODULE_PARM_DESC(firmware_rom_wait_states, "ROM wait states byte=RRRIIEEE (Reserved Internal External)"); diff --git a/drivers/mtd/maps/plat-ram.c b/drivers/mtd/maps/plat-ram.c index 94f5534..45876d0 100644 --- a/drivers/mtd/maps/plat-ram.c +++ b/drivers/mtd/maps/plat-ram.c @@ -227,10 +227,14 @@ static int platram_probe(struct platform_device *pdev) if (!err) dev_info(&pdev->dev, "registered mtd device\n"); - /* add the whole device. */ - err = mtd_device_register(info->mtd, NULL, 0); - if (err) - dev_err(&pdev->dev, "failed to register the entire device\n"); + if (pdata->nr_partitions) { + /* add the whole device. */ + err = mtd_device_register(info->mtd, NULL, 0); + if (err) { + dev_err(&pdev->dev, + "failed to register the entire device\n"); + } + } return err; diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c index 411a17d..2a25b67 100644 --- a/drivers/mtd/maps/pxa2xx-flash.c +++ b/drivers/mtd/maps/pxa2xx-flash.c @@ -98,7 +98,7 @@ static int __devinit pxa2xx_flash_probe(struct platform_device *pdev) } info->mtd->owner = THIS_MODULE; - mtd_device_parse_register(info->mtd, probes, 0, NULL, 0); + mtd_device_parse_register(info->mtd, probes, 0, flash->parts, flash->nr_parts); platform_set_drvdata(pdev, info); return 0; diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 23e5d77..4dd056e 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -113,7 +113,7 @@ static int cpu_has_dma(void) */ static void atmel_nand_enable(struct atmel_nand_host *host) { - if (host->board->enable_pin) + if (gpio_is_valid(host->board->enable_pin)) gpio_set_value(host->board->enable_pin, 0); } @@ -122,7 +122,7 @@ static void atmel_nand_enable(struct atmel_nand_host *host) */ static void atmel_nand_disable(struct atmel_nand_host *host) { - if (host->board->enable_pin) + if (gpio_is_valid(host->board->enable_pin)) gpio_set_value(host->board->enable_pin, 1); } @@ -492,7 +492,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) nand_chip->IO_ADDR_W = host->io_base; nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl; - if (host->board->rdy_pin) + if (gpio_is_valid(host->board->rdy_pin)) nand_chip->dev_ready = atmel_nand_device_ready; regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); @@ -530,7 +530,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) platform_set_drvdata(pdev, host); atmel_nand_enable(host); - if (host->board->det_pin) { + if (gpio_is_valid(host->board->det_pin)) { if (gpio_get_value(host->board->det_pin)) { printk(KERN_INFO "No SmartMedia card inserted.\n"); res = -ENXIO; diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c index 071b634..493ec2f 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c @@ -21,9 +21,9 @@ #include <linux/clk.h> #include <linux/slab.h> #include <linux/interrupt.h> +#include <linux/module.h> #include <linux/mtd/gpmi-nand.h> #include <linux/mtd/partitions.h> - #include "gpmi-nand.h" /* add our owner bbt descriptor */ diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index ee17139..f8aacf4 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -188,7 +188,7 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc, if (!flash_np) return -ENODEV; - ppdata->of_node = flash_np; + ppdata.of_node = flash_np; ndfc->mtd.name = kasprintf(GFP_KERNEL, "%s.%s", dev_name(&ndfc->ofdev->dev), flash_np->name); if (!ndfc->mtd.name) { diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c index c7b6083..dea0cb4 100644 --- a/drivers/net/ethernet/marvell/skge.c +++ b/drivers/net/ethernet/marvell/skge.c @@ -2606,6 +2606,9 @@ static int skge_up(struct net_device *dev) spin_unlock_irq(&hw->hw_lock); napi_enable(&skge->napi); + + skge_set_multicast(dev); + return 0; free_tx_ring: diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c index 227997d..5829e0b 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c @@ -147,6 +147,7 @@ void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq) mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); if (priv->mdev->dev->caps.comp_pool && cq->vector) mlx4_release_eq(priv->mdev->dev, cq->vector); + cq->vector = 0; cq->buf_size = 0; cq->buf = NULL; } diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 67bf078..c8f47f1 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -477,7 +477,6 @@ enum rtl_register_content { /* Config1 register p.24 */ LEDS1 = (1 << 7), LEDS0 = (1 << 6), - MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */ Speed_down = (1 << 4), MEMMAP = (1 << 3), IOMAP = (1 << 2), @@ -485,6 +484,7 @@ enum rtl_register_content { PMEnable = (1 << 0), /* Power Management Enable */ /* Config2 register p. 25 */ + MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */ PCI_Clock_66MHz = 0x01, PCI_Clock_33MHz = 0x00, @@ -3426,22 +3426,24 @@ static const struct rtl_cfg_info { }; /* Cfg9346_Unlock assumed. */ -static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, +static unsigned rtl_try_msi(struct rtl8169_private *tp, const struct rtl_cfg_info *cfg) { + void __iomem *ioaddr = tp->mmio_addr; unsigned msi = 0; u8 cfg2; cfg2 = RTL_R8(Config2) & ~MSIEnable; if (cfg->features & RTL_FEATURE_MSI) { - if (pci_enable_msi(pdev)) { - dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); + if (pci_enable_msi(tp->pci_dev)) { + netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n"); } else { cfg2 |= MSIEnable; msi = RTL_FEATURE_MSI; } } - RTL_W8(Config2, cfg2); + if (tp->mac_version <= RTL_GIGA_MAC_VER_06) + RTL_W8(Config2, cfg2); return msi; } @@ -4077,7 +4079,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) tp->features |= RTL_FEATURE_WOL; if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0) tp->features |= RTL_FEATURE_WOL; - tp->features |= rtl_try_msi(pdev, ioaddr, cfg); + tp->features |= rtl_try_msi(tp, cfg); RTL_W8(Cfg9346, Cfg9346_Lock); if (rtl_tbi_enabled(tp)) { diff --git a/drivers/net/ethernet/ti/davinci_cpdma.c b/drivers/net/ethernet/ti/davinci_cpdma.c index dca9d33..c97d2f5 100644 --- a/drivers/net/ethernet/ti/davinci_cpdma.c +++ b/drivers/net/ethernet/ti/davinci_cpdma.c @@ -836,11 +836,13 @@ int cpdma_chan_stop(struct cpdma_chan *chan) chan_write(chan, cp, CPDMA_TEARDOWN_VALUE); /* handle completed packets */ + spin_unlock_irqrestore(&chan->lock, flags); do { ret = __cpdma_chan_process(chan); if (ret < 0) break; } while ((ret & CPDMA_DESC_TD_COMPLETE) == 0); + spin_lock_irqsave(&chan->lock, flags); /* remaining packets haven't been tx/rx'ed, clean them up */ while (chan->head) { diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c index e6fed4d..e95f0e6 100644 --- a/drivers/net/usb/asix.c +++ b/drivers/net/usb/asix.c @@ -1655,6 +1655,10 @@ static const struct usb_device_id products [] = { // ASIX 88772a USB_DEVICE(0x0db0, 0xa877), .driver_info = (unsigned long) &ax88772_info, +}, { + // Asus USB Ethernet Adapter + USB_DEVICE (0x0b95, 0x7e2b), + .driver_info = (unsigned long) &ax88772_info, }, { }, // END }; diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 888abc2..528d5f3 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c @@ -1271,7 +1271,9 @@ static void ath_rc_init(struct ath_softc *sc, ath_rc_priv->max_valid_rate = k; ath_rc_sort_validrates(rate_table, ath_rc_priv); - ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4]; + ath_rc_priv->rate_max_phy = (k > 4) ? + ath_rc_priv->valid_rate_index[k-4] : + ath_rc_priv->valid_rate_index[k-1]; ath_rc_priv->rate_table = rate_table; ath_dbg(common, ATH_DBG_CONFIG, diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c index a7a6def..5c7c17c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c @@ -606,8 +606,8 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed) if (ctx->ht.enabled) { /* if HT40 is used, it should not change * after associated except channel switch */ - if (iwl_is_associated_ctx(ctx) && - !ctx->ht.is_40mhz) + if (!ctx->ht.is_40mhz || + !iwl_is_associated_ctx(ctx)) iwlagn_config_ht40(conf, ctx); } else ctx->ht.is_40mhz = false; diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c index 35a6b71..df1540c 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c @@ -91,7 +91,10 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv, tx_cmd->tid_tspec = qc[0] & 0xf; tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; } else { - tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; + if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) + tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; + else + tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; } iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags); diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index bacc06c..e0e9a3d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c @@ -2850,6 +2850,9 @@ static int iwlagn_mac_tx_sync(struct ieee80211_hw *hw, int ret; u8 sta_id; + if (ctx->ctxid != IWL_RXON_CTX_PAN) + return 0; + IWL_DEBUG_MAC80211(priv, "enter\n"); mutex_lock(&priv->shrd->mutex); @@ -2898,6 +2901,9 @@ static void iwlagn_mac_finish_tx_sync(struct ieee80211_hw *hw, struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; struct iwl_rxon_context *ctx = vif_priv->ctx; + if (ctx->ctxid != IWL_RXON_CTX_PAN) + return; + IWL_DEBUG_MAC80211(priv, "enter\n"); mutex_lock(&priv->shrd->mutex); diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c index ce91898..5f17ab8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c +++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c @@ -1197,9 +1197,7 @@ static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb, iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len); /* Set up entry for this TFD in Tx byte-count array */ - if (is_agg) - iwl_trans_txq_update_byte_cnt_tbl(trans, txq, - le16_to_cpu(tx_cmd->len)); + iwl_trans_txq_update_byte_cnt_tbl(trans, txq, le16_to_cpu(tx_cmd->len)); dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen, DMA_BIDIRECTIONAL); diff --git a/drivers/net/wireless/mwifiex/cmdevt.c b/drivers/net/wireless/mwifiex/cmdevt.c index ac27815..6e0a3ea 100644 --- a/drivers/net/wireless/mwifiex/cmdevt.c +++ b/drivers/net/wireless/mwifiex/cmdevt.c @@ -939,7 +939,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter) { struct cmd_ctrl_node *cmd_node = NULL, *tmp_node = NULL; unsigned long cmd_flags; - unsigned long cmd_pending_q_flags; unsigned long scan_pending_q_flags; uint16_t cancel_scan_cmd = false; @@ -949,12 +948,9 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter) cmd_node = adapter->curr_cmd; cmd_node->wait_q_enabled = false; cmd_node->cmd_flag |= CMD_F_CANCELED; - spin_lock_irqsave(&adapter->cmd_pending_q_lock, - cmd_pending_q_flags); - list_del(&cmd_node->list); - spin_unlock_irqrestore(&adapter->cmd_pending_q_lock, - cmd_pending_q_flags); mwifiex_insert_cmd_to_free_q(adapter, cmd_node); + mwifiex_complete_cmd(adapter, adapter->curr_cmd); + adapter->curr_cmd = NULL; spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); } @@ -981,7 +977,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter) spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags); } adapter->cmd_wait_q.status = -1; - mwifiex_complete_cmd(adapter, adapter->curr_cmd); } /* diff --git a/drivers/of/platform.c b/drivers/of/platform.c index cbd5d70..63b3ec4 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -314,7 +314,7 @@ static const struct of_dev_auxdata *of_dev_lookup(const struct of_dev_auxdata *l if (!lookup) return NULL; - for(; lookup->name != NULL; lookup++) { + for(; lookup->compatible != NULL; lookup++) { if (!of_device_is_compatible(np, lookup->compatible)) continue; if (of_address_to_resource(np, 0, &res)) diff --git a/drivers/oprofile/oprofile_files.c b/drivers/oprofile/oprofile_files.c index 89f6345..84a208d 100644 --- a/drivers/oprofile/oprofile_files.c +++ b/drivers/oprofile/oprofile_files.c @@ -45,7 +45,7 @@ static ssize_t timeout_write(struct file *file, char const __user *buf, return -EINVAL; retval = oprofilefs_ulong_from_user(&val, buf, count); - if (retval) + if (retval <= 0) return retval; retval = oprofile_set_timeout(val); @@ -84,7 +84,7 @@ static ssize_t depth_write(struct file *file, char const __user *buf, size_t cou return -EINVAL; retval = oprofilefs_ulong_from_user(&val, buf, count); - if (retval) + if (retval <= 0) return retval; retval = oprofile_set_ulong(&oprofile_backtrace_depth, val); @@ -141,9 +141,10 @@ static ssize_t enable_write(struct file *file, char const __user *buf, size_t co return -EINVAL; retval = oprofilefs_ulong_from_user(&val, buf, count); - if (retval) + if (retval <= 0) return retval; + retval = 0; if (val) retval = oprofile_start(); else diff --git a/drivers/oprofile/oprofilefs.c b/drivers/oprofile/oprofilefs.c index d0de6cc..2f0aa0f 100644 --- a/drivers/oprofile/oprofilefs.c +++ b/drivers/oprofile/oprofilefs.c @@ -60,6 +60,13 @@ ssize_t oprofilefs_ulong_to_user(unsigned long val, char __user *buf, size_t cou } +/* + * Note: If oprofilefs_ulong_from_user() returns 0, then *val remains + * unchanged and might be uninitialized. This follows write syscall + * implementation when count is zero: "If count is zero ... [and if] + * no errors are detected, 0 will be returned without causing any + * other effect." (man 2 write) + */ int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_t count) { char tmpbuf[TMPBUFSIZE]; @@ -79,7 +86,7 @@ int oprofilefs_ulong_from_user(unsigned long *val, char const __user *buf, size_ raw_spin_lock_irqsave(&oprofilefs_lock, flags); *val = simple_strtoul(tmpbuf, NULL, 0); raw_spin_unlock_irqrestore(&oprofilefs_lock, flags); - return 0; + return count; } @@ -99,7 +106,7 @@ static ssize_t ulong_write_file(struct file *file, char const __user *buf, size_ return -EINVAL; retval = oprofilefs_ulong_from_user(&value, buf, count); - if (retval) + if (retval <= 0) return retval; retval = oprofile_set_ulong(file->private_data, value); diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index 7ec56fb..b0dd08e 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c @@ -13,6 +13,7 @@ #include <linux/export.h> #include <linux/pci-ats.h> #include <linux/pci.h> +#include <linux/slab.h> #include "pci.h" diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index fce1c54..9ddf69e 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c @@ -132,6 +132,18 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv) if (!acpi_pci_check_ejectable(pbus, handle) && !is_dock_device(handle)) return AE_OK; + pdev = pbus->self; + if (pdev && pci_is_pcie(pdev)) { + tmp = acpi_find_root_bridge_handle(pdev); + if (tmp) { + struct acpi_pci_root *root = acpi_pci_find_root(tmp); + + if (root && (root->osc_control_set & + OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) + return AE_OK; + } + } + acpi_evaluate_integer(handle, "_ADR", NULL, &adr); device = (adr >> 16) & 0xffff; function = adr & 0xffff; @@ -213,7 +225,6 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv) pdev = pci_get_slot(pbus, PCI_DEVFN(device, function)); if (pdev) { - pdev->current_state = PCI_D0; slot->flags |= (SLOT_ENABLED | SLOT_POWEREDON); pci_dev_put(pdev); } @@ -459,17 +470,8 @@ static int add_bridge(acpi_handle handle) { acpi_status status; unsigned long long tmp; - struct acpi_pci_root *root; acpi_handle dummy_handle; - /* - * We shouldn't use this bridge if PCIe native hotplug control has been - * granted by the BIOS for it. - */ - root = acpi_pci_find_root(handle); - if (root && (root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) - return -ENODEV; - /* if the bridge doesn't have _STA, we assume it is always there */ status = acpi_get_handle(handle, "_STA", &dummy_handle); if (ACPI_SUCCESS(status)) { @@ -1385,19 +1387,11 @@ static void handle_hotplug_event_func(acpi_handle handle, u32 type, static acpi_status find_root_bridges(acpi_handle handle, u32 lvl, void *context, void **rv) { - struct acpi_pci_root *root; int *count = (int *)context; if (!acpi_is_root_bridge(handle)) return AE_OK; - root = acpi_pci_find_root(handle); - if (!root) - return AE_OK; - - if (root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL) - return AE_OK; - (*count)++; acpi_install_notify_handler(handle, ACPI_SYSTEM_NOTIFY, handle_hotplug_event_bridge, NULL); diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index b82c155..1969a3e 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -283,6 +283,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) struct resource *res; struct pci_dev *pdev; struct pci_sriov *iov = dev->sriov; + int bars = 0; if (!nr_virtfn) return 0; @@ -307,6 +308,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) nres = 0; for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { + bars |= (1 << (i + PCI_IOV_RESOURCES)); res = dev->resource + PCI_IOV_RESOURCES + i; if (res->parent) nres++; @@ -324,6 +326,11 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn) return -ENOMEM; } + if (pci_enable_resources(dev, bars)) { + dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); + return -ENOMEM; + } + if (iov->link != dev->devfn) { pdev = pci_get_slot(dev->bus, iov->link); if (!pdev) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 6f45a73..6d4a531 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -664,6 +664,9 @@ static int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state) error = platform_pci_set_power_state(dev, state); if (!error) pci_update_current_state(dev, state); + /* Fall back to PCI_D0 if native PM is not supported */ + if (!dev->pm_cap) + dev->current_state = PCI_D0; } else { error = -ENODEV; /* Fall back to PCI_D0 if native PM is not supported */ @@ -1126,7 +1129,11 @@ static int __pci_enable_device_flags(struct pci_dev *dev, if (atomic_add_return(1, &dev->enable_cnt) > 1) return 0; /* already enabled */ - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) + /* only skip sriov related */ + for (i = 0; i <= PCI_ROM_RESOURCE; i++) + if (dev->resource[i].flags & flags) + bars |= (1 << i); + for (i = PCI_BRIDGE_RESOURCES; i < DEVICE_COUNT_RESOURCE; i++) if (dev->resource[i].flags & flags) bars |= (1 << i); diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c index fa4d9f3..3bcc7cf 100644 --- a/drivers/rtc/interface.c +++ b/drivers/rtc/interface.c @@ -73,6 +73,8 @@ int rtc_set_time(struct rtc_device *rtc, struct rtc_time *tm) err = -EINVAL; mutex_unlock(&rtc->ops_lock); + /* A timer might have just expired */ + schedule_work(&rtc->irqwork); return err; } EXPORT_SYMBOL_GPL(rtc_set_time); @@ -112,6 +114,8 @@ int rtc_set_mmss(struct rtc_device *rtc, unsigned long secs) err = -EINVAL; mutex_unlock(&rtc->ops_lock); + /* A timer might have just expired */ + schedule_work(&rtc->irqwork); return err; } @@ -403,6 +407,8 @@ int rtc_initialize_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm) timerqueue_add(&rtc->timerqueue, &rtc->aie_timer.node); } mutex_unlock(&rtc->ops_lock); + /* maybe that was in the past.*/ + schedule_work(&rtc->irqwork); return err; } EXPORT_SYMBOL_GPL(rtc_initialize_alarm); diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c index e39b77a..dc474bc 100644 --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c @@ -32,11 +32,17 @@ #include <mach/at91_rtc.h> +#define at91_rtc_read(field) \ + __raw_readl(at91_rtc_regs + field) +#define at91_rtc_write(field, val) \ + __raw_writel((val), at91_rtc_regs + field) #define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ static DECLARE_COMPLETION(at91_rtc_updated); static unsigned int at91_alarm_year = AT91_RTC_EPOCH; +static void __iomem *at91_rtc_regs; +static int irq; /* * Decode time/date into rtc_time structure @@ -48,10 +54,10 @@ static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, /* must read twice in case it changes */ do { - time = at91_sys_read(timereg); - date = at91_sys_read(calreg); - } while ((time != at91_sys_read(timereg)) || - (date != at91_sys_read(calreg))); + time = at91_rtc_read(timereg); + date = at91_rtc_read(calreg); + } while ((time != at91_rtc_read(timereg)) || + (date != at91_rtc_read(calreg))); tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); @@ -98,19 +104,19 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) tm->tm_hour, tm->tm_min, tm->tm_sec); /* Stop Time/Calendar from counting */ - cr = at91_sys_read(AT91_RTC_CR); - at91_sys_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); + cr = at91_rtc_read(AT91_RTC_CR); + at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); - at91_sys_write(AT91_RTC_IER, AT91_RTC_ACKUPD); + at91_rtc_write(AT91_RTC_IER, AT91_RTC_ACKUPD); wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ - at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); + at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); - at91_sys_write(AT91_RTC_TIMR, + at91_rtc_write(AT91_RTC_TIMR, bin2bcd(tm->tm_sec) << 0 | bin2bcd(tm->tm_min) << 8 | bin2bcd(tm->tm_hour) << 16); - at91_sys_write(AT91_RTC_CALR, + at91_rtc_write(AT91_RTC_CALR, bin2bcd((tm->tm_year + 1900) / 100) /* century */ | bin2bcd(tm->tm_year % 100) << 8 /* year */ | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ @@ -118,8 +124,8 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) | bin2bcd(tm->tm_mday) << 24); /* Restart Time/Calendar */ - cr = at91_sys_read(AT91_RTC_CR); - at91_sys_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); + cr = at91_rtc_read(AT91_RTC_CR); + at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); return 0; } @@ -135,7 +141,7 @@ static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); tm->tm_year = at91_alarm_year - 1900; - alrm->enabled = (at91_sys_read(AT91_RTC_IMR) & AT91_RTC_ALARM) + alrm->enabled = (at91_rtc_read(AT91_RTC_IMR) & AT91_RTC_ALARM) ? 1 : 0; pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, @@ -160,20 +166,20 @@ static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) tm.tm_min = alrm->time.tm_min; tm.tm_sec = alrm->time.tm_sec; - at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); - at91_sys_write(AT91_RTC_TIMALR, + at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); + at91_rtc_write(AT91_RTC_TIMALR, bin2bcd(tm.tm_sec) << 0 | bin2bcd(tm.tm_min) << 8 | bin2bcd(tm.tm_hour) << 16 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); - at91_sys_write(AT91_RTC_CALALR, + at91_rtc_write(AT91_RTC_CALALR, bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ | bin2bcd(tm.tm_mday) << 24 | AT91_RTC_DATEEN | AT91_RTC_MTHEN); if (alrm->enabled) { - at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); - at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); + at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); + at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); } pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, @@ -188,10 +194,10 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) pr_debug("%s(): cmd=%08x\n", __func__, enabled); if (enabled) { - at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); - at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); + at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); + at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); } else - at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); + at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); return 0; } @@ -200,7 +206,7 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) */ static int at91_rtc_proc(struct device *dev, struct seq_file *seq) { - unsigned long imr = at91_sys_read(AT91_RTC_IMR); + unsigned long imr = at91_rtc_read(AT91_RTC_IMR); seq_printf(seq, "update_IRQ\t: %s\n", (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); @@ -220,7 +226,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) unsigned int rtsr; unsigned long events = 0; - rtsr = at91_sys_read(AT91_RTC_SR) & at91_sys_read(AT91_RTC_IMR); + rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read(AT91_RTC_IMR); if (rtsr) { /* this interrupt is shared! Is it ours? */ if (rtsr & AT91_RTC_ALARM) events |= (RTC_AF | RTC_IRQF); @@ -229,7 +235,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) if (rtsr & AT91_RTC_ACKUPD) complete(&at91_rtc_updated); - at91_sys_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ + at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ rtc_update_irq(rtc, 1, events); @@ -256,22 +262,41 @@ static const struct rtc_class_ops at91_rtc_ops = { static int __init at91_rtc_probe(struct platform_device *pdev) { struct rtc_device *rtc; - int ret; + struct resource *regs; + int ret = 0; - at91_sys_write(AT91_RTC_CR, 0); - at91_sys_write(AT91_RTC_MR, 0); /* 24 hour mode */ + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!regs) { + dev_err(&pdev->dev, "no mmio resource defined\n"); + return -ENXIO; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "no irq resource defined\n"); + return -ENXIO; + } + + at91_rtc_regs = ioremap(regs->start, resource_size(regs)); + if (!at91_rtc_regs) { + dev_err(&pdev->dev, "failed to map registers, aborting.\n"); + return -ENOMEM; + } + + at91_rtc_write(AT91_RTC_CR, 0); + at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */ /* Disable all interrupts */ - at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | + at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | AT91_RTC_SECEV | AT91_RTC_TIMEV | AT91_RTC_CALEV); - ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt, + ret = request_irq(irq, at91_rtc_interrupt, IRQF_SHARED, "at91_rtc", pdev); if (ret) { printk(KERN_ERR "at91_rtc: IRQ %d already in use.\n", - AT91_ID_SYS); + irq); return ret; } @@ -284,7 +309,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev) rtc = rtc_device_register(pdev->name, &pdev->dev, &at91_rtc_ops, THIS_MODULE); if (IS_ERR(rtc)) { - free_irq(AT91_ID_SYS, pdev); + free_irq(irq, pdev); return PTR_ERR(rtc); } platform_set_drvdata(pdev, rtc); @@ -301,10 +326,10 @@ static int __exit at91_rtc_remove(struct platform_device *pdev) struct rtc_device *rtc = platform_get_drvdata(pdev); /* Disable all interrupts */ - at91_sys_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | + at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | AT91_RTC_SECEV | AT91_RTC_TIMEV | AT91_RTC_CALEV); - free_irq(AT91_ID_SYS, pdev); + free_irq(irq, pdev); rtc_device_unregister(rtc); platform_set_drvdata(pdev, NULL); @@ -323,13 +348,13 @@ static int at91_rtc_suspend(struct device *dev) /* this IRQ is shared with DBGU and other hardware which isn't * necessarily doing PM like we are... */ - at91_rtc_imr = at91_sys_read(AT91_RTC_IMR) + at91_rtc_imr = at91_rtc_read(AT91_RTC_IMR) & (AT91_RTC_ALARM|AT91_RTC_SECEV); if (at91_rtc_imr) { if (device_may_wakeup(dev)) - enable_irq_wake(AT91_ID_SYS); + enable_irq_wake(irq); else - at91_sys_write(AT91_RTC_IDR, at91_rtc_imr); + at91_rtc_write(AT91_RTC_IDR, at91_rtc_imr); } return 0; } @@ -338,9 +363,9 @@ static int at91_rtc_resume(struct device *dev) { if (at91_rtc_imr) { if (device_may_wakeup(dev)) - disable_irq_wake(AT91_ID_SYS); + disable_irq_wake(irq); else - at91_sys_write(AT91_RTC_IER, at91_rtc_imr); + at91_rtc_write(AT91_RTC_IER, at91_rtc_imr); } return 0; } diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c index eda128f..64aedd8 100644 --- a/drivers/rtc/rtc-m41t80.c +++ b/drivers/rtc/rtc-m41t80.c @@ -357,10 +357,19 @@ static int m41t80_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *t) static struct rtc_class_ops m41t80_rtc_ops = { .read_time = m41t80_rtc_read_time, .set_time = m41t80_rtc_set_time, + /* + * XXX - m41t80 alarm functionality is reported broken. + * until it is fixed, don't register alarm functions. + * .read_alarm = m41t80_rtc_read_alarm, .set_alarm = m41t80_rtc_set_alarm, + */ .proc = m41t80_rtc_proc, + /* + * See above comment on broken alarm + * .alarm_irq_enable = m41t80_rtc_alarm_irq_enable, + */ }; #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c index 11f07f8..b79576b 100644 --- a/drivers/s390/scsi/zfcp_scsi.c +++ b/drivers/s390/scsi/zfcp_scsi.c @@ -55,6 +55,10 @@ static void zfcp_scsi_slave_destroy(struct scsi_device *sdev) { struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(sdev); + /* if previous slave_alloc returned early, there is nothing to do */ + if (!zfcp_sdev->port) + return; + zfcp_erp_lun_shutdown_wait(sdev, "scssd_1"); put_device(&zfcp_sdev->port->dev); } diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c index dba72a4..1ad0b82 100644 --- a/drivers/scsi/bnx2i/bnx2i_hwi.c +++ b/drivers/scsi/bnx2i/bnx2i_hwi.c @@ -1906,18 +1906,19 @@ static int bnx2i_queue_scsi_cmd_resp(struct iscsi_session *session, spin_lock(&session->lock); task = iscsi_itt_to_task(bnx2i_conn->cls_conn->dd_data, cqe->itt & ISCSI_CMD_RESPONSE_INDEX); - if (!task) { + if (!task || !task->sc) { spin_unlock(&session->lock); return -EINVAL; } sc = task->sc; - spin_unlock(&session->lock); if (!blk_rq_cpu_valid(sc->request)) cpu = smp_processor_id(); else cpu = sc->request->cpu; + spin_unlock(&session->lock); + p = &per_cpu(bnx2i_percpu, cpu); spin_lock(&p->p_work_lock); if (unlikely(!p->iothread)) { diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c index cefbe44..8d67467 100644 --- a/drivers/scsi/fcoe/fcoe.c +++ b/drivers/scsi/fcoe/fcoe.c @@ -31,6 +31,8 @@ #include <linux/sysfs.h> #include <linux/ctype.h> #include <linux/workqueue.h> +#include <net/dcbnl.h> +#include <net/dcbevent.h> #include <scsi/scsi_tcq.h> #include <scsi/scsicam.h> #include <scsi/scsi_transport.h> @@ -101,6 +103,8 @@ static int fcoe_ddp_done(struct fc_lport *, u16); static int fcoe_ddp_target(struct fc_lport *, u16, struct scatterlist *, unsigned int); static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *); +static int fcoe_dcb_app_notification(struct notifier_block *notifier, + ulong event, void *ptr); static bool fcoe_match(struct net_device *netdev); static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode); @@ -129,6 +133,11 @@ static struct notifier_block fcoe_cpu_notifier = { .notifier_call = fcoe_cpu_callback, }; +/* notification function for DCB events */ +static struct notifier_block dcb_notifier = { + .notifier_call = fcoe_dcb_app_notification, +}; + static struct scsi_transport_template *fcoe_nport_scsi_transport; static struct scsi_transport_template *fcoe_vport_scsi_transport; @@ -1522,6 +1531,8 @@ int fcoe_xmit(struct fc_lport *lport, struct fc_frame *fp) skb_reset_network_header(skb); skb->mac_len = elen; skb->protocol = htons(ETH_P_FCOE); + skb->priority = port->priority; + if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN && fcoe->realdev->features & NETIF_F_HW_VLAN_TX) { skb->vlan_tci = VLAN_TAG_PRESENT | @@ -1624,6 +1635,7 @@ static inline int fcoe_filter_frames(struct fc_lport *lport, stats->InvalidCRCCount++; if (stats->InvalidCRCCount < 5) printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); + put_cpu(); return -EINVAL; } @@ -1746,6 +1758,7 @@ int fcoe_percpu_receive_thread(void *arg) */ static void fcoe_dev_setup(void) { + register_dcbevent_notifier(&dcb_notifier); register_netdevice_notifier(&fcoe_notifier); } @@ -1754,9 +1767,69 @@ static void fcoe_dev_setup(void) */ static void fcoe_dev_cleanup(void) { + unregister_dcbevent_notifier(&dcb_notifier); unregister_netdevice_notifier(&fcoe_notifier); } +static struct fcoe_interface * +fcoe_hostlist_lookup_realdev_port(struct net_device *netdev) +{ + struct fcoe_interface *fcoe; + struct net_device *real_dev; + + list_for_each_entry(fcoe, &fcoe_hostlist, list) { + if (fcoe->netdev->priv_flags & IFF_802_1Q_VLAN) + real_dev = vlan_dev_real_dev(fcoe->netdev); + else + real_dev = fcoe->netdev; + + if (netdev == real_dev) + return fcoe; + } + return NULL; +} + +static int fcoe_dcb_app_notification(struct notifier_block *notifier, + ulong event, void *ptr) +{ + struct dcb_app_type *entry = ptr; + struct fcoe_interface *fcoe; + struct net_device *netdev; + struct fcoe_port *port; + int prio; + + if (entry->app.selector != DCB_APP_IDTYPE_ETHTYPE) + return NOTIFY_OK; + + netdev = dev_get_by_index(&init_net, entry->ifindex); + if (!netdev) + return NOTIFY_OK; + + fcoe = fcoe_hostlist_lookup_realdev_port(netdev); + dev_put(netdev); + if (!fcoe) + return NOTIFY_OK; + + if (entry->dcbx & DCB_CAP_DCBX_VER_CEE) + prio = ffs(entry->app.priority) - 1; + else + prio = entry->app.priority; + + if (prio < 0) + return NOTIFY_OK; + + if (entry->app.protocol == ETH_P_FIP || + entry->app.protocol == ETH_P_FCOE) + fcoe->ctlr.priority = prio; + + if (entry->app.protocol == ETH_P_FCOE) { + port = lport_priv(fcoe->ctlr.lp); + port->priority = prio; + } + + return NOTIFY_OK; +} + /** * fcoe_device_notification() - Handler for net device events * @notifier: The context of the notification @@ -1965,6 +2038,46 @@ static bool fcoe_match(struct net_device *netdev) } /** + * fcoe_dcb_create() - Initialize DCB attributes and hooks + * @netdev: The net_device object of the L2 link that should be queried + * @port: The fcoe_port to bind FCoE APP priority with + * @ + */ +static void fcoe_dcb_create(struct fcoe_interface *fcoe) +{ +#ifdef CONFIG_DCB + int dcbx; + u8 fup, up; + struct net_device *netdev = fcoe->realdev; + struct fcoe_port *port = lport_priv(fcoe->ctlr.lp); + struct dcb_app app = { + .priority = 0, + .protocol = ETH_P_FCOE + }; + + /* setup DCB priority attributes. */ + if (netdev && netdev->dcbnl_ops && netdev->dcbnl_ops->getdcbx) { + dcbx = netdev->dcbnl_ops->getdcbx(netdev); + + if (dcbx & DCB_CAP_DCBX_VER_IEEE) { + app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; + up = dcb_ieee_getapp_mask(netdev, &app); + app.protocol = ETH_P_FIP; + fup = dcb_ieee_getapp_mask(netdev, &app); + } else { + app.selector = DCB_APP_IDTYPE_ETHTYPE; + up = dcb_getapp(netdev, &app); + app.protocol = ETH_P_FIP; + fup = dcb_getapp(netdev, &app); + } + + port->priority = ffs(up) ? ffs(up) - 1 : 0; + fcoe->ctlr.priority = ffs(fup) ? ffs(fup) - 1 : port->priority; + } +#endif +} + +/** * fcoe_create() - Create a fcoe interface * @netdev : The net_device object the Ethernet interface to create on * @fip_mode: The FIP mode for this creation @@ -2007,6 +2120,9 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode) /* Make this the "master" N_Port */ fcoe->ctlr.lp = lport; + /* setup DCB priority attributes. */ + fcoe_dcb_create(fcoe); + /* add to lports list */ fcoe_hostlist_add(lport); diff --git a/drivers/scsi/fcoe/fcoe_ctlr.c b/drivers/scsi/fcoe/fcoe_ctlr.c index c74c4b8..e7522dc 100644 --- a/drivers/scsi/fcoe/fcoe_ctlr.c +++ b/drivers/scsi/fcoe/fcoe_ctlr.c @@ -320,6 +320,7 @@ static void fcoe_ctlr_solicit(struct fcoe_ctlr *fip, struct fcoe_fcf *fcf) skb_put(skb, sizeof(*sol)); skb->protocol = htons(ETH_P_FIP); + skb->priority = fip->priority; skb_reset_mac_header(skb); skb_reset_network_header(skb); fip->send(fip, skb); @@ -474,6 +475,7 @@ static void fcoe_ctlr_send_keep_alive(struct fcoe_ctlr *fip, } skb_put(skb, len); skb->protocol = htons(ETH_P_FIP); + skb->priority = fip->priority; skb_reset_mac_header(skb); skb_reset_network_header(skb); fip->send(fip, skb); @@ -566,6 +568,7 @@ static int fcoe_ctlr_encaps(struct fcoe_ctlr *fip, struct fc_lport *lport, cap->fip.fip_dl_len = htons(dlen / FIP_BPW); skb->protocol = htons(ETH_P_FIP); + skb->priority = fip->priority; skb_reset_mac_header(skb); skb_reset_network_header(skb); return 0; @@ -1911,6 +1914,7 @@ static void fcoe_ctlr_vn_send(struct fcoe_ctlr *fip, skb_put(skb, len); skb->protocol = htons(ETH_P_FIP); + skb->priority = fip->priority; skb_reset_mac_header(skb); skb_reset_network_header(skb); diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c index 4e041f6..d570573 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c +++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c @@ -4335,7 +4335,7 @@ _scsih_smart_predicted_fault(struct MPT2SAS_ADAPTER *ioc, u16 handle) /* insert into event log */ sz = offsetof(Mpi2EventNotificationReply_t, EventData) + sizeof(Mpi2EventDataSasDeviceStatusChange_t); - event_reply = kzalloc(sz, GFP_KERNEL); + event_reply = kzalloc(sz, GFP_ATOMIC); if (!event_reply) { printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", ioc->name, __FILE__, __LINE__, __func__); diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index ac326c4..6465dae 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c @@ -1762,12 +1762,31 @@ qla2x00_get_host_port_state(struct Scsi_Host *shost) scsi_qla_host_t *vha = shost_priv(shost); struct scsi_qla_host *base_vha = pci_get_drvdata(vha->hw->pdev); - if (!base_vha->flags.online) + if (!base_vha->flags.online) { fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE; - else if (atomic_read(&base_vha->loop_state) == LOOP_TIMEOUT) - fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN; - else + return; + } + + switch (atomic_read(&base_vha->loop_state)) { + case LOOP_UPDATE: + fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS; + break; + case LOOP_DOWN: + if (test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags)) + fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS; + else + fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN; + break; + case LOOP_DEAD: + fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN; + break; + case LOOP_READY: fc_host_port_state(shost) = FC_PORTSTATE_ONLINE; + break; + default: + fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN; + break; + } } static int diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index 9df4787..f3cddd5 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c @@ -12,17 +12,17 @@ * | Level | Last Value Used | Holes | * ---------------------------------------------------------------------- * | Module Init and Probe | 0x0116 | | - * | Mailbox commands | 0x1129 | | + * | Mailbox commands | 0x112b | | * | Device Discovery | 0x2083 | | * | Queue Command and IO tracing | 0x302e | 0x3008 | * | DPC Thread | 0x401c | | * | Async Events | 0x5059 | | - * | Timer Routines | 0x600d | | + * | Timer Routines | 0x6010 | 0x600e,0x600f | * | User Space Interactions | 0x709d | | - * | Task Management | 0x8041 | | + * | Task Management | 0x8041 | 0x800b | * | AER/EEH | 0x900f | | * | Virtual Port | 0xa007 | | - * | ISP82XX Specific | 0xb051 | | + * | ISP82XX Specific | 0xb052 | | * | MultiQ | 0xc00b | | * | Misc | 0xd00b | | * ---------------------------------------------------------------------- diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h index ce32d81..c0c11af 100644 --- a/drivers/scsi/qla2xxx/qla_gbl.h +++ b/drivers/scsi/qla2xxx/qla_gbl.h @@ -578,6 +578,7 @@ extern int qla82xx_check_md_needed(scsi_qla_host_t *); extern void qla82xx_chip_reset_cleanup(scsi_qla_host_t *); extern int qla82xx_mbx_beacon_ctl(scsi_qla_host_t *, int); extern char *qdev_state(uint32_t); +extern void qla82xx_clear_pending_mbx(scsi_qla_host_t *); /* BSG related functions */ extern int qla24xx_bsg_request(struct fc_bsg_job *); diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index f03e915f..54ea68c 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c @@ -1509,7 +1509,8 @@ enable_82xx_npiv: &ha->fw_xcb_count, NULL, NULL, &ha->max_npiv_vports, NULL); - if (!fw_major_version && ql2xallocfwdump) + if (!fw_major_version && ql2xallocfwdump + && !IS_QLA82XX(ha)) qla2x00_alloc_fw_dump(vha); } } else { diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c index dbec896..a4b267e 100644 --- a/drivers/scsi/qla2xxx/qla_iocb.c +++ b/drivers/scsi/qla2xxx/qla_iocb.c @@ -120,11 +120,10 @@ qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha) * Returns a pointer to the continuation type 1 IOCB packet. */ static inline cont_a64_entry_t * -qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha) +qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req) { cont_a64_entry_t *cont_pkt; - struct req_que *req = vha->req; /* Adjust ring index. */ req->ring_index++; if (req->ring_index == req->length) { @@ -292,7 +291,7 @@ void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt, * Five DSDs are available in the Continuation * Type 1 IOCB. */ - cont_pkt = qla2x00_prep_cont_type1_iocb(vha); + cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req); cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; avail_dsds = 5; } @@ -684,7 +683,7 @@ qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt, * Five DSDs are available in the Continuation * Type 1 IOCB. */ - cont_pkt = qla2x00_prep_cont_type1_iocb(vha); + cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req); cur_dsd = (uint32_t *)cont_pkt->dseg_0_address; avail_dsds = 5; } @@ -2070,7 +2069,8 @@ qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb) * Five DSDs are available in the Cont. * Type 1 IOCB. */ - cont_pkt = qla2x00_prep_cont_type1_iocb(vha); + cont_pkt = qla2x00_prep_cont_type1_iocb(vha, + vha->hw->req_q_map[0]); cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; avail_dsds = 5; cont_iocb_prsnt = 1; @@ -2096,6 +2096,7 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb) int index; uint16_t tot_dsds; scsi_qla_host_t *vha = sp->fcport->vha; + struct qla_hw_data *ha = vha->hw; struct fc_bsg_job *bsg_job = ((struct srb_ctx *)sp->ctx)->u.bsg_job; int loop_iterartion = 0; int cont_iocb_prsnt = 0; @@ -2141,7 +2142,8 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb) * Five DSDs are available in the Cont. * Type 1 IOCB. */ - cont_pkt = qla2x00_prep_cont_type1_iocb(vha); + cont_pkt = qla2x00_prep_cont_type1_iocb(vha, + ha->req_q_map[0]); cur_dsd = (uint32_t *) cont_pkt->dseg_0_address; avail_dsds = 5; cont_iocb_prsnt = 1; diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index 2516adf..7b91b29 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c @@ -1741,7 +1741,7 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) resid, scsi_bufflen(cp)); cp->result = DID_ERROR << 16 | lscsi_status; - break; + goto check_scsi_status; } if (!lscsi_status && diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index 3b3cec9..82a3353 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c @@ -79,8 +79,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) mcp->mb[0] = MBS_LINK_DOWN_ERROR; ql_log(ql_log_warn, base_vha, 0x1004, "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); - rval = QLA_FUNCTION_FAILED; - goto premature_exit; + return QLA_FUNCTION_TIMEOUT; } /* @@ -163,6 +162,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) HINT_MBX_INT_PENDING) { spin_unlock_irqrestore(&ha->hardware_lock, flags); + ha->flags.mbox_busy = 0; ql_dbg(ql_dbg_mbx, base_vha, 0x1010, "Pending mailbox timeout, exiting.\n"); rval = QLA_FUNCTION_TIMEOUT; @@ -188,6 +188,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) HINT_MBX_INT_PENDING) { spin_unlock_irqrestore(&ha->hardware_lock, flags); + ha->flags.mbox_busy = 0; ql_dbg(ql_dbg_mbx, base_vha, 0x1012, "Pending mailbox timeout, exiting.\n"); rval = QLA_FUNCTION_TIMEOUT; @@ -302,7 +303,15 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { - + if (IS_QLA82XX(ha)) { + ql_dbg(ql_dbg_mbx, vha, 0x112a, + "disabling pause transmit on port " + "0 & 1.\n"); + qla82xx_wr_32(ha, + QLA82XX_CRB_NIU + 0x98, + CRB_NIU_XG_PAUSE_CTL_P0| + CRB_NIU_XG_PAUSE_CTL_P1); + } ql_log(ql_log_info, base_vha, 0x101c, "Mailbox cmd timeout occured. " "Scheduling ISP abort eeh_busy=0x%x.\n", @@ -318,7 +327,15 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { - + if (IS_QLA82XX(ha)) { + ql_dbg(ql_dbg_mbx, vha, 0x112b, + "disabling pause transmit on port " + "0 & 1.\n"); + qla82xx_wr_32(ha, + QLA82XX_CRB_NIU + 0x98, + CRB_NIU_XG_PAUSE_CTL_P0| + CRB_NIU_XG_PAUSE_CTL_P1); + } ql_log(ql_log_info, base_vha, 0x101e, "Mailbox cmd timeout occured. " "Scheduling ISP abort.\n"); diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index 94bded5..0355493 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c @@ -3817,6 +3817,20 @@ exit: return rval; } +void qla82xx_clear_pending_mbx(scsi_qla_host_t *vha) +{ + struct qla_hw_data *ha = vha->hw; + + if (ha->flags.mbox_busy) { + ha->flags.mbox_int = 1; + ha->flags.mbox_busy = 0; + ql_log(ql_log_warn, vha, 0x6010, + "Doing premature completion of mbx command.\n"); + if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) + complete(&ha->mbx_intr_comp); + } +} + void qla82xx_watchdog(scsi_qla_host_t *vha) { uint32_t dev_state, halt_status; @@ -3839,9 +3853,13 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) qla2xxx_wake_dpc(vha); } else { if (qla82xx_check_fw_alive(vha)) { + ql_dbg(ql_dbg_timer, vha, 0x6011, + "disabling pause transmit on port 0 & 1.\n"); + qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, + CRB_NIU_XG_PAUSE_CTL_P0|CRB_NIU_XG_PAUSE_CTL_P1); halt_status = qla82xx_rd_32(ha, QLA82XX_PEG_HALT_STATUS1); - ql_dbg(ql_dbg_timer, vha, 0x6005, + ql_log(ql_log_info, vha, 0x6005, "dumping hw/fw registers:.\n " " PEG_HALT_STATUS1: 0x%x, PEG_HALT_STATUS2: 0x%x,.\n " " PEG_NET_0_PC: 0x%x, PEG_NET_1_PC: 0x%x,.\n " @@ -3858,6 +3876,11 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) QLA82XX_CRB_PEG_NET_3 + 0x3c), qla82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c)); + if (LSW(MSB(halt_status)) == 0x67) + ql_log(ql_log_warn, vha, 0xb052, + "Firmware aborted with " + "error code 0x00006700. Device is " + "being reset.\n"); if (halt_status & HALT_STATUS_UNRECOVERABLE) { set_bit(ISP_UNRECOVERABLE, &vha->dpc_flags); @@ -3869,16 +3892,8 @@ void qla82xx_watchdog(scsi_qla_host_t *vha) } qla2xxx_wake_dpc(vha); ha->flags.isp82xx_fw_hung = 1; - if (ha->flags.mbox_busy) { - ha->flags.mbox_int = 1; - ql_log(ql_log_warn, vha, 0x6007, - "Due to FW hung, doing " - "premature completion of mbx " - "command.\n"); - if (test_bit(MBX_INTR_WAIT, - &ha->mbx_cmd_flags)) - complete(&ha->mbx_intr_comp); - } + ql_log(ql_log_warn, vha, 0x6007, "Firmware hung.\n"); + qla82xx_clear_pending_mbx(vha); } } } @@ -4073,10 +4088,7 @@ qla82xx_chip_reset_cleanup(scsi_qla_host_t *vha) msleep(1000); if (qla82xx_check_fw_alive(vha)) { ha->flags.isp82xx_fw_hung = 1; - if (ha->flags.mbox_busy) { - ha->flags.mbox_int = 1; - complete(&ha->mbx_intr_comp); - } + qla82xx_clear_pending_mbx(vha); break; } } diff --git a/drivers/scsi/qla2xxx/qla_nx.h b/drivers/scsi/qla2xxx/qla_nx.h index 57820c1..57a226b 100644 --- a/drivers/scsi/qla2xxx/qla_nx.h +++ b/drivers/scsi/qla2xxx/qla_nx.h @@ -1173,4 +1173,8 @@ struct qla82xx_md_entry_queue { static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC, 0x410000B8, 0x410000BC }; + +#define CRB_NIU_XG_PAUSE_CTL_P0 0x1 +#define CRB_NIU_XG_PAUSE_CTL_P1 0x8 + #endif diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index fd14c7b..f9e5b85 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c @@ -201,12 +201,12 @@ MODULE_PARM_DESC(ql2xmdcapmask, "Set the Minidump driver capture mask level. " "Default is 0x7F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F."); -int ql2xmdenable; +int ql2xmdenable = 1; module_param(ql2xmdenable, int, S_IRUGO); MODULE_PARM_DESC(ql2xmdenable, "Enable/disable MiniDump. " - "0 (Default) - MiniDump disabled. " - "1 - MiniDump enabled."); + "0 - MiniDump disabled. " + "1 (Default) - MiniDump enabled."); /* * SCSI host template entry points @@ -423,6 +423,7 @@ fail2: qla25xx_delete_queues(vha); destroy_workqueue(ha->wq); ha->wq = NULL; + vha->req = ha->req_q_map[0]; fail: ha->mqenable = 0; kfree(ha->req_q_map); @@ -814,49 +815,6 @@ qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha) return return_status; } -/* - * qla2x00_wait_for_loop_ready - * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop - * to be in LOOP_READY state. - * Input: - * ha - pointer to host adapter structure - * - * Note: - * Does context switching-Release SPIN_LOCK - * (if any) before calling this routine. - * - * - * Return: - * Success (LOOP_READY) : 0 - * Failed (LOOP_NOT_READY) : 1 - */ -static inline int -qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha) -{ - int return_status = QLA_SUCCESS; - unsigned long loop_timeout ; - struct qla_hw_data *ha = vha->hw; - scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); - - /* wait for 5 min at the max for loop to be ready */ - loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ); - - while ((!atomic_read(&base_vha->loop_down_timer) && - atomic_read(&base_vha->loop_state) == LOOP_DOWN) || - atomic_read(&base_vha->loop_state) != LOOP_READY) { - if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) { - return_status = QLA_FUNCTION_FAILED; - break; - } - msleep(1000); - if (time_after_eq(jiffies, loop_timeout)) { - return_status = QLA_FUNCTION_FAILED; - break; - } - } - return (return_status); -} - static void sp_get(struct srb *sp) { @@ -1035,12 +993,6 @@ __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type, "Wait for hba online failed for cmd=%p.\n", cmd); goto eh_reset_failed; } - err = 1; - if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS) { - ql_log(ql_log_warn, vha, 0x800b, - "Wait for loop ready failed for cmd=%p.\n", cmd); - goto eh_reset_failed; - } err = 2; if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1) != QLA_SUCCESS) { @@ -1137,10 +1089,9 @@ qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd) goto eh_bus_reset_done; } - if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) { - if (qla2x00_loop_reset(vha) == QLA_SUCCESS) - ret = SUCCESS; - } + if (qla2x00_loop_reset(vha) == QLA_SUCCESS) + ret = SUCCESS; + if (ret == FAILED) goto eh_bus_reset_done; @@ -1206,15 +1157,6 @@ qla2xxx_eh_host_reset(struct scsi_cmnd *cmd) if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS) goto eh_host_reset_lock; - /* - * Fixme-may be dpc thread is active and processing - * loop_resync,so wait a while for it to - * be completed and then issue big hammer.Otherwise - * it may cause I/O failure as big hammer marks the - * devices as lost kicking of the port_down_timer - * while dpc is stuck for the mailbox to complete. - */ - qla2x00_wait_for_loop_ready(vha); if (vha != base_vha) { if (qla2x00_vp_abort_isp(vha)) goto eh_host_reset_lock; @@ -1297,16 +1239,13 @@ qla2x00_loop_reset(scsi_qla_host_t *vha) atomic_set(&vha->loop_state, LOOP_DOWN); atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); qla2x00_mark_all_devices_lost(vha, 0); - qla2x00_wait_for_loop_ready(vha); } if (ha->flags.enable_lip_reset) { ret = qla2x00_lip_reset(vha); - if (ret != QLA_SUCCESS) { + if (ret != QLA_SUCCESS) ql_dbg(ql_dbg_taskm, vha, 0x802e, "lip_reset failed (%d).\n", ret); - } else - qla2x00_wait_for_loop_ready(vha); } /* Issue marker command only when we are going to start the I/O */ @@ -4070,13 +4009,8 @@ qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) /* For ISP82XX complete any pending mailbox cmd */ if (IS_QLA82XX(ha)) { ha->flags.isp82xx_fw_hung = 1; - if (ha->flags.mbox_busy) { - ha->flags.mbox_int = 1; - ql_dbg(ql_dbg_aer, vha, 0x9001, - "Due to pci channel io frozen, doing premature " - "completion of mbx command.\n"); - complete(&ha->mbx_intr_comp); - } + ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n"); + qla82xx_clear_pending_mbx(vha); } qla2x00_free_irqs(vha); pci_disable_device(pdev); diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h index 13b6357..23f33a6 100644 --- a/drivers/scsi/qla2xxx/qla_version.h +++ b/drivers/scsi/qla2xxx/qla_version.h @@ -7,7 +7,7 @@ /* * Driver version */ -#define QLA2XXX_VERSION "8.03.07.07-k" +#define QLA2XXX_VERSION "8.03.07.12-k" #define QLA_DRIVER_MAJOR_VER 8 #define QLA_DRIVER_MINOR_VER 3 diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h index ace637b..fd5edc6 100644 --- a/drivers/scsi/qla4xxx/ql4_def.h +++ b/drivers/scsi/qla4xxx/ql4_def.h @@ -147,7 +147,7 @@ #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ #define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */ -#define QL4_SESS_RECOVERY_TMO 30 /* iSCSI session */ +#define QL4_SESS_RECOVERY_TMO 120 /* iSCSI session */ /* recovery timeout */ #define LSDW(x) ((u32)((u64)(x))) @@ -173,6 +173,8 @@ #define ISNS_DEREG_TOV 5 #define HBA_ONLINE_TOV 30 #define DISABLE_ACB_TOV 30 +#define IP_CONFIG_TOV 30 +#define LOGIN_TOV 12 #define MAX_RESET_HA_RETRIES 2 @@ -240,6 +242,45 @@ struct ddb_entry { uint16_t fw_ddb_index; /* DDB firmware index */ uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */ + uint16_t ddb_type; +#define FLASH_DDB 0x01 + + struct dev_db_entry fw_ddb_entry; + int (*unblock_sess)(struct iscsi_cls_session *cls_session); + int (*ddb_change)(struct scsi_qla_host *ha, uint32_t fw_ddb_index, + struct ddb_entry *ddb_entry, uint32_t state); + + /* Driver Re-login */ + unsigned long flags; /* DDB Flags */ + uint16_t default_relogin_timeout; /* Max time to wait for + * relogin to complete */ + atomic_t retry_relogin_timer; /* Min Time between relogins + * (4000 only) */ + atomic_t relogin_timer; /* Max Time to wait for + * relogin to complete */ + atomic_t relogin_retry_count; /* Num of times relogin has been + * retried */ + uint32_t default_time2wait; /* Default Min time between + * relogins (+aens) */ + +}; + +struct qla_ddb_index { + struct list_head list; + uint16_t fw_ddb_idx; + struct dev_db_entry fw_ddb; +}; + +#define DDB_IPADDR_LEN 64 + +struct ql4_tuple_ddb { + int port; + int tpgt; + char ip_addr[DDB_IPADDR_LEN]; + char iscsi_name[ISCSI_NAME_SIZE]; + uint16_t options; +#define DDB_OPT_IPV6 0x0e0e +#define DDB_OPT_IPV4 0x0f0f }; /* @@ -411,7 +452,7 @@ struct scsi_qla_host { #define AF_FW_RECOVERY 19 /* 0x00080000 */ #define AF_EEH_BUSY 20 /* 0x00100000 */ #define AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */ - +#define AF_BUILD_DDB_LIST 22 /* 0x00400000 */ unsigned long dpc_flags; #define DPC_RESET_HA 1 /* 0x00000002 */ @@ -604,6 +645,7 @@ struct scsi_qla_host { uint16_t bootload_minor; uint16_t bootload_patch; uint16_t bootload_build; + uint16_t def_timeout; /* Default login timeout */ uint32_t flash_state; #define QLFLASH_WAITING 0 @@ -623,6 +665,11 @@ struct scsi_qla_host { uint16_t iscsi_pci_func_cnt; uint8_t model_name[16]; struct completion disable_acb_comp; + struct dma_pool *fw_ddb_dma_pool; +#define DDB_DMA_BLOCK_SIZE 512 + uint16_t pri_ddb_idx; + uint16_t sec_ddb_idx; + int is_reset; }; struct ql4_task_data { @@ -835,6 +882,10 @@ static inline int ql4xxx_reset_active(struct scsi_qla_host *ha) /*---------------------------------------------------------------------------*/ /* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */ + +#define INIT_ADAPTER 0 +#define RESET_ADAPTER 1 + #define PRESERVE_DDB_LIST 0 #define REBUILD_DDB_LIST 1 diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h index cbd5a20..4ac07f8 100644 --- a/drivers/scsi/qla4xxx/ql4_fw.h +++ b/drivers/scsi/qla4xxx/ql4_fw.h @@ -12,6 +12,7 @@ #define MAX_PRST_DEV_DB_ENTRIES 64 #define MIN_DISC_DEV_DB_ENTRY MAX_PRST_DEV_DB_ENTRIES #define MAX_DEV_DB_ENTRIES 512 +#define MAX_DEV_DB_ENTRIES_40XX 256 /************************************************************************* * @@ -604,6 +605,13 @@ struct addr_ctrl_blk { uint8_t res14[140]; /* 274-2FF */ }; +#define IP_ADDR_COUNT 4 /* Total 4 IP address supported in one interface + * One IPv4, one IPv6 link local and 2 IPv6 + */ + +#define IP_STATE_MASK 0x0F000000 +#define IP_STATE_SHIFT 24 + struct init_fw_ctrl_blk { struct addr_ctrl_blk pri; /* struct addr_ctrl_blk sec;*/ diff --git a/drivers/scsi/qla4xxx/ql4_glbl.h b/drivers/scsi/qla4xxx/ql4_glbl.h index 160db9d..d0dd4b3 100644 --- a/drivers/scsi/qla4xxx/ql4_glbl.h +++ b/drivers/scsi/qla4xxx/ql4_glbl.h @@ -13,7 +13,7 @@ struct iscsi_cls_conn; int qla4xxx_hw_reset(struct scsi_qla_host *ha); int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a); int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb *srb); -int qla4xxx_initialize_adapter(struct scsi_qla_host *ha); +int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset); int qla4xxx_soft_reset(struct scsi_qla_host *ha); irqreturn_t qla4xxx_intr_handler(int irq, void *dev_id); @@ -153,10 +153,13 @@ int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index, uint32_t *mbx_sts); int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index); int qla4xxx_send_passthru0(struct iscsi_task *task); +void qla4xxx_free_ddb_index(struct scsi_qla_host *ha); int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index, uint16_t stats_size, dma_addr_t stats_dma); void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, struct ddb_entry *ddb_entry); +void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha, + struct ddb_entry *ddb_entry); int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha, struct dev_db_entry *fw_ddb_entry, dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index); @@ -169,11 +172,22 @@ int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma, int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha, uint32_t region, uint32_t field0, uint32_t field1); +int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index); +void qla4xxx_login_flash_ddb(struct iscsi_cls_session *cls_session); +int qla4xxx_unblock_ddb(struct iscsi_cls_session *cls_session); +int qla4xxx_unblock_flash_ddb(struct iscsi_cls_session *cls_session); +int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, + struct ddb_entry *ddb_entry, uint32_t state); +int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, + struct ddb_entry *ddb_entry, uint32_t state); +void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset); /* BSG Functions */ int qla4xxx_bsg_request(struct bsg_job *bsg_job); int qla4xxx_process_vendor_specific(struct bsg_job *bsg_job); +void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry); + extern int ql4xextended_error_logging; extern int ql4xdontresethba; extern int ql4xenablemsix; diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c index 3075fba..1bdfa81 100644 --- a/drivers/scsi/qla4xxx/ql4_init.c +++ b/drivers/scsi/qla4xxx/ql4_init.c @@ -773,22 +773,24 @@ int qla4xxx_start_firmware(struct scsi_qla_host *ha) * be freed so that when login happens from user space there are free DDB * indices available. **/ -static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) +void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) { int max_ddbs; int ret; uint32_t idx = 0, next_idx = 0; uint32_t state = 0, conn_err = 0; - max_ddbs = is_qla40XX(ha) ? MAX_PRST_DEV_DB_ENTRIES : + max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : MAX_DEV_DB_ENTRIES; for (idx = 0; idx < max_ddbs; idx = next_idx) { ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL, &next_idx, &state, &conn_err, NULL, NULL); - if (ret == QLA_ERROR) + if (ret == QLA_ERROR) { + next_idx++; continue; + } if (state == DDB_DS_NO_CONNECTION_ACTIVE || state == DDB_DS_SESSION_FAILED) { DEBUG2(ql4_printk(KERN_INFO, ha, @@ -804,7 +806,6 @@ static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) } } - /** * qla4xxx_initialize_adapter - initiailizes hba * @ha: Pointer to host adapter structure. @@ -812,7 +813,7 @@ static void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) * This routine parforms all of the steps necessary to initialize the adapter. * **/ -int qla4xxx_initialize_adapter(struct scsi_qla_host *ha) +int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset) { int status = QLA_ERROR; @@ -840,7 +841,8 @@ int qla4xxx_initialize_adapter(struct scsi_qla_host *ha) if (status == QLA_ERROR) goto exit_init_hba; - qla4xxx_free_ddb_index(ha); + if (is_reset == RESET_ADAPTER) + qla4xxx_build_ddb_list(ha, is_reset); set_bit(AF_ONLINE, &ha->flags); exit_init_hba: @@ -855,38 +857,12 @@ exit_init_hba: return status; } -/** - * qla4xxx_process_ddb_changed - process ddb state change - * @ha - Pointer to host adapter structure. - * @fw_ddb_index - Firmware's device database index - * @state - Device state - * - * This routine processes a Decive Database Changed AEN Event. - **/ -int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, - uint32_t state, uint32_t conn_err) +int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, + struct ddb_entry *ddb_entry, uint32_t state) { - struct ddb_entry * ddb_entry; uint32_t old_fw_ddb_device_state; int status = QLA_ERROR; - /* check for out of range index */ - if (fw_ddb_index >= MAX_DDB_ENTRIES) - goto exit_ddb_event; - - /* Get the corresponging ddb entry */ - ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index); - /* Device does not currently exist in our database. */ - if (ddb_entry == NULL) { - ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n", - __func__, fw_ddb_index); - - if (state == DDB_DS_NO_CONNECTION_ACTIVE) - clear_bit(fw_ddb_index, ha->ddb_idx_map); - - goto exit_ddb_event; - } - old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state; DEBUG2(ql4_printk(KERN_INFO, ha, "%s: DDB - old state = 0x%x, new state = 0x%x for " @@ -900,9 +876,7 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, switch (state) { case DDB_DS_SESSION_ACTIVE: case DDB_DS_DISCOVERY: - iscsi_conn_start(ddb_entry->conn); - iscsi_conn_login_event(ddb_entry->conn, - ISCSI_CONN_STATE_LOGGED_IN); + ddb_entry->unblock_sess(ddb_entry->sess); qla4xxx_update_session_conn_param(ha, ddb_entry); status = QLA_SUCCESS; break; @@ -936,9 +910,7 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, switch (state) { case DDB_DS_SESSION_ACTIVE: case DDB_DS_DISCOVERY: - iscsi_conn_start(ddb_entry->conn); - iscsi_conn_login_event(ddb_entry->conn, - ISCSI_CONN_STATE_LOGGED_IN); + ddb_entry->unblock_sess(ddb_entry->sess); qla4xxx_update_session_conn_param(ha, ddb_entry); status = QLA_SUCCESS; break; @@ -954,7 +926,198 @@ int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, __func__)); break; } + return status; +} + +void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry) +{ + /* + * This triggers a relogin. After the relogin_timer + * expires, the relogin gets scheduled. We must wait a + * minimum amount of time since receiving an 0x8014 AEN + * with failed device_state or a logout response before + * we can issue another relogin. + * + * Firmware pads this timeout: (time2wait +1). + * Driver retry to login should be longer than F/W. + * Otherwise F/W will fail + * set_ddb() mbx cmd with 0x4005 since it still + * counting down its time2wait. + */ + atomic_set(&ddb_entry->relogin_timer, 0); + atomic_set(&ddb_entry->retry_relogin_timer, + ddb_entry->default_time2wait + 4); + +} + +int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, + struct ddb_entry *ddb_entry, uint32_t state) +{ + uint32_t old_fw_ddb_device_state; + int status = QLA_ERROR; + + old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state; + DEBUG2(ql4_printk(KERN_INFO, ha, + "%s: DDB - old state = 0x%x, new state = 0x%x for " + "index [%d]\n", __func__, + ddb_entry->fw_ddb_device_state, state, fw_ddb_index)); + + ddb_entry->fw_ddb_device_state = state; + + switch (old_fw_ddb_device_state) { + case DDB_DS_LOGIN_IN_PROCESS: + case DDB_DS_NO_CONNECTION_ACTIVE: + switch (state) { + case DDB_DS_SESSION_ACTIVE: + ddb_entry->unblock_sess(ddb_entry->sess); + qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry); + status = QLA_SUCCESS; + break; + case DDB_DS_SESSION_FAILED: + iscsi_block_session(ddb_entry->sess); + if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) + qla4xxx_arm_relogin_timer(ddb_entry); + status = QLA_SUCCESS; + break; + } + break; + case DDB_DS_SESSION_ACTIVE: + switch (state) { + case DDB_DS_SESSION_FAILED: + iscsi_block_session(ddb_entry->sess); + if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) + qla4xxx_arm_relogin_timer(ddb_entry); + status = QLA_SUCCESS; + break; + } + break; + case DDB_DS_SESSION_FAILED: + switch (state) { + case DDB_DS_SESSION_ACTIVE: + ddb_entry->unblock_sess(ddb_entry->sess); + qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry); + status = QLA_SUCCESS; + break; + case DDB_DS_SESSION_FAILED: + if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) + qla4xxx_arm_relogin_timer(ddb_entry); + status = QLA_SUCCESS; + break; + } + break; + default: + DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Unknown Event\n", + __func__)); + break; + } + return status; +} + +/** + * qla4xxx_process_ddb_changed - process ddb state change + * @ha - Pointer to host adapter structure. + * @fw_ddb_index - Firmware's device database index + * @state - Device state + * + * This routine processes a Decive Database Changed AEN Event. + **/ +int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, + uint32_t fw_ddb_index, + uint32_t state, uint32_t conn_err) +{ + struct ddb_entry *ddb_entry; + int status = QLA_ERROR; + + /* check for out of range index */ + if (fw_ddb_index >= MAX_DDB_ENTRIES) + goto exit_ddb_event; + + /* Get the corresponging ddb entry */ + ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index); + /* Device does not currently exist in our database. */ + if (ddb_entry == NULL) { + ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n", + __func__, fw_ddb_index); + + if (state == DDB_DS_NO_CONNECTION_ACTIVE) + clear_bit(fw_ddb_index, ha->ddb_idx_map); + + goto exit_ddb_event; + } + + ddb_entry->ddb_change(ha, fw_ddb_index, ddb_entry, state); exit_ddb_event: return status; } + +/** + * qla4xxx_login_flash_ddb - Login to target (DDB) + * @cls_session: Pointer to the session to login + * + * This routine logins to the target. + * Issues setddb and conn open mbx + **/ +void qla4xxx_login_flash_ddb(struct iscsi_cls_session *cls_session) +{ + struct iscsi_session *sess; + struct ddb_entry *ddb_entry; + struct scsi_qla_host *ha; + struct dev_db_entry *fw_ddb_entry = NULL; + dma_addr_t fw_ddb_dma; + uint32_t mbx_sts = 0; + int ret; + + sess = cls_session->dd_data; + ddb_entry = sess->dd_data; + ha = ddb_entry->ha; + + if (!test_bit(AF_LINK_UP, &ha->flags)) + return; + + if (ddb_entry->ddb_type != FLASH_DDB) { + DEBUG2(ql4_printk(KERN_INFO, ha, + "Skipping login to non FLASH DB")); + goto exit_login; + } + + fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, + &fw_ddb_dma); + if (fw_ddb_entry == NULL) { + DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); + goto exit_login; + } + + if (ddb_entry->fw_ddb_index == INVALID_ENTRY) { + ret = qla4xxx_get_ddb_index(ha, &ddb_entry->fw_ddb_index); + if (ret == QLA_ERROR) + goto exit_login; + + ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; + ha->tot_ddbs++; + } + + memcpy(fw_ddb_entry, &ddb_entry->fw_ddb_entry, + sizeof(struct dev_db_entry)); + ddb_entry->sess->target_id = ddb_entry->fw_ddb_index; + + ret = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index, + fw_ddb_dma, &mbx_sts); + if (ret == QLA_ERROR) { + DEBUG2(ql4_printk(KERN_ERR, ha, "Set DDB failed\n")); + goto exit_login; + } + + ddb_entry->fw_ddb_device_state = DDB_DS_LOGIN_IN_PROCESS; + ret = qla4xxx_conn_open(ha, ddb_entry->fw_ddb_index); + if (ret == QLA_ERROR) { + ql4_printk(KERN_ERR, ha, "%s: Login failed: %s\n", __func__, + sess->targetname); + goto exit_login; + } + +exit_login: + if (fw_ddb_entry) + dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); +} + diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c index 4c2b848..c259378 100644 --- a/drivers/scsi/qla4xxx/ql4_mbx.c +++ b/drivers/scsi/qla4xxx/ql4_mbx.c @@ -41,6 +41,16 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount, return status; } + if (is_qla40XX(ha)) { + if (test_bit(AF_HA_REMOVAL, &ha->flags)) { + DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: " + "prematurely completing mbx cmd as " + "adapter removal detected\n", + ha->host_no, __func__)); + return status; + } + } + if (is_qla8022(ha)) { if (test_bit(AF_FW_RECOVERY, &ha->flags)) { DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: " @@ -413,6 +423,7 @@ qla4xxx_update_local_ifcb(struct scsi_qla_host *ha, memcpy(ha->name_string, init_fw_cb->iscsi_name, min(sizeof(ha->name_string), sizeof(init_fw_cb->iscsi_name))); + ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout); /*memcpy(ha->alias, init_fw_cb->Alias, min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/ diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c index 30f31b1..4169c8b 100644 --- a/drivers/scsi/qla4xxx/ql4_os.c +++ b/drivers/scsi/qla4xxx/ql4_os.c @@ -8,6 +8,7 @@ #include <linux/slab.h> #include <linux/blkdev.h> #include <linux/iscsi_boot_sysfs.h> +#include <linux/inet.h> #include <scsi/scsi_tcq.h> #include <scsi/scsicam.h> @@ -31,6 +32,13 @@ static struct kmem_cache *srb_cachep; /* * Module parameter information and variables */ +int ql4xdisablesysfsboot = 1; +module_param(ql4xdisablesysfsboot, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(ql4xdisablesysfsboot, + "Set to disable exporting boot targets to sysfs\n" + " 0 - Export boot targets\n" + " 1 - Do not export boot targets (Default)"); + int ql4xdontresethba = 0; module_param(ql4xdontresethba, int, S_IRUGO | S_IWUSR); MODULE_PARM_DESC(ql4xdontresethba, @@ -63,7 +71,7 @@ static int ql4xsess_recovery_tmo = QL4_SESS_RECOVERY_TMO; module_param(ql4xsess_recovery_tmo, int, S_IRUGO); MODULE_PARM_DESC(ql4xsess_recovery_tmo, "Target Session Recovery Timeout.\n" - " Default: 30 sec."); + " Default: 120 sec."); static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha); /* @@ -415,7 +423,7 @@ static int qla4xxx_ep_poll(struct iscsi_endpoint *ep, int timeout_ms) qla_ep = ep->dd_data; ha = to_qla_host(qla_ep->host); - if (adapter_up(ha)) + if (adapter_up(ha) && !test_bit(AF_BUILD_DDB_LIST, &ha->flags)) ret = 1; return ret; @@ -975,6 +983,150 @@ static int qla4xxx_conn_get_param(struct iscsi_cls_conn *cls_conn, } +int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index) +{ + uint32_t mbx_sts = 0; + uint16_t tmp_ddb_index; + int ret; + +get_ddb_index: + tmp_ddb_index = find_first_zero_bit(ha->ddb_idx_map, MAX_DDB_ENTRIES); + + if (tmp_ddb_index >= MAX_DDB_ENTRIES) { + DEBUG2(ql4_printk(KERN_INFO, ha, + "Free DDB index not available\n")); + ret = QLA_ERROR; + goto exit_get_ddb_index; + } + + if (test_and_set_bit(tmp_ddb_index, ha->ddb_idx_map)) + goto get_ddb_index; + + DEBUG2(ql4_printk(KERN_INFO, ha, + "Found a free DDB index at %d\n", tmp_ddb_index)); + ret = qla4xxx_req_ddb_entry(ha, tmp_ddb_index, &mbx_sts); + if (ret == QLA_ERROR) { + if (mbx_sts == MBOX_STS_COMMAND_ERROR) { + ql4_printk(KERN_INFO, ha, + "DDB index = %d not available trying next\n", + tmp_ddb_index); + goto get_ddb_index; + } + DEBUG2(ql4_printk(KERN_INFO, ha, + "Free FW DDB not available\n")); + } + + *ddb_index = tmp_ddb_index; + +exit_get_ddb_index: + return ret; +} + +static int qla4xxx_match_ipaddress(struct scsi_qla_host *ha, + struct ddb_entry *ddb_entry, + char *existing_ipaddr, + char *user_ipaddr) +{ + uint8_t dst_ipaddr[IPv6_ADDR_LEN]; + char formatted_ipaddr[DDB_IPADDR_LEN]; + int status = QLA_SUCCESS, ret = 0; + + if (ddb_entry->fw_ddb_entry.options & DDB_OPT_IPV6_DEVICE) { + ret = in6_pton(user_ipaddr, strlen(user_ipaddr), dst_ipaddr, + '\0', NULL); + if (ret == 0) { + status = QLA_ERROR; + goto out_match; + } + ret = sprintf(formatted_ipaddr, "%pI6", dst_ipaddr); + } else { + ret = in4_pton(user_ipaddr, strlen(user_ipaddr), dst_ipaddr, + '\0', NULL); + if (ret == 0) { + status = QLA_ERROR; + goto out_match; + } + ret = sprintf(formatted_ipaddr, "%pI4", dst_ipaddr); + } + + if (strcmp(existing_ipaddr, formatted_ipaddr)) + status = QLA_ERROR; + +out_match: + return status; +} + +static int qla4xxx_match_fwdb_session(struct scsi_qla_host *ha, + struct iscsi_cls_conn *cls_conn) +{ + int idx = 0, max_ddbs, rval; + struct iscsi_cls_session *cls_sess = iscsi_conn_to_session(cls_conn); + struct iscsi_session *sess, *existing_sess; + struct iscsi_conn *conn, *existing_conn; + struct ddb_entry *ddb_entry; + + sess = cls_sess->dd_data; + conn = cls_conn->dd_data; + + if (sess->targetname == NULL || + conn->persistent_address == NULL || + conn->persistent_port == 0) + return QLA_ERROR; + + max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : + MAX_DEV_DB_ENTRIES; + + for (idx = 0; idx < max_ddbs; idx++) { + ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); + if (ddb_entry == NULL) + continue; + + if (ddb_entry->ddb_type != FLASH_DDB) + continue; + + existing_sess = ddb_entry->sess->dd_data; + existing_conn = ddb_entry->conn->dd_data; + + if (existing_sess->targetname == NULL || + existing_conn->persistent_address == NULL || + existing_conn->persistent_port == 0) + continue; + + DEBUG2(ql4_printk(KERN_INFO, ha, + "IQN = %s User IQN = %s\n", + existing_sess->targetname, + sess->targetname)); + + DEBUG2(ql4_printk(KERN_INFO, ha, + "IP = %s User IP = %s\n", + existing_conn->persistent_address, + conn->persistent_address)); + + DEBUG2(ql4_printk(KERN_INFO, ha, + "Port = %d User Port = %d\n", + existing_conn->persistent_port, + conn->persistent_port)); + + if (strcmp(existing_sess->targetname, sess->targetname)) + continue; + rval = qla4xxx_match_ipaddress(ha, ddb_entry, + existing_conn->persistent_address, + conn->persistent_address); + if (rval == QLA_ERROR) + continue; + if (existing_conn->persistent_port != conn->persistent_port) + continue; + break; + } + + if (idx == max_ddbs) + return QLA_ERROR; + + DEBUG2(ql4_printk(KERN_INFO, ha, + "Match found in fwdb sessions\n")); + return QLA_SUCCESS; +} + static struct iscsi_cls_session * qla4xxx_session_create(struct iscsi_endpoint *ep, uint16_t cmds_max, uint16_t qdepth, @@ -984,8 +1136,7 @@ qla4xxx_session_create(struct iscsi_endpoint *ep, struct scsi_qla_host *ha; struct qla_endpoint *qla_ep; struct ddb_entry *ddb_entry; - uint32_t ddb_index; - uint32_t mbx_sts = 0; + uint16_t ddb_index; struct iscsi_session *sess; struct sockaddr *dst_addr; int ret; @@ -1000,32 +1151,9 @@ qla4xxx_session_create(struct iscsi_endpoint *ep, dst_addr = (struct sockaddr *)&qla_ep->dst_addr; ha = to_qla_host(qla_ep->host); -get_ddb_index: - ddb_index = find_first_zero_bit(ha->ddb_idx_map, MAX_DDB_ENTRIES); - - if (ddb_index >= MAX_DDB_ENTRIES) { - DEBUG2(ql4_printk(KERN_INFO, ha, - "Free DDB index not available\n")); - return NULL; - } - - if (test_and_set_bit(ddb_index, ha->ddb_idx_map)) - goto get_ddb_index; - - DEBUG2(ql4_printk(KERN_INFO, ha, - "Found a free DDB index at %d\n", ddb_index)); - ret = qla4xxx_req_ddb_entry(ha, ddb_index, &mbx_sts); - if (ret == QLA_ERROR) { - if (mbx_sts == MBOX_STS_COMMAND_ERROR) { - ql4_printk(KERN_INFO, ha, - "DDB index = %d not available trying next\n", - ddb_index); - goto get_ddb_index; - } - DEBUG2(ql4_printk(KERN_INFO, ha, - "Free FW DDB not available\n")); + ret = qla4xxx_get_ddb_index(ha, &ddb_index); + if (ret == QLA_ERROR) return NULL; - } cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, qla_ep->host, cmds_max, sizeof(struct ddb_entry), @@ -1040,6 +1168,8 @@ get_ddb_index: ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE; ddb_entry->ha = ha; ddb_entry->sess = cls_sess; + ddb_entry->unblock_sess = qla4xxx_unblock_ddb; + ddb_entry->ddb_change = qla4xxx_ddb_change; cls_sess->recovery_tmo = ql4xsess_recovery_tmo; ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; ha->tot_ddbs++; @@ -1077,6 +1207,9 @@ qla4xxx_conn_create(struct iscsi_cls_session *cls_sess, uint32_t conn_idx) DEBUG2(printk(KERN_INFO "Func: %s\n", __func__)); cls_conn = iscsi_conn_setup(cls_sess, sizeof(struct qla_conn), conn_idx); + if (!cls_conn) + return NULL; + sess = cls_sess->dd_data; ddb_entry = sess->dd_data; ddb_entry->conn = cls_conn; @@ -1109,7 +1242,7 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn) struct iscsi_session *sess; struct ddb_entry *ddb_entry; struct scsi_qla_host *ha; - struct dev_db_entry *fw_ddb_entry; + struct dev_db_entry *fw_ddb_entry = NULL; dma_addr_t fw_ddb_entry_dma; uint32_t mbx_sts = 0; int ret = 0; @@ -1120,12 +1253,25 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn) ddb_entry = sess->dd_data; ha = ddb_entry->ha; + /* Check if we have matching FW DDB, if yes then do not + * login to this target. This could cause target to logout previous + * connection + */ + ret = qla4xxx_match_fwdb_session(ha, cls_conn); + if (ret == QLA_SUCCESS) { + ql4_printk(KERN_INFO, ha, + "Session already exist in FW.\n"); + ret = -EEXIST; + goto exit_conn_start; + } + fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), &fw_ddb_entry_dma, GFP_KERNEL); if (!fw_ddb_entry) { ql4_printk(KERN_ERR, ha, "%s: Unable to allocate dma buffer\n", __func__); - return -ENOMEM; + ret = -ENOMEM; + goto exit_conn_start; } ret = qla4xxx_set_param_ddbentry(ha, ddb_entry, cls_conn, &mbx_sts); @@ -1138,9 +1284,7 @@ static int qla4xxx_conn_start(struct iscsi_cls_conn *cls_conn) if (mbx_sts) if (ddb_entry->fw_ddb_device_state == DDB_DS_SESSION_ACTIVE) { - iscsi_conn_start(ddb_entry->conn); - iscsi_conn_login_event(ddb_entry->conn, - ISCSI_CONN_STATE_LOGGED_IN); + ddb_entry->unblock_sess(ddb_entry->sess); goto exit_set_param; } @@ -1167,8 +1311,9 @@ exit_set_param: ret = 0; exit_conn_start: - dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), - fw_ddb_entry, fw_ddb_entry_dma); + if (fw_ddb_entry) + dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), + fw_ddb_entry, fw_ddb_entry_dma); return ret; } @@ -1344,6 +1489,101 @@ static int qla4xxx_task_xmit(struct iscsi_task *task) return -ENOSYS; } +static void qla4xxx_copy_fwddb_param(struct scsi_qla_host *ha, + struct dev_db_entry *fw_ddb_entry, + struct iscsi_cls_session *cls_sess, + struct iscsi_cls_conn *cls_conn) +{ + int buflen = 0; + struct iscsi_session *sess; + struct iscsi_conn *conn; + char ip_addr[DDB_IPADDR_LEN]; + uint16_t options = 0; + + sess = cls_sess->dd_data; + conn = cls_conn->dd_data; + + conn->max_recv_dlength = BYTE_UNITS * + le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len); + + conn->max_xmit_dlength = BYTE_UNITS * + le16_to_cpu(fw_ddb_entry->iscsi_max_snd_data_seg_len); + + sess->initial_r2t_en = + (BIT_10 & le16_to_cpu(fw_ddb_entry->iscsi_options)); + + sess->max_r2t = le16_to_cpu(fw_ddb_entry->iscsi_max_outsnd_r2t); + + sess->imm_data_en = (BIT_11 & le16_to_cpu(fw_ddb_entry->iscsi_options)); + + sess->first_burst = BYTE_UNITS * + le16_to_cpu(fw_ddb_entry->iscsi_first_burst_len); + + sess->max_burst = BYTE_UNITS * + le16_to_cpu(fw_ddb_entry->iscsi_max_burst_len); + + sess->time2wait = le16_to_cpu(fw_ddb_entry->iscsi_def_time2wait); + + sess->time2retain = le16_to_cpu(fw_ddb_entry->iscsi_def_time2retain); + + conn->persistent_port = le16_to_cpu(fw_ddb_entry->port); + + sess->tpgt = le32_to_cpu(fw_ddb_entry->tgt_portal_grp); + + options = le16_to_cpu(fw_ddb_entry->options); + if (options & DDB_OPT_IPV6_DEVICE) + sprintf(ip_addr, "%pI6", fw_ddb_entry->ip_addr); + else + sprintf(ip_addr, "%pI4", fw_ddb_entry->ip_addr); + + iscsi_set_param(cls_conn, ISCSI_PARAM_TARGET_NAME, + (char *)fw_ddb_entry->iscsi_name, buflen); + iscsi_set_param(cls_conn, ISCSI_PARAM_INITIATOR_NAME, + (char *)ha->name_string, buflen); + iscsi_set_param(cls_conn, ISCSI_PARAM_PERSISTENT_ADDRESS, + (char *)ip_addr, buflen); +} + +void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha, + struct ddb_entry *ddb_entry) +{ + struct iscsi_cls_session *cls_sess; + struct iscsi_cls_conn *cls_conn; + uint32_t ddb_state; + dma_addr_t fw_ddb_entry_dma; + struct dev_db_entry *fw_ddb_entry; + + fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), + &fw_ddb_entry_dma, GFP_KERNEL); + if (!fw_ddb_entry) { + ql4_printk(KERN_ERR, ha, + "%s: Unable to allocate dma buffer\n", __func__); + goto exit_session_conn_fwddb_param; + } + + if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, + fw_ddb_entry_dma, NULL, NULL, &ddb_state, + NULL, NULL, NULL) == QLA_ERROR) { + DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed " + "get_ddb_entry for fw_ddb_index %d\n", + ha->host_no, __func__, + ddb_entry->fw_ddb_index)); + goto exit_session_conn_fwddb_param; + } + + cls_sess = ddb_entry->sess; + + cls_conn = ddb_entry->conn; + + /* Update params */ + qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess, cls_conn); + +exit_session_conn_fwddb_param: + if (fw_ddb_entry) + dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), + fw_ddb_entry, fw_ddb_entry_dma); +} + void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, struct ddb_entry *ddb_entry) { @@ -1360,7 +1600,7 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, if (!fw_ddb_entry) { ql4_printk(KERN_ERR, ha, "%s: Unable to allocate dma buffer\n", __func__); - return; + goto exit_session_conn_param; } if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, @@ -1370,7 +1610,7 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, "get_ddb_entry for fw_ddb_index %d\n", ha->host_no, __func__, ddb_entry->fw_ddb_index)); - return; + goto exit_session_conn_param; } cls_sess = ddb_entry->sess; @@ -1379,6 +1619,12 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, cls_conn = ddb_entry->conn; conn = cls_conn->dd_data; + /* Update timers after login */ + ddb_entry->default_relogin_timeout = + le16_to_cpu(fw_ddb_entry->def_timeout); + ddb_entry->default_time2wait = + le16_to_cpu(fw_ddb_entry->iscsi_def_time2wait); + /* Update params */ conn->max_recv_dlength = BYTE_UNITS * le16_to_cpu(fw_ddb_entry->iscsi_max_rcv_data_seg_len); @@ -1407,6 +1653,11 @@ void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, memcpy(sess->initiatorname, ha->name_string, min(sizeof(ha->name_string), sizeof(sess->initiatorname))); + +exit_session_conn_param: + if (fw_ddb_entry) + dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), + fw_ddb_entry, fw_ddb_entry_dma); } /* @@ -1607,6 +1858,9 @@ static void qla4xxx_mem_free(struct scsi_qla_host *ha) vfree(ha->chap_list); ha->chap_list = NULL; + if (ha->fw_ddb_dma_pool) + dma_pool_destroy(ha->fw_ddb_dma_pool); + /* release io space registers */ if (is_qla8022(ha)) { if (ha->nx_pcibase) @@ -1689,6 +1943,16 @@ static int qla4xxx_mem_alloc(struct scsi_qla_host *ha) goto mem_alloc_error_exit; } + ha->fw_ddb_dma_pool = dma_pool_create("ql4_fw_ddb", &ha->pdev->dev, + DDB_DMA_BLOCK_SIZE, 8, 0); + + if (ha->fw_ddb_dma_pool == NULL) { + ql4_printk(KERN_WARNING, ha, + "%s: fw_ddb_dma_pool allocation failed..\n", + __func__); + goto mem_alloc_error_exit; + } + return QLA_SUCCESS; mem_alloc_error_exit: @@ -1800,6 +2064,60 @@ void qla4_8xxx_watchdog(struct scsi_qla_host *ha) } } +void qla4xxx_check_relogin_flash_ddb(struct iscsi_cls_session *cls_sess) +{ + struct iscsi_session *sess; + struct ddb_entry *ddb_entry; + struct scsi_qla_host *ha; + + sess = cls_sess->dd_data; + ddb_entry = sess->dd_data; + ha = ddb_entry->ha; + + if (!(ddb_entry->ddb_type == FLASH_DDB)) + return; + + if (adapter_up(ha) && !test_bit(DF_RELOGIN, &ddb_entry->flags) && + !iscsi_is_session_online(cls_sess)) { + if (atomic_read(&ddb_entry->retry_relogin_timer) != + INVALID_ENTRY) { + if (atomic_read(&ddb_entry->retry_relogin_timer) == + 0) { + atomic_set(&ddb_entry->retry_relogin_timer, + INVALID_ENTRY); + set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); + set_bit(DF_RELOGIN, &ddb_entry->flags); + DEBUG2(ql4_printk(KERN_INFO, ha, + "%s: index [%d] login device\n", + __func__, ddb_entry->fw_ddb_index)); + } else + atomic_dec(&ddb_entry->retry_relogin_timer); + } + } + + /* Wait for relogin to timeout */ + if (atomic_read(&ddb_entry->relogin_timer) && + (atomic_dec_and_test(&ddb_entry->relogin_timer) != 0)) { + /* + * If the relogin times out and the device is + * still NOT ONLINE then try and relogin again. + */ + if (!iscsi_is_session_online(cls_sess)) { + /* Reset retry relogin timer */ + atomic_inc(&ddb_entry->relogin_retry_count); + DEBUG2(ql4_printk(KERN_INFO, ha, + "%s: index[%d] relogin timed out-retrying" + " relogin (%d), retry (%d)\n", __func__, + ddb_entry->fw_ddb_index, + atomic_read(&ddb_entry->relogin_retry_count), + ddb_entry->default_time2wait + 4)); + set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); + atomic_set(&ddb_entry->retry_relogin_timer, + ddb_entry->default_time2wait + 4); + } + } +} + /** * qla4xxx_timer - checks every second for work to do. * @ha: Pointer to host adapter structure. @@ -1809,6 +2127,8 @@ static void qla4xxx_timer(struct scsi_qla_host *ha) int start_dpc = 0; uint16_t w; + iscsi_host_for_each_session(ha->host, qla4xxx_check_relogin_flash_ddb); + /* If we are in the middle of AER/EEH processing * skip any processing and reschedule the timer */ @@ -2078,7 +2398,12 @@ static void qla4xxx_fail_session(struct iscsi_cls_session *cls_session) sess = cls_session->dd_data; ddb_entry = sess->dd_data; ddb_entry->fw_ddb_device_state = DDB_DS_SESSION_FAILED; - iscsi_session_failure(cls_session->dd_data, ISCSI_ERR_CONN_FAILED); + + if (ddb_entry->ddb_type == FLASH_DDB) + iscsi_block_session(ddb_entry->sess); + else + iscsi_session_failure(cls_session->dd_data, + ISCSI_ERR_CONN_FAILED); } /** @@ -2163,7 +2488,7 @@ recover_ha_init_adapter: /* NOTE: AF_ONLINE flag set upon successful completion of * qla4xxx_initialize_adapter */ - status = qla4xxx_initialize_adapter(ha); + status = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); } /* Retry failed adapter initialization, if necessary @@ -2245,17 +2570,108 @@ static void qla4xxx_relogin_devices(struct iscsi_cls_session *cls_session) iscsi_unblock_session(ddb_entry->sess); } else { /* Trigger relogin */ - iscsi_session_failure(cls_session->dd_data, - ISCSI_ERR_CONN_FAILED); + if (ddb_entry->ddb_type == FLASH_DDB) { + if (!test_bit(DF_RELOGIN, &ddb_entry->flags)) + qla4xxx_arm_relogin_timer(ddb_entry); + } else + iscsi_session_failure(cls_session->dd_data, + ISCSI_ERR_CONN_FAILED); } } } +int qla4xxx_unblock_flash_ddb(struct iscsi_cls_session *cls_session) +{ + struct iscsi_session *sess; + struct ddb_entry *ddb_entry; + struct scsi_qla_host *ha; + + sess = cls_session->dd_data; + ddb_entry = sess->dd_data; + ha = ddb_entry->ha; + ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" + " unblock session\n", ha->host_no, __func__, + ddb_entry->fw_ddb_index); + + iscsi_unblock_session(ddb_entry->sess); + + /* Start scan target */ + if (test_bit(AF_ONLINE, &ha->flags)) { + ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" + " start scan\n", ha->host_no, __func__, + ddb_entry->fw_ddb_index); + scsi_queue_work(ha->host, &ddb_entry->sess->scan_work); + } + return QLA_SUCCESS; +} + +int qla4xxx_unblock_ddb(struct iscsi_cls_session *cls_session) +{ + struct iscsi_session *sess; + struct ddb_entry *ddb_entry; + struct scsi_qla_host *ha; + + sess = cls_session->dd_data; + ddb_entry = sess->dd_data; + ha = ddb_entry->ha; + ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" + " unblock user space session\n", ha->host_no, __func__, + ddb_entry->fw_ddb_index); + iscsi_conn_start(ddb_entry->conn); + iscsi_conn_login_event(ddb_entry->conn, + ISCSI_CONN_STATE_LOGGED_IN); + + return QLA_SUCCESS; +} + static void qla4xxx_relogin_all_devices(struct scsi_qla_host *ha) { iscsi_host_for_each_session(ha->host, qla4xxx_relogin_devices); } +static void qla4xxx_relogin_flash_ddb(struct iscsi_cls_session *cls_sess) +{ + uint16_t relogin_timer; + struct iscsi_session *sess; + struct ddb_entry *ddb_entry; + struct scsi_qla_host *ha; + + sess = cls_sess->dd_data; + ddb_entry = sess->dd_data; + ha = ddb_entry->ha; + + relogin_timer = max(ddb_entry->default_relogin_timeout, + (uint16_t)RELOGIN_TOV); + atomic_set(&ddb_entry->relogin_timer, relogin_timer); + + DEBUG2(ql4_printk(KERN_INFO, ha, + "scsi%ld: Relogin index [%d]. TOV=%d\n", ha->host_no, + ddb_entry->fw_ddb_index, relogin_timer)); + + qla4xxx_login_flash_ddb(cls_sess); +} + +static void qla4xxx_dpc_relogin(struct iscsi_cls_session *cls_sess) +{ + struct iscsi_session *sess; + struct ddb_entry *ddb_entry; + struct scsi_qla_host *ha; + + sess = cls_sess->dd_data; + ddb_entry = sess->dd_data; + ha = ddb_entry->ha; + + if (!(ddb_entry->ddb_type == FLASH_DDB)) + return; + + if (test_and_clear_bit(DF_RELOGIN, &ddb_entry->flags) && + !iscsi_is_session_online(cls_sess)) { + DEBUG2(ql4_printk(KERN_INFO, ha, + "relogin issued\n")); + qla4xxx_relogin_flash_ddb(cls_sess); + } +} + void qla4xxx_wake_dpc(struct scsi_qla_host *ha) { if (ha->dpc_thread) @@ -2356,6 +2772,12 @@ dpc_post_reset_ha: if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags)) qla4xxx_get_dhcp_ip_address(ha); + /* ---- relogin device? --- */ + if (adapter_up(ha) && + test_and_clear_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags)) { + iscsi_host_for_each_session(ha->host, qla4xxx_dpc_relogin); + } + /* ---- link change? --- */ if (test_and_clear_bit(DPC_LINK_CHANGED, &ha->dpc_flags)) { if (!test_bit(AF_LINK_UP, &ha->flags)) { @@ -2368,8 +2790,12 @@ dpc_post_reset_ha: * fatal error recovery. Therefore, the driver must * manually relogin to devices when recovering from * connection failures, logouts, expired KATO, etc. */ - - qla4xxx_relogin_all_devices(ha); + if (test_and_clear_bit(AF_BUILD_DDB_LIST, &ha->flags)) { + qla4xxx_build_ddb_list(ha, ha->is_reset); + iscsi_host_for_each_session(ha->host, + qla4xxx_login_flash_ddb); + } else + qla4xxx_relogin_all_devices(ha); } } } @@ -2867,6 +3293,9 @@ static int get_fw_boot_info(struct scsi_qla_host *ha, uint16_t ddb_index[]) " target ID %d\n", __func__, ddb_index[0], ddb_index[1])); + ha->pri_ddb_idx = ddb_index[0]; + ha->sec_ddb_idx = ddb_index[1]; + exit_boot_info_free: dma_free_coherent(&ha->pdev->dev, size, buf, buf_dma); exit_boot_info: @@ -3034,6 +3463,9 @@ static int qla4xxx_get_boot_info(struct scsi_qla_host *ha) return ret; } + if (ql4xdisablesysfsboot) + return QLA_SUCCESS; + if (ddb_index[0] == 0xffff) goto sec_target; @@ -3066,7 +3498,15 @@ static int qla4xxx_setup_boot_info(struct scsi_qla_host *ha) struct iscsi_boot_kobj *boot_kobj; if (qla4xxx_get_boot_info(ha) != QLA_SUCCESS) - return 0; + return QLA_ERROR; + + if (ql4xdisablesysfsboot) { + ql4_printk(KERN_INFO, ha, + "%s: syfsboot disabled - driver will trigger login" + "and publish session for discovery .\n", __func__); + return QLA_SUCCESS; + } + ha->boot_kset = iscsi_boot_create_host_kset(ha->host->host_no); if (!ha->boot_kset) @@ -3108,7 +3548,7 @@ static int qla4xxx_setup_boot_info(struct scsi_qla_host *ha) if (!boot_kobj) goto put_host; - return 0; + return QLA_SUCCESS; put_host: scsi_host_put(ha->host); @@ -3174,9 +3614,507 @@ static void qla4xxx_create_chap_list(struct scsi_qla_host *ha) exit_chap_list: dma_free_coherent(&ha->pdev->dev, chap_size, chap_flash_data, chap_dma); - return; } +static void qla4xxx_get_param_ddb(struct ddb_entry *ddb_entry, + struct ql4_tuple_ddb *tddb) +{ + struct scsi_qla_host *ha; + struct iscsi_cls_session *cls_sess; + struct iscsi_cls_conn *cls_conn; + struct iscsi_session *sess; + struct iscsi_conn *conn; + + DEBUG2(printk(KERN_INFO "Func: %s\n", __func__)); + ha = ddb_entry->ha; + cls_sess = ddb_entry->sess; + sess = cls_sess->dd_data; + cls_conn = ddb_entry->conn; + conn = cls_conn->dd_data; + + tddb->tpgt = sess->tpgt; + tddb->port = conn->persistent_port; + strncpy(tddb->iscsi_name, sess->targetname, ISCSI_NAME_SIZE); + strncpy(tddb->ip_addr, conn->persistent_address, DDB_IPADDR_LEN); +} + +static void qla4xxx_convert_param_ddb(struct dev_db_entry *fw_ddb_entry, + struct ql4_tuple_ddb *tddb) +{ + uint16_t options = 0; + + tddb->tpgt = le32_to_cpu(fw_ddb_entry->tgt_portal_grp); + memcpy(&tddb->iscsi_name[0], &fw_ddb_entry->iscsi_name[0], + min(sizeof(tddb->iscsi_name), sizeof(fw_ddb_entry->iscsi_name))); + + options = le16_to_cpu(fw_ddb_entry->options); + if (options & DDB_OPT_IPV6_DEVICE) + sprintf(tddb->ip_addr, "%pI6", fw_ddb_entry->ip_addr); + else + sprintf(tddb->ip_addr, "%pI4", fw_ddb_entry->ip_addr); + + tddb->port = le16_to_cpu(fw_ddb_entry->port); +} + +static int qla4xxx_compare_tuple_ddb(struct scsi_qla_host *ha, + struct ql4_tuple_ddb *old_tddb, + struct ql4_tuple_ddb *new_tddb) +{ + if (strcmp(old_tddb->iscsi_name, new_tddb->iscsi_name)) + return QLA_ERROR; + + if (strcmp(old_tddb->ip_addr, new_tddb->ip_addr)) + return QLA_ERROR; + + if (old_tddb->port != new_tddb->port) + return QLA_ERROR; + + DEBUG2(ql4_printk(KERN_INFO, ha, + "Match Found, fw[%d,%d,%s,%s], [%d,%d,%s,%s]", + old_tddb->port, old_tddb->tpgt, old_tddb->ip_addr, + old_tddb->iscsi_name, new_tddb->port, new_tddb->tpgt, + new_tddb->ip_addr, new_tddb->iscsi_name)); + + return QLA_SUCCESS; +} + +static int qla4xxx_is_session_exists(struct scsi_qla_host *ha, + struct dev_db_entry *fw_ddb_entry) +{ + struct ddb_entry *ddb_entry; + struct ql4_tuple_ddb *fw_tddb = NULL; + struct ql4_tuple_ddb *tmp_tddb = NULL; + int idx; + int ret = QLA_ERROR; + + fw_tddb = vzalloc(sizeof(*fw_tddb)); + if (!fw_tddb) { + DEBUG2(ql4_printk(KERN_WARNING, ha, + "Memory Allocation failed.\n")); + ret = QLA_SUCCESS; + goto exit_check; + } + + tmp_tddb = vzalloc(sizeof(*tmp_tddb)); + if (!tmp_tddb) { + DEBUG2(ql4_printk(KERN_WARNING, ha, + "Memory Allocation failed.\n")); + ret = QLA_SUCCESS; + goto exit_check; + } + + qla4xxx_convert_param_ddb(fw_ddb_entry, fw_tddb); + + for (idx = 0; idx < MAX_DDB_ENTRIES; idx++) { + ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); + if (ddb_entry == NULL) + continue; + + qla4xxx_get_param_ddb(ddb_entry, tmp_tddb); + if (!qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb)) { + ret = QLA_SUCCESS; /* found */ + goto exit_check; + } + } + +exit_check: + if (fw_tddb) + vfree(fw_tddb); + if (tmp_tddb) + vfree(tmp_tddb); + return ret; +} + +static int qla4xxx_is_flash_ddb_exists(struct scsi_qla_host *ha, + struct list_head *list_nt, + struct dev_db_entry *fw_ddb_entry) +{ + struct qla_ddb_index *nt_ddb_idx, *nt_ddb_idx_tmp; + struct ql4_tuple_ddb *fw_tddb = NULL; + struct ql4_tuple_ddb *tmp_tddb = NULL; + int ret = QLA_ERROR; + + fw_tddb = vzalloc(sizeof(*fw_tddb)); + if (!fw_tddb) { + DEBUG2(ql4_printk(KERN_WARNING, ha, + "Memory Allocation failed.\n")); + ret = QLA_SUCCESS; + goto exit_check; + } + + tmp_tddb = vzalloc(sizeof(*tmp_tddb)); + if (!tmp_tddb) { + DEBUG2(ql4_printk(KERN_WARNING, ha, + "Memory Allocation failed.\n")); + ret = QLA_SUCCESS; + goto exit_check; + } + + qla4xxx_convert_param_ddb(fw_ddb_entry, fw_tddb); + + list_for_each_entry_safe(nt_ddb_idx, nt_ddb_idx_tmp, list_nt, list) { + qla4xxx_convert_param_ddb(&nt_ddb_idx->fw_ddb, tmp_tddb); + if (!qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb)) { + ret = QLA_SUCCESS; /* found */ + goto exit_check; + } + } + +exit_check: + if (fw_tddb) + vfree(fw_tddb); + if (tmp_tddb) + vfree(tmp_tddb); + return ret; +} + +static void qla4xxx_free_nt_list(struct list_head *list_nt) +{ + struct qla_ddb_index *nt_ddb_idx, *nt_ddb_idx_tmp; + + /* Free up the normaltargets list */ + list_for_each_entry_safe(nt_ddb_idx, nt_ddb_idx_tmp, list_nt, list) { + list_del_init(&nt_ddb_idx->list); + vfree(nt_ddb_idx); + } + +} + +static struct iscsi_endpoint *qla4xxx_get_ep_fwdb(struct scsi_qla_host *ha, + struct dev_db_entry *fw_ddb_entry) +{ + struct iscsi_endpoint *ep; + struct sockaddr_in *addr; + struct sockaddr_in6 *addr6; + struct sockaddr *dst_addr; + char *ip; + + /* TODO: need to destroy on unload iscsi_endpoint*/ + dst_addr = vmalloc(sizeof(*dst_addr)); + if (!dst_addr) + return NULL; + + if (fw_ddb_entry->options & DDB_OPT_IPV6_DEVICE) { + dst_addr->sa_family = AF_INET6; + addr6 = (struct sockaddr_in6 *)dst_addr; + ip = (char *)&addr6->sin6_addr; + memcpy(ip, fw_ddb_entry->ip_addr, IPv6_ADDR_LEN); + addr6->sin6_port = htons(le16_to_cpu(fw_ddb_entry->port)); + + } else { + dst_addr->sa_family = AF_INET; + addr = (struct sockaddr_in *)dst_addr; + ip = (char *)&addr->sin_addr; + memcpy(ip, fw_ddb_entry->ip_addr, IP_ADDR_LEN); + addr->sin_port = htons(le16_to_cpu(fw_ddb_entry->port)); + } + + ep = qla4xxx_ep_connect(ha->host, dst_addr, 0); + vfree(dst_addr); + return ep; +} + +static int qla4xxx_verify_boot_idx(struct scsi_qla_host *ha, uint16_t idx) +{ + if (ql4xdisablesysfsboot) + return QLA_SUCCESS; + if (idx == ha->pri_ddb_idx || idx == ha->sec_ddb_idx) + return QLA_ERROR; + return QLA_SUCCESS; +} + +static void qla4xxx_setup_flash_ddb_entry(struct scsi_qla_host *ha, + struct ddb_entry *ddb_entry) +{ + ddb_entry->ddb_type = FLASH_DDB; + ddb_entry->fw_ddb_index = INVALID_ENTRY; + ddb_entry->fw_ddb_device_state = DDB_DS_NO_CONNECTION_ACTIVE; + ddb_entry->ha = ha; + ddb_entry->unblock_sess = qla4xxx_unblock_flash_ddb; + ddb_entry->ddb_change = qla4xxx_flash_ddb_change; + + atomic_set(&ddb_entry->retry_relogin_timer, INVALID_ENTRY); + atomic_set(&ddb_entry->relogin_timer, 0); + atomic_set(&ddb_entry->relogin_retry_count, 0); + + ddb_entry->default_relogin_timeout = + le16_to_cpu(ddb_entry->fw_ddb_entry.def_timeout); + ddb_entry->default_time2wait = + le16_to_cpu(ddb_entry->fw_ddb_entry.iscsi_def_time2wait); +} + +static void qla4xxx_wait_for_ip_configuration(struct scsi_qla_host *ha) +{ + uint32_t idx = 0; + uint32_t ip_idx[IP_ADDR_COUNT] = {0, 1, 2, 3}; /* 4 IP interfaces */ + uint32_t sts[MBOX_REG_COUNT]; + uint32_t ip_state; + unsigned long wtime; + int ret; + + wtime = jiffies + (HZ * IP_CONFIG_TOV); + do { + for (idx = 0; idx < IP_ADDR_COUNT; idx++) { + if (ip_idx[idx] == -1) + continue; + + ret = qla4xxx_get_ip_state(ha, 0, ip_idx[idx], sts); + + if (ret == QLA_ERROR) { + ip_idx[idx] = -1; + continue; + } + + ip_state = (sts[1] & IP_STATE_MASK) >> IP_STATE_SHIFT; + + DEBUG2(ql4_printk(KERN_INFO, ha, + "Waiting for IP state for idx = %d, state = 0x%x\n", + ip_idx[idx], ip_state)); + if (ip_state == IP_ADDRSTATE_UNCONFIGURED || + ip_state == IP_ADDRSTATE_INVALID || + ip_state == IP_ADDRSTATE_PREFERRED || + ip_state == IP_ADDRSTATE_DEPRICATED || + ip_state == IP_ADDRSTATE_DISABLING) + ip_idx[idx] = -1; + + } + + /* Break if all IP states checked */ + if ((ip_idx[0] == -1) && + (ip_idx[1] == -1) && + (ip_idx[2] == -1) && + (ip_idx[3] == -1)) + break; + schedule_timeout_uninterruptible(HZ); + } while (time_after(wtime, jiffies)); +} + +void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset) +{ + int max_ddbs; + int ret; + uint32_t idx = 0, next_idx = 0; + uint32_t state = 0, conn_err = 0; + uint16_t conn_id; + struct dev_db_entry *fw_ddb_entry; + struct ddb_entry *ddb_entry = NULL; + dma_addr_t fw_ddb_dma; + struct iscsi_cls_session *cls_sess; + struct iscsi_session *sess; + struct iscsi_cls_conn *cls_conn; + struct iscsi_endpoint *ep; + uint16_t cmds_max = 32, tmo = 0; + uint32_t initial_cmdsn = 0; + struct list_head list_st, list_nt; /* List of sendtargets */ + struct qla_ddb_index *st_ddb_idx, *st_ddb_idx_tmp; + int fw_idx_size; + unsigned long wtime; + struct qla_ddb_index *nt_ddb_idx; + + if (!test_bit(AF_LINK_UP, &ha->flags)) { + set_bit(AF_BUILD_DDB_LIST, &ha->flags); + ha->is_reset = is_reset; + return; + } + max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : + MAX_DEV_DB_ENTRIES; + + fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, + &fw_ddb_dma); + if (fw_ddb_entry == NULL) { + DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); + goto exit_ddb_list; + } + + INIT_LIST_HEAD(&list_st); + INIT_LIST_HEAD(&list_nt); + fw_idx_size = sizeof(struct qla_ddb_index); + + for (idx = 0; idx < max_ddbs; idx = next_idx) { + ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry, + fw_ddb_dma, NULL, + &next_idx, &state, &conn_err, + NULL, &conn_id); + if (ret == QLA_ERROR) + break; + + if (qla4xxx_verify_boot_idx(ha, idx) != QLA_SUCCESS) + goto continue_next_st; + + /* Check if ST, add to the list_st */ + if (strlen((char *) fw_ddb_entry->iscsi_name) != 0) + goto continue_next_st; + + st_ddb_idx = vzalloc(fw_idx_size); + if (!st_ddb_idx) + break; + + st_ddb_idx->fw_ddb_idx = idx; + + list_add_tail(&st_ddb_idx->list, &list_st); +continue_next_st: + if (next_idx == 0) + break; + } + + /* Before issuing conn open mbox, ensure all IPs states are configured + * Note, conn open fails if IPs are not configured + */ + qla4xxx_wait_for_ip_configuration(ha); + + /* Go thru the STs and fire the sendtargets by issuing conn open mbx */ + list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, list) { + qla4xxx_conn_open(ha, st_ddb_idx->fw_ddb_idx); + } + + /* Wait to ensure all sendtargets are done for min 12 sec wait */ + tmo = ((ha->def_timeout < LOGIN_TOV) ? LOGIN_TOV : ha->def_timeout); + DEBUG2(ql4_printk(KERN_INFO, ha, + "Default time to wait for build ddb %d\n", tmo)); + + wtime = jiffies + (HZ * tmo); + do { + list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, + list) { + ret = qla4xxx_get_fwddb_entry(ha, + st_ddb_idx->fw_ddb_idx, + NULL, 0, NULL, &next_idx, + &state, &conn_err, NULL, + NULL); + if (ret == QLA_ERROR) + continue; + + if (state == DDB_DS_NO_CONNECTION_ACTIVE || + state == DDB_DS_SESSION_FAILED) { + list_del_init(&st_ddb_idx->list); + vfree(st_ddb_idx); + } + } + schedule_timeout_uninterruptible(HZ / 10); + } while (time_after(wtime, jiffies)); + + /* Free up the sendtargets list */ + list_for_each_entry_safe(st_ddb_idx, st_ddb_idx_tmp, &list_st, list) { + list_del_init(&st_ddb_idx->list); + vfree(st_ddb_idx); + } + + for (idx = 0; idx < max_ddbs; idx = next_idx) { + ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry, + fw_ddb_dma, NULL, + &next_idx, &state, &conn_err, + NULL, &conn_id); + if (ret == QLA_ERROR) + break; + + if (qla4xxx_verify_boot_idx(ha, idx) != QLA_SUCCESS) + goto continue_next_nt; + + /* Check if NT, then add to list it */ + if (strlen((char *) fw_ddb_entry->iscsi_name) == 0) + goto continue_next_nt; + + if (state == DDB_DS_NO_CONNECTION_ACTIVE || + state == DDB_DS_SESSION_FAILED) { + DEBUG2(ql4_printk(KERN_INFO, ha, + "Adding DDB to session = 0x%x\n", + idx)); + if (is_reset == INIT_ADAPTER) { + nt_ddb_idx = vmalloc(fw_idx_size); + if (!nt_ddb_idx) + break; + + nt_ddb_idx->fw_ddb_idx = idx; + + memcpy(&nt_ddb_idx->fw_ddb, fw_ddb_entry, + sizeof(struct dev_db_entry)); + + if (qla4xxx_is_flash_ddb_exists(ha, &list_nt, + fw_ddb_entry) == QLA_SUCCESS) { + vfree(nt_ddb_idx); + goto continue_next_nt; + } + list_add_tail(&nt_ddb_idx->list, &list_nt); + } else if (is_reset == RESET_ADAPTER) { + if (qla4xxx_is_session_exists(ha, + fw_ddb_entry) == QLA_SUCCESS) + goto continue_next_nt; + } + + /* Create session object, with INVALID_ENTRY, + * the targer_id would get set when we issue the login + */ + cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, + ha->host, cmds_max, + sizeof(struct ddb_entry), + sizeof(struct ql4_task_data), + initial_cmdsn, INVALID_ENTRY); + if (!cls_sess) + goto exit_ddb_list; + + /* + * iscsi_session_setup increments the driver reference + * count which wouldn't let the driver to be unloaded. + * so calling module_put function to decrement the + * reference count. + **/ + module_put(qla4xxx_iscsi_transport.owner); + sess = cls_sess->dd_data; + ddb_entry = sess->dd_data; + ddb_entry->sess = cls_sess; + + cls_sess->recovery_tmo = ql4xsess_recovery_tmo; + memcpy(&ddb_entry->fw_ddb_entry, fw_ddb_entry, + sizeof(struct dev_db_entry)); + + qla4xxx_setup_flash_ddb_entry(ha, ddb_entry); + + cls_conn = iscsi_conn_setup(cls_sess, + sizeof(struct qla_conn), + conn_id); + if (!cls_conn) + goto exit_ddb_list; + + ddb_entry->conn = cls_conn; + + /* Setup ep, for displaying attributes in sysfs */ + ep = qla4xxx_get_ep_fwdb(ha, fw_ddb_entry); + if (ep) { + ep->conn = cls_conn; + cls_conn->ep = ep; + } else { + DEBUG2(ql4_printk(KERN_ERR, ha, + "Unable to get ep\n")); + } + + /* Update sess/conn params */ + qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess, + cls_conn); + + if (is_reset == RESET_ADAPTER) { + iscsi_block_session(cls_sess); + /* Use the relogin path to discover new devices + * by short-circuting the logic of setting + * timer to relogin - instead set the flags + * to initiate login right away. + */ + set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); + set_bit(DF_RELOGIN, &ddb_entry->flags); + } + } +continue_next_nt: + if (next_idx == 0) + break; + } +exit_ddb_list: + qla4xxx_free_nt_list(&list_nt); + if (fw_ddb_entry) + dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); + + qla4xxx_free_ddb_index(ha); +} + + /** * qla4xxx_probe_adapter - callback function to probe HBA * @pdev: pointer to pci_dev structure @@ -3298,7 +4236,7 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, * firmware * NOTE: interrupts enabled upon successful completion */ - status = qla4xxx_initialize_adapter(ha); + status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER); while ((!test_bit(AF_ONLINE, &ha->flags)) && init_retry_count++ < MAX_INIT_RETRIES) { @@ -3319,7 +4257,7 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, if (ha->isp_ops->reset_chip(ha) == QLA_ERROR) continue; - status = qla4xxx_initialize_adapter(ha); + status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER); } if (!test_bit(AF_ONLINE, &ha->flags)) { @@ -3386,12 +4324,16 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev, ha->host_no, ha->firmware_version[0], ha->firmware_version[1], ha->patch_number, ha->build_number); - qla4xxx_create_chap_list(ha); - if (qla4xxx_setup_boot_info(ha)) ql4_printk(KERN_ERR, ha, "%s:ISCSI boot info setup failed\n", __func__); + /* Perform the build ddb list and login to each */ + qla4xxx_build_ddb_list(ha, INIT_ADAPTER); + iscsi_host_for_each_session(ha->host, qla4xxx_login_flash_ddb); + + qla4xxx_create_chap_list(ha); + qla4xxx_create_ifaces(ha); return 0; @@ -3449,6 +4391,38 @@ static void qla4xxx_prevent_other_port_reinit(struct scsi_qla_host *ha) } } +static void qla4xxx_destroy_fw_ddb_session(struct scsi_qla_host *ha) +{ + struct ddb_entry *ddb_entry; + int options; + int idx; + + for (idx = 0; idx < MAX_DDB_ENTRIES; idx++) { + + ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); + if ((ddb_entry != NULL) && + (ddb_entry->ddb_type == FLASH_DDB)) { + + options = LOGOUT_OPTION_CLOSE_SESSION; + if (qla4xxx_session_logout_ddb(ha, ddb_entry, options) + == QLA_ERROR) + ql4_printk(KERN_ERR, ha, "%s: Logout failed\n", + __func__); + + qla4xxx_clear_ddb_entry(ha, ddb_entry->fw_ddb_index); + /* + * we have decremented the reference count of the driver + * when we setup the session to have the driver unload + * to be seamless without actually destroying the + * session + **/ + try_module_get(qla4xxx_iscsi_transport.owner); + iscsi_destroy_endpoint(ddb_entry->conn->ep); + qla4xxx_free_ddb(ha, ddb_entry); + iscsi_session_teardown(ddb_entry->sess); + } + } +} /** * qla4xxx_remove_adapter - calback function to remove adapter. * @pci_dev: PCI device pointer @@ -3465,9 +4439,11 @@ static void __devexit qla4xxx_remove_adapter(struct pci_dev *pdev) /* destroy iface from sysfs */ qla4xxx_destroy_ifaces(ha); - if (ha->boot_kset) + if ((!ql4xdisablesysfsboot) && ha->boot_kset) iscsi_boot_destroy_kset(ha->boot_kset); + qla4xxx_destroy_fw_ddb_session(ha); + scsi_remove_host(ha->host); qla4xxx_free_adapter(ha); @@ -4115,7 +5091,7 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) qla4_8xxx_idc_unlock(ha); clear_bit(AF_FW_RECOVERY, &ha->flags); - rval = qla4xxx_initialize_adapter(ha); + rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); qla4_8xxx_idc_lock(ha); if (rval != QLA_SUCCESS) { @@ -4151,7 +5127,7 @@ static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) if ((qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == QLA82XX_DEV_READY)) { clear_bit(AF_FW_RECOVERY, &ha->flags); - rval = qla4xxx_initialize_adapter(ha); + rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); if (rval == QLA_SUCCESS) { ret = qla4xxx_request_irqs(ha); if (ret) { diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h index c15347d..5254e57 100644 --- a/drivers/scsi/qla4xxx/ql4_version.h +++ b/drivers/scsi/qla4xxx/ql4_version.h @@ -5,4 +5,4 @@ * See LICENSE.qla4xxx for copyright and licensing details. */ -#define QLA4XXX_DRIVER_VERSION "5.02.00-k8" +#define QLA4XXX_DRIVER_VERSION "5.02.00-k9" diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 717ebc9..600d823 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -264,7 +264,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) ret = -ENODEV; goto err0; } - dwc->revision = reg & DWC3_GSNPSREV_MASK; + dwc->revision = reg; dwc3_core_soft_reset(dwc); diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 8efe0fa..1ed56d8 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -1748,7 +1748,7 @@ static int __init at91udc_probe(struct platform_device *pdev) /* rm9200 needs manual D+ pullup; off by default */ if (cpu_is_at91rm9200()) { - if (udc->board.pullup_pin <= 0) { + if (gpio_is_valid(udc->board.pullup_pin)) { DBG("no D+ pullup?\n"); retval = -ENODEV; goto fail0; @@ -1815,7 +1815,7 @@ static int __init at91udc_probe(struct platform_device *pdev) DBG("request irq %d failed\n", udc->udp_irq); goto fail1; } - if (udc->board.vbus_pin > 0) { + if (gpio_is_valid(udc->board.vbus_pin)) { retval = gpio_request(udc->board.vbus_pin, "udc_vbus"); if (retval < 0) { DBG("request vbus pin failed\n"); @@ -1859,10 +1859,10 @@ static int __init at91udc_probe(struct platform_device *pdev) INFO("%s version %s\n", driver_name, DRIVER_VERSION); return 0; fail4: - if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled) + if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled) free_irq(udc->board.vbus_pin, udc); fail3: - if (udc->board.vbus_pin > 0) + if (gpio_is_valid(udc->board.vbus_pin)) gpio_free(udc->board.vbus_pin); fail2: free_irq(udc->udp_irq, udc); @@ -1897,7 +1897,7 @@ static int __exit at91udc_remove(struct platform_device *pdev) device_init_wakeup(&pdev->dev, 0); remove_debug_file(udc); - if (udc->board.vbus_pin > 0) { + if (gpio_is_valid(udc->board.vbus_pin)) { free_irq(udc->board.vbus_pin, udc); gpio_free(udc->board.vbus_pin); } @@ -1941,7 +1941,7 @@ static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) enable_irq_wake(udc->udp_irq); udc->active_suspend = wake; - if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && wake) + if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && wake) enable_irq_wake(udc->board.vbus_pin); return 0; } @@ -1951,7 +1951,7 @@ static int at91udc_resume(struct platform_device *pdev) struct at91_udc *udc = platform_get_drvdata(pdev); unsigned long flags; - if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && + if (gpio_is_valid(udc->board.vbus_pin) && !udc->board.vbus_polled && udc->active_suspend) disable_irq_wake(udc->board.vbus_pin); diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index 596a0b4..4dff83d 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -130,9 +130,6 @@ ep_matches ( num_req_streams = ep_comp->bmAttributes & 0x1f; if (num_req_streams > ep->max_streams) return 0; - /* Update the ep_comp descriptor if needed */ - if (num_req_streams != ep->max_streams) - ep_comp->bmAttributes = ep->max_streams; } } diff --git a/drivers/usb/host/isp1760-if.c b/drivers/usb/host/isp1760-if.c index a7dc1e1..2ac4ac2 100644 --- a/drivers/usb/host/isp1760-if.c +++ b/drivers/usb/host/isp1760-if.c @@ -18,7 +18,7 @@ #include "isp1760-hcd.h" -#ifdef CONFIG_OF +#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) #include <linux/slab.h> #include <linux/of.h> #include <linux/of_platform.h> @@ -31,7 +31,7 @@ #include <linux/pci.h> #endif -#ifdef CONFIG_OF +#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) struct isp1760 { struct usb_hcd *hcd; int rst_gpio; @@ -437,7 +437,7 @@ static int __init isp1760_init(void) ret = platform_driver_register(&isp1760_plat_driver); if (!ret) any_ret = 0; -#ifdef CONFIG_OF +#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) ret = platform_driver_register(&isp1760_of_driver); if (!ret) any_ret = 0; @@ -457,7 +457,7 @@ module_init(isp1760_init); static void __exit isp1760_exit(void) { platform_driver_unregister(&isp1760_plat_driver); -#ifdef CONFIG_OF +#if defined(CONFIG_OF) && defined(CONFIG_OF_IRQ) platform_driver_unregister(&isp1760_of_driver); #endif #ifdef CONFIG_PCI diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 95a9fec..5df0b0e 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -223,7 +223,7 @@ static void ohci_at91_usb_set_power(struct at91_usbh_data *pdata, int port, int if (port < 0 || port >= 2) return; - if (pdata->vbus_pin[port] <= 0) + if (!gpio_is_valid(pdata->vbus_pin[port])) return; gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable); @@ -234,7 +234,7 @@ static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port) if (port < 0 || port >= 2) return -EINVAL; - if (pdata->vbus_pin[port] <= 0) + if (!gpio_is_valid(pdata->vbus_pin[port])) return -EINVAL; return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted; @@ -465,7 +465,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) if (pdata) { for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { - if (pdata->vbus_pin[i] <= 0) + if (!gpio_is_valid(pdata->vbus_pin[i])) continue; gpio_request(pdata->vbus_pin[i], "ohci_vbus"); ohci_at91_usb_set_power(pdata, i, 1); @@ -474,7 +474,7 @@ static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { int ret; - if (pdata->overcurrent_pin[i] <= 0) + if (!gpio_is_valid(pdata->overcurrent_pin[i])) continue; gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent"); @@ -499,14 +499,14 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev) if (pdata) { for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { - if (pdata->vbus_pin[i] <= 0) + if (!gpio_is_valid(pdata->vbus_pin[i])) continue; ohci_at91_usb_set_power(pdata, i, 0); gpio_free(pdata->vbus_pin[i]); } for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { - if (pdata->overcurrent_pin[i] <= 0) + if (!gpio_is_valid(pdata->overcurrent_pin[i])) continue; free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev); gpio_free(pdata->overcurrent_pin[i]); diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c index 60ddba8..79cb0af 100644 --- a/drivers/usb/musb/musb_host.c +++ b/drivers/usb/musb/musb_host.c @@ -774,6 +774,10 @@ static void musb_ep_program(struct musb *musb, u8 epnum, if (musb->double_buffer_not_ok) musb_writew(epio, MUSB_TXMAXP, hw_ep->max_packet_sz_tx); + else if (can_bulk_split(musb, qh->type)) + musb_writew(epio, MUSB_TXMAXP, packet_sz + | ((hw_ep->max_packet_sz_tx / + packet_sz) - 1) << 11); else musb_writew(epio, MUSB_TXMAXP, qh->maxpacket | diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index 87445b2..0056256 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c @@ -35,6 +35,11 @@ #define DRV_NAME "AT91SAM9 Watchdog" +#define wdt_read(field) \ + __raw_readl(at91wdt_private.base + field) +#define wdt_write(field, val) \ + __raw_writel((val), at91wdt_private.base + field) + /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, * use this to convert a watchdog * value from/to milliseconds. @@ -63,6 +68,7 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " static void at91_ping(unsigned long data); static struct { + void __iomem *base; unsigned long next_heartbeat; /* the next_heartbeat for the timer */ unsigned long open; char expect_close; @@ -77,7 +83,7 @@ static struct { */ static inline void at91_wdt_reset(void) { - at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); + wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); } /* @@ -132,7 +138,7 @@ static int at91_wdt_settimeout(unsigned int timeout) unsigned int mr; /* Check if disabled */ - mr = at91_sys_read(AT91_WDT_MR); + mr = wdt_read(AT91_WDT_MR); if (mr & AT91_WDT_WDDIS) { printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n"); return -EIO; @@ -149,7 +155,7 @@ static int at91_wdt_settimeout(unsigned int timeout) | AT91_WDT_WDDBGHLT /* disabled in debug mode */ | AT91_WDT_WDD /* restart at any time */ | (timeout & AT91_WDT_WDV); /* timer value */ - at91_sys_write(AT91_WDT_MR, reg); + wdt_write(AT91_WDT_MR, reg); return 0; } @@ -248,12 +254,22 @@ static struct miscdevice at91wdt_miscdev = { static int __init at91wdt_probe(struct platform_device *pdev) { + struct resource *r; int res; if (at91wdt_miscdev.parent) return -EBUSY; at91wdt_miscdev.parent = &pdev->dev; + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) + return -ENODEV; + at91wdt_private.base = ioremap(r->start, resource_size(r)); + if (!at91wdt_private.base) { + dev_err(&pdev->dev, "failed to map registers, aborting.\n"); + return -ENOMEM; + } + /* Set watchdog */ res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); if (res) diff --git a/drivers/watchdog/at91sam9_wdt.h b/drivers/watchdog/at91sam9_wdt.h index 757f9ca..c6fbb2e6 100644 --- a/drivers/watchdog/at91sam9_wdt.h +++ b/drivers/watchdog/at91sam9_wdt.h @@ -16,11 +16,11 @@ #ifndef AT91_WDT_H #define AT91_WDT_H -#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ +#define AT91_WDT_CR 0x00 /* Watchdog Control Register */ #define AT91_WDT_WDRSTT (1 << 0) /* Restart */ #define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ -#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ +#define AT91_WDT_MR 0x04 /* Watchdog Mode Register */ #define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ #define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ #define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ @@ -30,7 +30,7 @@ #define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ #define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ -#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ +#define AT91_WDT_SR 0x08 /* Watchdog Status Register */ #define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ #define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c index 03f449a..5b89f7d 100644 --- a/drivers/watchdog/coh901327_wdt.c +++ b/drivers/watchdog/coh901327_wdt.c @@ -76,8 +76,6 @@ static int irq; static void __iomem *virtbase; static unsigned long coh901327_users; static unsigned long boot_status; -static u16 wdogenablestore; -static u16 irqmaskstore; static struct device *parent; /* @@ -461,6 +459,10 @@ out: } #ifdef CONFIG_PM + +static u16 wdogenablestore; +static u16 irqmaskstore; + static int coh901327_suspend(struct platform_device *pdev, pm_message_t state) { irqmaskstore = readw(virtbase + U300_WDOG_IMR) & 0x0001U; diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c index 3774c9b..8464ea1 100644 --- a/drivers/watchdog/hpwdt.c +++ b/drivers/watchdog/hpwdt.c @@ -231,6 +231,7 @@ static int __devinit cru_detect(unsigned long map_entry, cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; + set_memory_x((unsigned long)bios32_entrypoint, (2 * PAGE_SIZE)); asminline_call(&cmn_regs, bios32_entrypoint); if (cmn_regs.u1.ral != 0) { @@ -248,8 +249,10 @@ static int __devinit cru_detect(unsigned long map_entry, if ((physical_bios_base + physical_bios_offset)) { cru_rom_addr = ioremap(cru_physical_address, cru_length); - if (cru_rom_addr) + if (cru_rom_addr) { + set_memory_x((unsigned long)cru_rom_addr, cru_length); retval = 0; + } } printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n", diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c index ba6ad66..99796c5 100644 --- a/drivers/watchdog/iTCO_wdt.c +++ b/drivers/watchdog/iTCO_wdt.c @@ -384,10 +384,10 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); -static int turn_SMI_watchdog_clear_off = 0; +static int turn_SMI_watchdog_clear_off = 1; module_param(turn_SMI_watchdog_clear_off, int, 0); MODULE_PARM_DESC(turn_SMI_watchdog_clear_off, - "Turn off SMI clearing watchdog (default=0)"); + "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)"); /* * Some TCO specific functions @@ -813,7 +813,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, ret = -EIO; goto out_unmap; } - if (turn_SMI_watchdog_clear_off) { + if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) { /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ val32 = inl(SMI_EN); val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c index cc2cfbe..bfaf9bb 100644 --- a/drivers/watchdog/sp805_wdt.c +++ b/drivers/watchdog/sp805_wdt.c @@ -351,7 +351,7 @@ static int __devexit sp805_wdt_remove(struct amba_device *adev) return 0; } -static struct amba_id sp805_wdt_ids[] __initdata = { +static struct amba_id sp805_wdt_ids[] = { { .id = 0x00141805, .mask = 0x00ffffff, diff --git a/drivers/xen/xenbus/xenbus_xs.c b/drivers/xen/xenbus/xenbus_xs.c index b3b8f2f..ede860f 100644 --- a/drivers/xen/xenbus/xenbus_xs.c +++ b/drivers/xen/xenbus/xenbus_xs.c @@ -621,15 +621,6 @@ static struct xenbus_watch *find_watch(const char *token) return NULL; } -static void xs_reset_watches(void) -{ - int err; - - err = xs_error(xs_single(XBT_NIL, XS_RESET_WATCHES, "", NULL)); - if (err && err != -EEXIST) - printk(KERN_WARNING "xs_reset_watches failed: %d\n", err); -} - /* Register callback to watch this node. */ int register_xenbus_watch(struct xenbus_watch *watch) { @@ -906,9 +897,5 @@ int xs_init(void) if (IS_ERR(task)) return PTR_ERR(task); - /* shutdown watches for kexec boot */ - if (xen_hvm_domain()) - xs_reset_watches(); - return 0; } diff --git a/firmware/README.AddingFirmware b/firmware/README.AddingFirmware index e24cd89..ea78c3a 100644 --- a/firmware/README.AddingFirmware +++ b/firmware/README.AddingFirmware @@ -12,7 +12,7 @@ here. This directory is _NOT_ for adding arbitrary new firmware images. The place to add those is the separate linux-firmware repository: - git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git + git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git That repository contains all these firmware images which have been extracted from older drivers, as well various new firmware images which @@ -22,6 +22,7 @@ been permitted to redistribute under separate cover. To submit firmware to that repository, please send either a git binary diff or preferably a git pull request to: David Woodhouse <dwmw2@infradead.org> + Ben Hutchings <ben@decadent.org.uk> Your commit should include an update to the WHENCE file clearly identifying the licence under which the firmware is available, and diff --git a/fs/btrfs/async-thread.c b/fs/btrfs/async-thread.c index cb97174..0b39458 100644 --- a/fs/btrfs/async-thread.c +++ b/fs/btrfs/async-thread.c @@ -563,8 +563,8 @@ static struct btrfs_worker_thread *find_worker(struct btrfs_workers *workers) struct list_head *fallback; int ret; -again: spin_lock_irqsave(&workers->lock, flags); +again: worker = next_worker(workers); if (!worker) { @@ -579,6 +579,7 @@ again: spin_unlock_irqrestore(&workers->lock, flags); /* we're below the limit, start another worker */ ret = __btrfs_start_workers(workers); + spin_lock_irqsave(&workers->lock, flags); if (ret) goto fallback; goto again; diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index 0a6b928..fd1a06d 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c @@ -4590,10 +4590,6 @@ static int btrfs_add_nondir(struct btrfs_trans_handle *trans, int err = btrfs_add_link(trans, dir, inode, dentry->d_name.name, dentry->d_name.len, backref, index); - if (!err) { - d_instantiate(dentry, inode); - return 0; - } if (err > 0) err = -EEXIST; return err; @@ -4655,6 +4651,7 @@ static int btrfs_mknod(struct inode *dir, struct dentry *dentry, else { init_special_inode(inode, inode->i_mode, rdev); btrfs_update_inode(trans, root, inode); + d_instantiate(dentry, inode); } out_unlock: nr = trans->blocks_used; @@ -4722,6 +4719,7 @@ static int btrfs_create(struct inode *dir, struct dentry *dentry, inode->i_mapping->a_ops = &btrfs_aops; inode->i_mapping->backing_dev_info = &root->fs_info->bdi; BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops; + d_instantiate(dentry, inode); } out_unlock: nr = trans->blocks_used; @@ -4779,6 +4777,7 @@ static int btrfs_link(struct dentry *old_dentry, struct inode *dir, struct dentry *parent = dentry->d_parent; err = btrfs_update_inode(trans, root, inode); BUG_ON(err); + d_instantiate(dentry, inode); btrfs_log_new_name(trans, inode, NULL, parent); } @@ -7245,6 +7244,8 @@ static int btrfs_symlink(struct inode *dir, struct dentry *dentry, drop_inode = 1; out_unlock: + if (!err) + d_instantiate(dentry, inode); nr = trans->blocks_used; btrfs_end_transaction_throttle(trans, root); if (drop_inode) { diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c index 3eeb976..9895400 100644 --- a/fs/ceph/dir.c +++ b/fs/ceph/dir.c @@ -1094,42 +1094,19 @@ static int ceph_snapdir_d_revalidate(struct dentry *dentry, /* * Set/clear/test dir complete flag on the dir's dentry. */ -static struct dentry * __d_find_any_alias(struct inode *inode) -{ - struct dentry *alias; - - if (list_empty(&inode->i_dentry)) - return NULL; - alias = list_first_entry(&inode->i_dentry, struct dentry, d_alias); - return alias; -} - void ceph_dir_set_complete(struct inode *inode) { - struct dentry *dentry = __d_find_any_alias(inode); - - if (dentry && ceph_dentry(dentry)) { - dout(" marking %p (%p) complete\n", inode, dentry); - set_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags); - } + /* not yet implemented */ } void ceph_dir_clear_complete(struct inode *inode) { - struct dentry *dentry = __d_find_any_alias(inode); - - if (dentry && ceph_dentry(dentry)) { - dout(" marking %p (%p) NOT complete\n", inode, dentry); - clear_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags); - } + /* not yet implemented */ } bool ceph_dir_test_complete(struct inode *inode) { - struct dentry *dentry = __d_find_any_alias(inode); - - if (dentry && ceph_dentry(dentry)) - return test_bit(CEPH_D_COMPLETE, &ceph_dentry(dentry)->flags); + /* not yet implemented */ return false; } diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index ac86f8b..517f211 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -47,17 +47,6 @@ struct wb_writeback_work { struct completion *done; /* set if the caller waits */ }; -const char *wb_reason_name[] = { - [WB_REASON_BACKGROUND] = "background", - [WB_REASON_TRY_TO_FREE_PAGES] = "try_to_free_pages", - [WB_REASON_SYNC] = "sync", - [WB_REASON_PERIODIC] = "periodic", - [WB_REASON_LAPTOP_TIMER] = "laptop_timer", - [WB_REASON_FREE_MORE_MEM] = "free_more_memory", - [WB_REASON_FS_FREE_SPACE] = "fs_free_space", - [WB_REASON_FORKER_THREAD] = "forker_thread" -}; - /* * Include the creation of the trace points after defining the * wb_writeback_work structure so that the definition remains local to this @@ -1205,6 +1205,8 @@ int __break_lease(struct inode *inode, unsigned int mode) int want_write = (mode & O_ACCMODE) != O_RDONLY; new_fl = lease_alloc(NULL, want_write ? F_WRLCK : F_RDLCK); + if (IS_ERR(new_fl)) + return PTR_ERR(new_fl); lock_flocks(); @@ -1221,12 +1223,6 @@ int __break_lease(struct inode *inode, unsigned int mode) if (fl->fl_owner == current->files) i_have_this_lease = 1; - if (IS_ERR(new_fl) && !i_have_this_lease - && ((mode & O_NONBLOCK) == 0)) { - error = PTR_ERR(new_fl); - goto out; - } - break_time = 0; if (lease_break_time > 0) { break_time = jiffies + lease_break_time * HZ; @@ -1284,8 +1280,7 @@ restart: out: unlock_flocks(); - if (!IS_ERR(new_fl)) - locks_free_lock(new_fl); + locks_free_lock(new_fl); return error; } diff --git a/fs/nfs/file.c b/fs/nfs/file.c index eca56d4..606ef0f 100644 --- a/fs/nfs/file.c +++ b/fs/nfs/file.c @@ -147,7 +147,7 @@ static loff_t nfs_file_llseek(struct file *filp, loff_t offset, int origin) * origin == SEEK_END || SEEK_DATA || SEEK_HOLE => we must revalidate * the cached file length */ - if (origin != SEEK_SET || origin != SEEK_CUR) { + if (origin != SEEK_SET && origin != SEEK_CUR) { struct inode *inode = filp->f_mapping->host; int retval = nfs_revalidate_file_size(inode, filp); diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c index be2bbac..d9f4d78 100644 --- a/fs/nfs/nfs4proc.c +++ b/fs/nfs/nfs4proc.c @@ -39,6 +39,8 @@ #include <linux/delay.h> #include <linux/errno.h> #include <linux/string.h> +#include <linux/ratelimit.h> +#include <linux/printk.h> #include <linux/slab.h> #include <linux/sunrpc/clnt.h> #include <linux/sunrpc/gss_api.h> @@ -894,6 +896,8 @@ out: static int can_open_delegated(struct nfs_delegation *delegation, fmode_t fmode) { + if (delegation == NULL) + return 0; if ((delegation->type & fmode) != fmode) return 0; if (test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags)) @@ -1036,8 +1040,7 @@ static struct nfs4_state *nfs4_try_open_cached(struct nfs4_opendata *opendata) } rcu_read_lock(); delegation = rcu_dereference(nfsi->delegation); - if (delegation == NULL || - !can_open_delegated(delegation, fmode)) { + if (!can_open_delegated(delegation, fmode)) { rcu_read_unlock(); break; } @@ -1091,7 +1094,12 @@ static struct nfs4_state *nfs4_opendata_to_nfs4_state(struct nfs4_opendata *data if (delegation) delegation_flags = delegation->flags; rcu_read_unlock(); - if ((delegation_flags & 1UL<<NFS_DELEGATION_NEED_RECLAIM) == 0) + if (data->o_arg.claim == NFS4_OPEN_CLAIM_DELEGATE_CUR) { + pr_err_ratelimited("NFS: Broken NFSv4 server %s is " + "returning a delegation for " + "OPEN(CLAIM_DELEGATE_CUR)\n", + NFS_CLIENT(inode)->cl_server); + } else if ((delegation_flags & 1UL<<NFS_DELEGATION_NEED_RECLAIM) == 0) nfs_inode_set_delegation(state->inode, data->owner->so_cred, &data->o_res); @@ -1423,11 +1431,9 @@ static void nfs4_open_prepare(struct rpc_task *task, void *calldata) goto out_no_action; rcu_read_lock(); delegation = rcu_dereference(NFS_I(data->state->inode)->delegation); - if (delegation != NULL && - test_bit(NFS_DELEGATION_NEED_RECLAIM, &delegation->flags) == 0) { - rcu_read_unlock(); - goto out_no_action; - } + if (data->o_arg.claim != NFS4_OPEN_CLAIM_DELEGATE_CUR && + can_open_delegated(delegation, data->o_arg.fmode)) + goto unlock_no_action; rcu_read_unlock(); } /* Update sequence id. */ @@ -1444,6 +1450,8 @@ static void nfs4_open_prepare(struct rpc_task *task, void *calldata) return; rpc_call_start(task); return; +unlock_no_action: + rcu_read_unlock(); out_no_action: task->tk_action = NULL; diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c index 39914be..6a7107a 100644 --- a/fs/nfs/nfs4state.c +++ b/fs/nfs/nfs4state.c @@ -1156,11 +1156,13 @@ restart: if (status >= 0) { status = nfs4_reclaim_locks(state, ops); if (status >= 0) { + spin_lock(&state->state_lock); list_for_each_entry(lock, &state->lock_states, ls_locks) { if (!(lock->ls_flags & NFS_LOCK_INITIALIZED)) printk("%s: Lock reclaim failed!\n", __func__); } + spin_unlock(&state->state_lock); nfs4_put_open_state(state); goto restart; } @@ -1224,10 +1226,12 @@ static void nfs4_clear_open_state(struct nfs4_state *state) clear_bit(NFS_O_RDONLY_STATE, &state->flags); clear_bit(NFS_O_WRONLY_STATE, &state->flags); clear_bit(NFS_O_RDWR_STATE, &state->flags); + spin_lock(&state->state_lock); list_for_each_entry(lock, &state->lock_states, ls_locks) { lock->ls_seqid.flags = 0; lock->ls_flags &= ~NFS_LOCK_INITIALIZED; } + spin_unlock(&state->state_lock); } static void nfs4_reset_seqids(struct nfs_server *server, @@ -1350,12 +1354,14 @@ static void nfs4_warn_keyexpired(const char *s) static int nfs4_recovery_handle_error(struct nfs_client *clp, int error) { switch (error) { + case 0: + break; case -NFS4ERR_CB_PATH_DOWN: nfs_handle_cb_pathdown(clp); - return 0; + break; case -NFS4ERR_NO_GRACE: nfs4_state_end_reclaim_reboot(clp); - return 0; + break; case -NFS4ERR_STALE_CLIENTID: case -NFS4ERR_LEASE_MOVED: set_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state); @@ -1375,13 +1381,15 @@ static int nfs4_recovery_handle_error(struct nfs_client *clp, int error) case -NFS4ERR_SEQ_MISORDERED: set_bit(NFS4CLNT_SESSION_RESET, &clp->cl_state); /* Zero session reset errors */ - return 0; + break; case -EKEYEXPIRED: /* Nothing we can do */ nfs4_warn_keyexpired(clp->cl_hostname); - return 0; + break; + default: + return error; } - return error; + return 0; } static int nfs4_do_reclaim(struct nfs_client *clp, const struct nfs4_state_recovery_ops *ops) @@ -1428,7 +1436,7 @@ static int nfs4_check_lease(struct nfs_client *clp) struct rpc_cred *cred; const struct nfs4_state_maintenance_ops *ops = clp->cl_mvops->state_renewal_ops; - int status = -NFS4ERR_EXPIRED; + int status; /* Is the client already known to have an expired lease? */ if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) @@ -1438,6 +1446,7 @@ static int nfs4_check_lease(struct nfs_client *clp) spin_unlock(&clp->cl_lock); if (cred == NULL) { cred = nfs4_get_setclientid_cred(clp); + status = -ENOKEY; if (cred == NULL) goto out; } @@ -1525,16 +1534,16 @@ void nfs41_handle_sequence_flag_errors(struct nfs_client *clp, u32 flags) { if (!flags) return; - else if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED) + if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED) nfs41_handle_server_reboot(clp); - else if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED | + if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED | SEQ4_STATUS_EXPIRED_SOME_STATE_REVOKED | SEQ4_STATUS_ADMIN_STATE_REVOKED | SEQ4_STATUS_LEASE_MOVED)) nfs41_handle_state_revoked(clp); - else if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED) + if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED) nfs41_handle_recallable_state_revoked(clp); - else if (flags & (SEQ4_STATUS_CB_PATH_DOWN | + if (flags & (SEQ4_STATUS_CB_PATH_DOWN | SEQ4_STATUS_BACKCHANNEL_FAULT | SEQ4_STATUS_CB_PATH_DOWN_SESSION)) nfs41_handle_cb_path_down(clp); @@ -1662,10 +1671,10 @@ static void nfs4_state_manager(struct nfs_client *clp) if (test_and_clear_bit(NFS4CLNT_CHECK_LEASE, &clp->cl_state)) { status = nfs4_check_lease(clp); + if (status < 0) + goto out_error; if (test_bit(NFS4CLNT_LEASE_EXPIRED, &clp->cl_state)) continue; - if (status < 0 && status != -NFS4ERR_CB_PATH_DOWN) - goto out_error; } /* Initialize or reset the session */ diff --git a/fs/nilfs2/ioctl.c b/fs/nilfs2/ioctl.c index 41d6743..ac258be 100644 --- a/fs/nilfs2/ioctl.c +++ b/fs/nilfs2/ioctl.c @@ -625,6 +625,9 @@ static int nilfs_ioctl_clean_segments(struct inode *inode, struct file *filp, if (argv[n].v_nmembs > nsegs * nilfs->ns_blocks_per_segment) goto out_free; + if (argv[n].v_nmembs >= UINT_MAX / argv[n].v_size) + goto out_free; + len = argv[n].v_size * argv[n].v_nmembs; base = (void __user *)(unsigned long)argv[n].v_base; if (len == 0) { @@ -842,6 +845,19 @@ long nilfs_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) case FS_IOC32_GETVERSION: cmd = FS_IOC_GETVERSION; break; + case NILFS_IOCTL_CHANGE_CPMODE: + case NILFS_IOCTL_DELETE_CHECKPOINT: + case NILFS_IOCTL_GET_CPINFO: + case NILFS_IOCTL_GET_CPSTAT: + case NILFS_IOCTL_GET_SUINFO: + case NILFS_IOCTL_GET_SUSTAT: + case NILFS_IOCTL_GET_VINFO: + case NILFS_IOCTL_GET_BDESCS: + case NILFS_IOCTL_CLEAN_SEGMENTS: + case NILFS_IOCTL_SYNC: + case NILFS_IOCTL_RESIZE: + case NILFS_IOCTL_SET_ALLOC_RANGE: + break; default: return -ENOIOCTLCMD; } diff --git a/fs/proc/stat.c b/fs/proc/stat.c index 2a30d67..0855e6f 100644 --- a/fs/proc/stat.c +++ b/fs/proc/stat.c @@ -32,7 +32,7 @@ static cputime64_t get_idle_time(int cpu) idle = kstat_cpu(cpu).cpustat.idle; idle = cputime64_add(idle, arch_idle_time(cpu)); } else - idle = nsecs_to_jiffies64(1000 * idle_time); + idle = usecs_to_cputime64(idle_time); return idle; } @@ -46,7 +46,7 @@ static cputime64_t get_iowait_time(int cpu) /* !NO_HZ so we can rely on cpustat.iowait */ iowait = kstat_cpu(cpu).cpustat.iowait; else - iowait = nsecs_to_jiffies64(1000 * iowait_time); + iowait = usecs_to_cputime64(iowait_time); return iowait; } diff --git a/fs/xfs/xfs_super.c b/fs/xfs/xfs_super.c index 3eca58f..8a89949 100644 --- a/fs/xfs/xfs_super.c +++ b/fs/xfs/xfs_super.c @@ -869,27 +869,6 @@ xfs_fs_dirty_inode( } STATIC int -xfs_log_inode( - struct xfs_inode *ip) -{ - struct xfs_mount *mp = ip->i_mount; - struct xfs_trans *tp; - int error; - - tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS); - error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0); - if (error) { - xfs_trans_cancel(tp, 0); - return error; - } - - xfs_ilock(ip, XFS_ILOCK_EXCL); - xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL); - xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE); - return xfs_trans_commit(tp, 0); -} - -STATIC int xfs_fs_write_inode( struct inode *inode, struct writeback_control *wbc) @@ -902,10 +881,8 @@ xfs_fs_write_inode( if (XFS_FORCED_SHUTDOWN(mp)) return -XFS_ERROR(EIO); - if (!ip->i_update_core) - return 0; - if (wbc->sync_mode == WB_SYNC_ALL) { + if (wbc->sync_mode == WB_SYNC_ALL || wbc->for_kupdate) { /* * Make sure the inode has made it it into the log. Instead * of forcing it all the way to stable storage using a @@ -913,11 +890,14 @@ xfs_fs_write_inode( * ->sync_fs call do that for thus, which reduces the number * of synchronous log forces dramatically. */ - error = xfs_log_inode(ip); + error = xfs_log_dirty_inode(ip, NULL, 0); if (error) goto out; return 0; } else { + if (!ip->i_update_core) + return 0; + /* * We make this non-blocking if the inode is contended, return * EAGAIN to indicate to the caller that they did not succeed. diff --git a/fs/xfs/xfs_sync.c b/fs/xfs/xfs_sync.c index be5c51d..f0994aedc 100644 --- a/fs/xfs/xfs_sync.c +++ b/fs/xfs/xfs_sync.c @@ -336,6 +336,32 @@ xfs_sync_fsdata( return error; } +int +xfs_log_dirty_inode( + struct xfs_inode *ip, + struct xfs_perag *pag, + int flags) +{ + struct xfs_mount *mp = ip->i_mount; + struct xfs_trans *tp; + int error; + + if (!ip->i_update_core) + return 0; + + tp = xfs_trans_alloc(mp, XFS_TRANS_FSYNC_TS); + error = xfs_trans_reserve(tp, 0, XFS_FSYNC_TS_LOG_RES(mp), 0, 0, 0); + if (error) { + xfs_trans_cancel(tp, 0); + return error; + } + + xfs_ilock(ip, XFS_ILOCK_EXCL); + xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL); + xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE); + return xfs_trans_commit(tp, 0); +} + /* * When remounting a filesystem read-only or freezing the filesystem, we have * two phases to execute. This first phase is syncing the data before we @@ -359,6 +385,16 @@ xfs_quiesce_data( { int error, error2 = 0; + /* + * Log all pending size and timestamp updates. The vfs writeback + * code is supposed to do this, but due to its overagressive + * livelock detection it will skip inodes where appending writes + * were written out in the first non-blocking sync phase if their + * completion took long enough that it happened after taking the + * timestamp for the cut-off in the blocking phase. + */ + xfs_inode_ag_iterator(mp, xfs_log_dirty_inode, 0); + xfs_qm_sync(mp, SYNC_TRYLOCK); xfs_qm_sync(mp, SYNC_WAIT); diff --git a/fs/xfs/xfs_sync.h b/fs/xfs/xfs_sync.h index 941202e..fa96547 100644 --- a/fs/xfs/xfs_sync.h +++ b/fs/xfs/xfs_sync.h @@ -34,6 +34,8 @@ void xfs_quiesce_attr(struct xfs_mount *mp); void xfs_flush_inodes(struct xfs_inode *ip); +int xfs_log_dirty_inode(struct xfs_inode *ip, struct xfs_perag *pag, int flags); + int xfs_reclaim_inodes(struct xfs_mount *mp, int mode); int xfs_reclaim_inodes_count(struct xfs_mount *mp); void xfs_reclaim_inodes_nr(struct xfs_mount *mp, int nr_to_scan); diff --git a/include/asm-generic/cputime.h b/include/asm-generic/cputime.h index 62ce682..12a1764f 100644 --- a/include/asm-generic/cputime.h +++ b/include/asm-generic/cputime.h @@ -40,6 +40,7 @@ typedef u64 cputime64_t; */ #define cputime_to_usecs(__ct) jiffies_to_usecs(__ct) #define usecs_to_cputime(__msecs) usecs_to_jiffies(__msecs) +#define usecs_to_cputime64(__msecs) nsecs_to_jiffies64((__msecs) * 1000) /* * Convert cputime to seconds and back. diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index c86c940..081147d 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h @@ -71,7 +71,7 @@ struct timecounter { /** * cyclecounter_cyc2ns - converts cycle counter cycles to nanoseconds - * @tc: Pointer to cycle counter. + * @cc: Pointer to cycle counter. * @cycles: Cycles * * XXX - This could use some mult_lxl_ll() asm optimization. Same code @@ -114,7 +114,7 @@ extern u64 timecounter_read(struct timecounter *tc); * time base as values returned by * timecounter_read() * @tc: Pointer to time counter. - * @cycle: a value returned by tc->cc->read() + * @cycle_tstamp: a value returned by tc->cc->read() * * Cycle counts that are converted correctly as long as they * fall into the interval [-1/2 max cycle count, +1/2 max cycle count], @@ -156,11 +156,12 @@ extern u64 timecounter_cyc2time(struct timecounter *tc, * @mult: cycle to nanosecond multiplier * @shift: cycle to nanosecond divisor (power of two) * @max_idle_ns: max idle time permitted by the clocksource (nsecs) - * @maxadj maximum adjustment value to mult (~11%) + * @maxadj: maximum adjustment value to mult (~11%) * @flags: flags describing special properties * @archdata: arch-specific data * @suspend: suspend function for the clocksource, if necessary * @resume: resume function for the clocksource, if necessary + * @cycle_last: most recent cycle counter value seen by ::read() */ struct clocksource { /* @@ -187,6 +188,7 @@ struct clocksource { void (*suspend)(struct clocksource *cs); void (*resume)(struct clocksource *cs); + /* private: */ #ifdef CONFIG_CLOCKSOURCE_WATCHDOG /* Watchdog related data, used by the framework */ struct list_head wd_list; @@ -261,6 +263,9 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant) /** * clocksource_cyc2ns - converts clocksource cycles to nanoseconds + * @cycles: cycles + * @mult: cycle to nanosecond multiplier + * @shift: cycle to nanosecond divisor (power of two) * * Converts cycles to nanoseconds, using the given mult and shift. * diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 99834e58..bd4272b 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -91,10 +91,11 @@ static inline unsigned int irq_domain_to_irq(struct irq_domain *d, extern void irq_domain_add(struct irq_domain *domain); extern void irq_domain_del(struct irq_domain *domain); + +extern struct irq_domain_ops irq_domain_simple_ops; #endif /* CONFIG_IRQ_DOMAIN */ #if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ) -extern struct irq_domain_ops irq_domain_simple_ops; extern void irq_domain_add_simple(struct device_node *controller, int irq_base); extern void irq_domain_generate_simple(const struct of_device_id *match, u64 phys_base, unsigned int irq_start); diff --git a/include/linux/kvm.h b/include/linux/kvm.h index c3892fc..68e67e5 100644 --- a/include/linux/kvm.h +++ b/include/linux/kvm.h @@ -557,6 +557,7 @@ struct kvm_ppc_pvinfo { #define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ #define KVM_CAP_PPC_PAPR 68 #define KVM_CAP_S390_GMAP 71 +#define KVM_CAP_TSC_DEADLINE_TIMER 72 #ifdef KVM_CAP_IRQ_ROUTING diff --git a/include/linux/lglock.h b/include/linux/lglock.h index f549056..87f402c 100644 --- a/include/linux/lglock.h +++ b/include/linux/lglock.h @@ -22,6 +22,7 @@ #include <linux/spinlock.h> #include <linux/lockdep.h> #include <linux/percpu.h> +#include <linux/cpu.h> /* can make br locks by using local lock for read side, global lock for write */ #define br_lock_init(name) name##_lock_init() @@ -72,9 +73,31 @@ #define DEFINE_LGLOCK(name) \ \ + DEFINE_SPINLOCK(name##_cpu_lock); \ + cpumask_t name##_cpus __read_mostly; \ DEFINE_PER_CPU(arch_spinlock_t, name##_lock); \ DEFINE_LGLOCK_LOCKDEP(name); \ \ + static int \ + name##_lg_cpu_callback(struct notifier_block *nb, \ + unsigned long action, void *hcpu) \ + { \ + switch (action & ~CPU_TASKS_FROZEN) { \ + case CPU_UP_PREPARE: \ + spin_lock(&name##_cpu_lock); \ + cpu_set((unsigned long)hcpu, name##_cpus); \ + spin_unlock(&name##_cpu_lock); \ + break; \ + case CPU_UP_CANCELED: case CPU_DEAD: \ + spin_lock(&name##_cpu_lock); \ + cpu_clear((unsigned long)hcpu, name##_cpus); \ + spin_unlock(&name##_cpu_lock); \ + } \ + return NOTIFY_OK; \ + } \ + static struct notifier_block name##_lg_cpu_notifier = { \ + .notifier_call = name##_lg_cpu_callback, \ + }; \ void name##_lock_init(void) { \ int i; \ LOCKDEP_INIT_MAP(&name##_lock_dep_map, #name, &name##_lock_key, 0); \ @@ -83,6 +106,11 @@ lock = &per_cpu(name##_lock, i); \ *lock = (arch_spinlock_t)__ARCH_SPIN_LOCK_UNLOCKED; \ } \ + register_hotcpu_notifier(&name##_lg_cpu_notifier); \ + get_online_cpus(); \ + for_each_online_cpu(i) \ + cpu_set(i, name##_cpus); \ + put_online_cpus(); \ } \ EXPORT_SYMBOL(name##_lock_init); \ \ @@ -124,9 +152,9 @@ \ void name##_global_lock_online(void) { \ int i; \ - preempt_disable(); \ + spin_lock(&name##_cpu_lock); \ rwlock_acquire(&name##_lock_dep_map, 0, 0, _RET_IP_); \ - for_each_online_cpu(i) { \ + for_each_cpu(i, &name##_cpus) { \ arch_spinlock_t *lock; \ lock = &per_cpu(name##_lock, i); \ arch_spin_lock(lock); \ @@ -137,12 +165,12 @@ void name##_global_unlock_online(void) { \ int i; \ rwlock_release(&name##_lock_dep_map, 1, _RET_IP_); \ - for_each_online_cpu(i) { \ + for_each_cpu(i, &name##_cpus) { \ arch_spinlock_t *lock; \ lock = &per_cpu(name##_lock, i); \ arch_spin_unlock(lock); \ } \ - preempt_enable(); \ + spin_unlock(&name##_cpu_lock); \ } \ EXPORT_SYMBOL(name##_global_unlock_online); \ \ diff --git a/include/linux/platform_data/macb.h b/include/linux/platform_data/macb.h index e7c748f..b081c72 100644 --- a/include/linux/platform_data/macb.h +++ b/include/linux/platform_data/macb.h @@ -10,7 +10,7 @@ struct macb_platform_data { u32 phy_mask; - u8 phy_irq_pin; /* PHY IRQ */ + int phy_irq_pin; /* PHY IRQ */ u8 is_rmii; /* using RMII interface? */ }; diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h index 4bde182..dcdfc2b 100644 --- a/include/linux/vmalloc.h +++ b/include/linux/vmalloc.h @@ -131,6 +131,7 @@ extern long vwrite(char *buf, char *addr, unsigned long count); */ extern rwlock_t vmlist_lock; extern struct vm_struct *vmlist; +extern __init void vm_area_add_early(struct vm_struct *vm); extern __init void vm_area_register_early(struct vm_struct *vm, size_t align); #ifdef CONFIG_SMP diff --git a/include/media/davinci/vpif_types.h b/include/media/davinci/vpif_types.h new file mode 100644 index 0000000..9929b05 --- /dev/null +++ b/include/media/davinci/vpif_types.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2011 Texas Instruments Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation version 2. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef _VPIF_TYPES_H +#define _VPIF_TYPES_H + +#define VPIF_CAPTURE_MAX_CHANNELS 2 + +enum vpif_if_type { + VPIF_IF_BT656, + VPIF_IF_BT1120, + VPIF_IF_RAW_BAYER +}; + +struct vpif_interface { + enum vpif_if_type if_type; + unsigned hd_pol:1; + unsigned vd_pol:1; + unsigned fid_pol:1; +}; + +struct vpif_subdev_info { + const char *name; + struct i2c_board_info board_info; + u32 input; + u32 output; + unsigned can_route:1; + struct vpif_interface vpif_if; +}; + +struct vpif_display_config { + int (*set_clock)(int, int); + struct vpif_subdev_info *subdevinfo; + int subdev_count; + const char **output; + int output_count; + const char *card_name; +}; + +struct vpif_input { + struct v4l2_input input; + const char *subdev_name; +}; + +struct vpif_capture_chan_config { + const struct vpif_input *inputs; + int input_count; +}; + +struct vpif_capture_config { + int (*setup_input_channel_mode)(int); + int (*setup_input_path)(int, const char *); + struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS]; + struct vpif_subdev_info *subdev_info; + int subdev_count; + const char *card_name; +}; +#endif /* _VPIF_TYPES_H */ diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h index b1377b9..5fb2c3d 100644 --- a/include/media/soc_camera.h +++ b/include/media/soc_camera.h @@ -254,7 +254,7 @@ unsigned long soc_camera_apply_board_flags(struct soc_camera_link *icl, static inline struct video_device *soc_camera_i2c_to_vdev(const struct i2c_client *client) { struct v4l2_subdev *sd = i2c_get_clientdata(client); - struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id; + struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd); return icd ? icd->vdev : NULL; } @@ -279,6 +279,11 @@ static inline struct soc_camera_device *soc_camera_from_vbq(const struct videobu return container_of(vq, struct soc_camera_device, vb_vidq); } +static inline u32 soc_camera_grp_id(const struct soc_camera_device *icd) +{ + return (icd->iface << 8) | (icd->devnum + 1); +} + void soc_camera_lock(struct vb2_queue *vq); void soc_camera_unlock(struct vb2_queue *vq); diff --git a/include/net/dst.h b/include/net/dst.h index 6faec1a..75766b4 100644 --- a/include/net/dst.h +++ b/include/net/dst.h @@ -53,6 +53,7 @@ struct dst_entry { #define DST_NOHASH 0x0008 #define DST_NOCACHE 0x0010 #define DST_NOCOUNT 0x0020 +#define DST_NOPEER 0x0040 short error; short obsolete; diff --git a/include/net/flow.h b/include/net/flow.h index a094477..57f15a7 100644 --- a/include/net/flow.h +++ b/include/net/flow.h @@ -207,6 +207,7 @@ extern struct flow_cache_object *flow_cache_lookup( u8 dir, flow_resolve_t resolver, void *ctx); extern void flow_cache_flush(void); +extern void flow_cache_flush_deferred(void); extern atomic_t flow_cache_genid; #endif diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h index 873d5be..e5a7b9a 100644 --- a/include/net/ip_vs.h +++ b/include/net/ip_vs.h @@ -1207,7 +1207,7 @@ extern void ip_vs_control_cleanup(void); extern struct ip_vs_dest * ip_vs_find_dest(struct net *net, int af, const union nf_inet_addr *daddr, __be16 dport, const union nf_inet_addr *vaddr, __be16 vport, - __u16 protocol, __u32 fwmark); + __u16 protocol, __u32 fwmark, __u32 flags); extern struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp); diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index e90e7a9..a15432da 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h @@ -241,6 +241,9 @@ extern struct sctp_globals { * bits is an indicator of when to send and window update SACK. */ int rwnd_update_shift; + + /* Threshold for autoclose timeout, in seconds. */ + unsigned long max_autoclose; } sctp_globals; #define sctp_rto_initial (sctp_globals.rto_initial) @@ -281,6 +284,7 @@ extern struct sctp_globals { #define sctp_auth_enable (sctp_globals.auth_enable) #define sctp_checksum_disable (sctp_globals.checksum_disable) #define sctp_rwnd_upd_shift (sctp_globals.rwnd_update_shift) +#define sctp_max_autoclose (sctp_globals.max_autoclose) /* SCTP Socket type: UDP or TCP style. */ typedef enum { diff --git a/include/net/sock.h b/include/net/sock.h index abb6e0f..32e3937 100644 --- a/include/net/sock.h +++ b/include/net/sock.h @@ -637,12 +637,14 @@ static inline void __sk_add_backlog(struct sock *sk, struct sk_buff *skb) /* * Take into account size of receive queue and backlog queue + * Do not take into account this skb truesize, + * to allow even a single big packet to come. */ static inline bool sk_rcvqueues_full(const struct sock *sk, const struct sk_buff *skb) { unsigned int qsize = sk->sk_backlog.len + atomic_read(&sk->sk_rmem_alloc); - return qsize + skb->truesize > sk->sk_rcvbuf; + return qsize > sk->sk_rcvbuf; } /* The per-socket spinlock must be held here. */ diff --git a/include/scsi/libfcoe.h b/include/scsi/libfcoe.h index d1e95c6..5a35a2a 100644 --- a/include/scsi/libfcoe.h +++ b/include/scsi/libfcoe.h @@ -147,6 +147,7 @@ struct fcoe_ctlr { u8 map_dest; u8 spma; u8 probe_tries; + u8 priority; u8 dest_addr[ETH_ALEN]; u8 ctl_src_addr[ETH_ALEN]; @@ -301,6 +302,7 @@ struct fcoe_percpu_s { * @lport: The associated local port * @fcoe_pending_queue: The pending Rx queue of skbs * @fcoe_pending_queue_active: Indicates if the pending queue is active + * @priority: Packet priority (DCB) * @max_queue_depth: Max queue depth of pending queue * @min_queue_depth: Min queue depth of pending queue * @timer: The queue timer @@ -316,6 +318,7 @@ struct fcoe_port { struct fc_lport *lport; struct sk_buff_head fcoe_pending_queue; u8 fcoe_pending_queue_active; + u8 priority; u32 max_queue_depth; u32 min_queue_depth; struct timer_list timer; diff --git a/include/trace/events/writeback.h b/include/trace/events/writeback.h index b99caa8..99d1d0d 100644 --- a/include/trace/events/writeback.h +++ b/include/trace/events/writeback.h @@ -21,6 +21,16 @@ {I_REFERENCED, "I_REFERENCED"} \ ) +#define WB_WORK_REASON \ + {WB_REASON_BACKGROUND, "background"}, \ + {WB_REASON_TRY_TO_FREE_PAGES, "try_to_free_pages"}, \ + {WB_REASON_SYNC, "sync"}, \ + {WB_REASON_PERIODIC, "periodic"}, \ + {WB_REASON_LAPTOP_TIMER, "laptop_timer"}, \ + {WB_REASON_FREE_MORE_MEM, "free_more_memory"}, \ + {WB_REASON_FS_FREE_SPACE, "fs_free_space"}, \ + {WB_REASON_FORKER_THREAD, "forker_thread"} + struct wb_writeback_work; DECLARE_EVENT_CLASS(writeback_work_class, @@ -55,7 +65,7 @@ DECLARE_EVENT_CLASS(writeback_work_class, __entry->for_kupdate, __entry->range_cyclic, __entry->for_background, - wb_reason_name[__entry->reason] + __print_symbolic(__entry->reason, WB_WORK_REASON) ) ); #define DEFINE_WRITEBACK_WORK_EVENT(name) \ @@ -184,7 +194,8 @@ TRACE_EVENT(writeback_queue_io, __entry->older, /* older_than_this in jiffies */ __entry->age, /* older_than_this in relative milliseconds */ __entry->moved, - wb_reason_name[__entry->reason]) + __print_symbolic(__entry->reason, WB_WORK_REASON) + ) ); TRACE_EVENT(global_dirty_state, diff --git a/include/xen/interface/io/xs_wire.h b/include/xen/interface/io/xs_wire.h index f0b6890..f6f07aa 100644 --- a/include/xen/interface/io/xs_wire.h +++ b/include/xen/interface/io/xs_wire.h @@ -29,8 +29,7 @@ enum xsd_sockmsg_type XS_IS_DOMAIN_INTRODUCED, XS_RESUME, XS_SET_TARGET, - XS_RESTRICT, - XS_RESET_WATCHES + XS_RESTRICT }; #define XS_WRITE_NONE "NONE" diff --git a/kernel/cgroup.c b/kernel/cgroup.c index d9d5648..a184470 100644 --- a/kernel/cgroup.c +++ b/kernel/cgroup.c @@ -2098,11 +2098,6 @@ int cgroup_attach_proc(struct cgroup *cgrp, struct task_struct *leader) continue; /* get old css_set pointer */ task_lock(tsk); - if (tsk->flags & PF_EXITING) { - /* ignore this task if it's going away */ - task_unlock(tsk); - continue; - } oldcg = tsk->cgroups; get_css_set(oldcg); task_unlock(tsk); diff --git a/kernel/cpuset.c b/kernel/cpuset.c index 9fe58c4..0b1712d 100644 --- a/kernel/cpuset.c +++ b/kernel/cpuset.c @@ -123,6 +123,19 @@ static inline struct cpuset *task_cs(struct task_struct *task) struct cpuset, css); } +#ifdef CONFIG_NUMA +static inline bool task_has_mempolicy(struct task_struct *task) +{ + return task->mempolicy; +} +#else +static inline bool task_has_mempolicy(struct task_struct *task) +{ + return false; +} +#endif + + /* bits in struct cpuset flags field */ typedef enum { CS_CPU_EXCLUSIVE, @@ -949,7 +962,7 @@ static void cpuset_migrate_mm(struct mm_struct *mm, const nodemask_t *from, static void cpuset_change_task_nodemask(struct task_struct *tsk, nodemask_t *newmems) { - bool masks_disjoint = !nodes_intersects(*newmems, tsk->mems_allowed); + bool need_loop; repeat: /* @@ -962,6 +975,14 @@ repeat: return; task_lock(tsk); + /* + * Determine if a loop is necessary if another thread is doing + * get_mems_allowed(). If at least one node remains unchanged and + * tsk does not have a mempolicy, then an empty nodemask will not be + * possible when mems_allowed is larger than a word. + */ + need_loop = task_has_mempolicy(tsk) || + !nodes_intersects(*newmems, tsk->mems_allowed); nodes_or(tsk->mems_allowed, tsk->mems_allowed, *newmems); mpol_rebind_task(tsk, newmems, MPOL_REBIND_STEP1); @@ -981,11 +1002,9 @@ repeat: /* * Allocation of memory is very fast, we needn't sleep when waiting - * for the read-side. No wait is necessary, however, if at least one - * node remains unchanged. + * for the read-side. */ - while (masks_disjoint && - ACCESS_ONCE(tsk->mems_allowed_change_disable)) { + while (need_loop && ACCESS_ONCE(tsk->mems_allowed_change_disable)) { task_unlock(tsk); if (!task_curr(tsk)) yield(); diff --git a/kernel/events/core.c b/kernel/events/core.c index d3b9df5..58690af 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -3558,9 +3558,13 @@ static void ring_buffer_wakeup(struct perf_event *event) rcu_read_lock(); rb = rcu_dereference(event->rb); - list_for_each_entry_rcu(event, &rb->event_list, rb_entry) { + if (!rb) + goto unlock; + + list_for_each_entry_rcu(event, &rb->event_list, rb_entry) wake_up_all(&event->waitq); - } + +unlock: rcu_read_unlock(); } diff --git a/kernel/futex.c b/kernel/futex.c index ea87f4d..1614be2 100644 --- a/kernel/futex.c +++ b/kernel/futex.c @@ -314,17 +314,29 @@ again: #endif lock_page(page_head); + + /* + * If page_head->mapping is NULL, then it cannot be a PageAnon + * page; but it might be the ZERO_PAGE or in the gate area or + * in a special mapping (all cases which we are happy to fail); + * or it may have been a good file page when get_user_pages_fast + * found it, but truncated or holepunched or subjected to + * invalidate_complete_page2 before we got the page lock (also + * cases which we are happy to fail). And we hold a reference, + * so refcount care in invalidate_complete_page's remove_mapping + * prevents drop_caches from setting mapping to NULL beneath us. + * + * The case we do have to guard against is when memory pressure made + * shmem_writepage move it from filecache to swapcache beneath us: + * an unlikely race, but we do need to retry for page_head->mapping. + */ if (!page_head->mapping) { + int shmem_swizzled = PageSwapCache(page_head); unlock_page(page_head); put_page(page_head); - /* - * ZERO_PAGE pages don't have a mapping. Avoid a busy loop - * trying to find one. RW mapping would have COW'd (and thus - * have a mapping) so this page is RO and won't ever change. - */ - if ((page_head == ZERO_PAGE(address))) - return -EFAULT; - goto again; + if (shmem_swizzled) + goto again; + return -EFAULT; } /* diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 200ce83..7ca523b 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -143,11 +143,6 @@ int irq_domain_simple_dt_translate(struct irq_domain *d, return 0; } -struct irq_domain_ops irq_domain_simple_ops = { - .dt_translate = irq_domain_simple_dt_translate, -}; -EXPORT_SYMBOL_GPL(irq_domain_simple_ops); - /** * irq_domain_create_simple() - Set up a 'simple' translation range */ @@ -182,3 +177,10 @@ void irq_domain_generate_simple(const struct of_device_id *match, } EXPORT_SYMBOL_GPL(irq_domain_generate_simple); #endif /* CONFIG_OF_IRQ */ + +struct irq_domain_ops irq_domain_simple_ops = { +#ifdef CONFIG_OF_IRQ + .dt_translate = irq_domain_simple_dt_translate, +#endif /* CONFIG_OF_IRQ */ +}; +EXPORT_SYMBOL_GPL(irq_domain_simple_ops); diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c index a78ed27..8a39fa3 100644 --- a/kernel/sched_fair.c +++ b/kernel/sched_fair.c @@ -2352,13 +2352,11 @@ again: if (!smt && (sd->flags & SD_SHARE_CPUPOWER)) continue; - if (!(sd->flags & SD_SHARE_PKG_RESOURCES)) { - if (!smt) { - smt = 1; - goto again; - } + if (smt && !(sd->flags & SD_SHARE_CPUPOWER)) + break; + + if (!(sd->flags & SD_SHARE_PKG_RESOURCES)) break; - } sg = sd->groups; do { @@ -2378,6 +2376,10 @@ next: sg = sg->next; } while (sg != sd->groups); } + if (!smt) { + smt = 1; + goto again; + } done: rcu_read_unlock(); diff --git a/kernel/sysctl_binary.c b/kernel/sysctl_binary.c index 6318b51..a650694 100644 --- a/kernel/sysctl_binary.c +++ b/kernel/sysctl_binary.c @@ -1354,7 +1354,7 @@ static ssize_t binary_sysctl(const int *name, int nlen, fput(file); out_putname: - putname(pathname); + __putname(pathname); out: return result; } diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c index c4eb71c..1ecd6ba 100644 --- a/kernel/time/clockevents.c +++ b/kernel/time/clockevents.c @@ -387,7 +387,6 @@ void clockevents_exchange_device(struct clock_event_device *old, * released list and do a notify add later. */ if (old) { - old->event_handler = clockevents_handle_noop; clockevents_set_mode(old, CLOCK_EVT_MODE_UNUSED); list_del(&old->list); list_add(&old->list, &clockevents_released); diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c index da2f760..d3ad022 100644 --- a/kernel/time/clocksource.c +++ b/kernel/time/clocksource.c @@ -647,7 +647,7 @@ static void clocksource_enqueue(struct clocksource *cs) /** * __clocksource_updatefreq_scale - Used update clocksource with new freq - * @t: clocksource to be registered + * @cs: clocksource to be registered * @scale: Scale factor multiplied against freq to get clocksource hz * @freq: clocksource frequency (cycles per second) divided by scale * @@ -699,7 +699,7 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale); /** * __clocksource_register_scale - Used to install new clocksources - * @t: clocksource to be registered + * @cs: clocksource to be registered * @scale: Scale factor multiplied against freq to get clocksource hz * @freq: clocksource frequency (cycles per second) divided by scale * @@ -727,7 +727,7 @@ EXPORT_SYMBOL_GPL(__clocksource_register_scale); /** * clocksource_register - Used to install new clocksources - * @t: clocksource to be registered + * @cs: clocksource to be registered * * Returns -EBUSY if registration fails, zero otherwise. */ @@ -761,6 +761,8 @@ static void __clocksource_change_rating(struct clocksource *cs, int rating) /** * clocksource_change_rating - Change the rating of a registered clocksource + * @cs: clocksource to be changed + * @rating: new rating */ void clocksource_change_rating(struct clocksource *cs, int rating) { @@ -772,6 +774,7 @@ EXPORT_SYMBOL(clocksource_change_rating); /** * clocksource_unregister - remove a registered clocksource + * @cs: clocksource to be unregistered */ void clocksource_unregister(struct clocksource *cs) { @@ -787,6 +790,7 @@ EXPORT_SYMBOL(clocksource_unregister); /** * sysfs_show_current_clocksources - sysfs interface for current clocksource * @dev: unused + * @attr: unused * @buf: char buffer to be filled with clocksource list * * Provides sysfs interface for listing current clocksource. @@ -807,6 +811,7 @@ sysfs_show_current_clocksources(struct sys_device *dev, /** * sysfs_override_clocksource - interface for manually overriding clocksource * @dev: unused + * @attr: unused * @buf: name of override clocksource * @count: length of buffer * @@ -842,6 +847,7 @@ static ssize_t sysfs_override_clocksource(struct sys_device *dev, /** * sysfs_show_available_clocksources - sysfs interface for listing clocksource * @dev: unused + * @attr: unused * @buf: char buffer to be filled with clocksource list * * Provides sysfs interface for listing registered clocksources diff --git a/mm/filemap.c b/mm/filemap.c index c106d3b..5f0a3c9 100644 --- a/mm/filemap.c +++ b/mm/filemap.c @@ -1828,7 +1828,7 @@ repeat: page = __page_cache_alloc(gfp | __GFP_COLD); if (!page) return ERR_PTR(-ENOMEM); - err = add_to_page_cache_lru(page, mapping, index, GFP_KERNEL); + err = add_to_page_cache_lru(page, mapping, index, gfp); if (unlikely(err)) { page_cache_release(page); if (err == -EEXIST) @@ -1925,10 +1925,7 @@ static struct page *wait_on_page_read(struct page *page) * @gfp: the page allocator flags to use if allocating * * This is the same as "read_mapping_page(mapping, index, NULL)", but with - * any new page allocations done using the specified allocation flags. Note - * that the Radix tree operations will still use GFP_KERNEL, so you can't - * expect to do this atomically or anything like that - but you can pass in - * other page requirements. + * any new page allocations done using the specified allocation flags. * * If the page does not get brought uptodate, return -EIO. */ diff --git a/mm/hugetlb.c b/mm/hugetlb.c index 73f17c0..2316840 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c @@ -901,7 +901,6 @@ retry: h->resv_huge_pages += delta; ret = 0; - spin_unlock(&hugetlb_lock); /* Free the needed pages to the hugetlb pool */ list_for_each_entry_safe(page, tmp, &surplus_list, lru) { if ((--needed) < 0) @@ -915,6 +914,7 @@ retry: VM_BUG_ON(page_count(page)); enqueue_huge_page(h, page); } + spin_unlock(&hugetlb_lock); /* Free unnecessary surplus pages to the buddy allocator */ free: diff --git a/mm/memcontrol.c b/mm/memcontrol.c index 6aff93c..b63f5f7 100644 --- a/mm/memcontrol.c +++ b/mm/memcontrol.c @@ -4907,9 +4907,9 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont) int cpu; enable_swap_cgroup(); parent = NULL; - root_mem_cgroup = memcg; if (mem_cgroup_soft_limit_tree_init()) goto free_out; + root_mem_cgroup = memcg; for_each_possible_cpu(cpu) { struct memcg_stock_pcp *stock = &per_cpu(memcg_stock, cpu); @@ -4948,7 +4948,6 @@ mem_cgroup_create(struct cgroup_subsys *ss, struct cgroup *cont) return &memcg->css; free_out: __mem_cgroup_free(memcg); - root_mem_cgroup = NULL; return ERR_PTR(error); } diff --git a/mm/mempolicy.c b/mm/mempolicy.c index adc3954..c3fdbcb 100644 --- a/mm/mempolicy.c +++ b/mm/mempolicy.c @@ -636,6 +636,7 @@ static int mbind_range(struct mm_struct *mm, unsigned long start, struct vm_area_struct *prev; struct vm_area_struct *vma; int err = 0; + pgoff_t pgoff; unsigned long vmstart; unsigned long vmend; @@ -643,13 +644,21 @@ static int mbind_range(struct mm_struct *mm, unsigned long start, if (!vma || vma->vm_start > start) return -EFAULT; + if (start > vma->vm_start) + prev = vma; + for (; vma && vma->vm_start < end; prev = vma, vma = next) { next = vma->vm_next; vmstart = max(start, vma->vm_start); vmend = min(end, vma->vm_end); + if (mpol_equal(vma_policy(vma), new_pol)) + continue; + + pgoff = vma->vm_pgoff + + ((vmstart - vma->vm_start) >> PAGE_SHIFT); prev = vma_merge(mm, prev, vmstart, vmend, vma->vm_flags, - vma->anon_vma, vma->vm_file, vma->vm_pgoff, + vma->anon_vma, vma->vm_file, pgoff, new_pol); if (prev) { vma = prev; diff --git a/mm/oom_kill.c b/mm/oom_kill.c index 76f2c5a..069b64e 100644 --- a/mm/oom_kill.c +++ b/mm/oom_kill.c @@ -176,7 +176,7 @@ static bool oom_unkillable_task(struct task_struct *p, unsigned int oom_badness(struct task_struct *p, struct mem_cgroup *mem, const nodemask_t *nodemask, unsigned long totalpages) { - int points; + long points; if (oom_unkillable_task(p, mem, nodemask)) return 0; diff --git a/mm/percpu.c b/mm/percpu.c index 3bb810a..716eb4a 100644 --- a/mm/percpu.c +++ b/mm/percpu.c @@ -1023,9 +1023,11 @@ phys_addr_t per_cpu_ptr_to_phys(void *addr) if (!is_vmalloc_addr(addr)) return __pa(addr); else - return page_to_phys(vmalloc_to_page(addr)); + return page_to_phys(vmalloc_to_page(addr)) + + offset_in_page(addr); } else - return page_to_phys(pcpu_addr_to_page(addr)); + return page_to_phys(pcpu_addr_to_page(addr)) + + offset_in_page(addr); } /** diff --git a/mm/vmalloc.c b/mm/vmalloc.c index 1d8b32f..21fdf46 100644 --- a/mm/vmalloc.c +++ b/mm/vmalloc.c @@ -1118,6 +1118,32 @@ void *vm_map_ram(struct page **pages, unsigned int count, int node, pgprot_t pro EXPORT_SYMBOL(vm_map_ram); /** + * vm_area_add_early - add vmap area early during boot + * @vm: vm_struct to add + * + * This function is used to add fixed kernel vm area to vmlist before + * vmalloc_init() is called. @vm->addr, @vm->size, and @vm->flags + * should contain proper values and the other fields should be zero. + * + * DO NOT USE THIS FUNCTION UNLESS YOU KNOW WHAT YOU'RE DOING. + */ +void __init vm_area_add_early(struct vm_struct *vm) +{ + struct vm_struct *tmp, **p; + + BUG_ON(vmap_initialized); + for (p = &vmlist; (tmp = *p) != NULL; p = &tmp->next) { + if (tmp->addr >= vm->addr) { + BUG_ON(tmp->addr < vm->addr + vm->size); + break; + } else + BUG_ON(tmp->addr + tmp->size > vm->addr); + } + vm->next = *p; + *p = vm; +} + +/** * vm_area_register_early - register vmap area early during boot * @vm: vm_struct to register * @align: requested alignment @@ -1139,8 +1165,7 @@ void __init vm_area_register_early(struct vm_struct *vm, size_t align) vm->addr = (void *)addr; - vm->next = vmlist; - vmlist = vm; + vm_area_add_early(vm); } void __init vmalloc_init(void) @@ -1290,7 +1315,7 @@ static struct vm_struct *__get_vm_area_node(unsigned long size, unsigned long align, unsigned long flags, unsigned long start, unsigned long end, int node, gfp_t gfp_mask, void *caller) { - static struct vmap_area *va; + struct vmap_area *va; struct vm_struct *area; BUG_ON(in_interrupt()); diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c index e0af723..c1c597e 100644 --- a/net/bluetooth/hci_conn.c +++ b/net/bluetooth/hci_conn.c @@ -673,7 +673,7 @@ int hci_conn_security(struct hci_conn *conn, __u8 sec_level, __u8 auth_type) goto encrypt; auth: - if (test_and_set_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) + if (test_bit(HCI_CONN_ENCRYPT_PEND, &conn->pend)) return 0; if (!hci_conn_auth(conn, sec_level, auth_type)) diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c index 5ea94a1..17b5b1c 100644 --- a/net/bluetooth/l2cap_core.c +++ b/net/bluetooth/l2cap_core.c @@ -2152,7 +2152,7 @@ static int l2cap_parse_conf_rsp(struct l2cap_chan *chan, void *rsp, int len, voi void *ptr = req->data; int type, olen; unsigned long val; - struct l2cap_conf_rfc rfc; + struct l2cap_conf_rfc rfc = { .mode = L2CAP_MODE_BASIC }; BT_DBG("chan %p, rsp %p, len %d, req %p", chan, rsp, len, data); @@ -2271,6 +2271,16 @@ static void l2cap_conf_rfc_get(struct l2cap_chan *chan, void *rsp, int len) } } + /* Use sane default values in case a misbehaving remote device + * did not send an RFC option. + */ + rfc.mode = chan->mode; + rfc.retrans_timeout = cpu_to_le16(L2CAP_DEFAULT_RETRANS_TO); + rfc.monitor_timeout = cpu_to_le16(L2CAP_DEFAULT_MONITOR_TO); + rfc.max_pdu_size = cpu_to_le16(chan->imtu); + + BT_ERR("Expected RFC option was not found, using defaults"); + done: switch (rfc.mode) { case L2CAP_MODE_ERTM: diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c index 4e32e18..2d28dfe 100644 --- a/net/bluetooth/rfcomm/core.c +++ b/net/bluetooth/rfcomm/core.c @@ -1146,6 +1146,7 @@ static int rfcomm_recv_ua(struct rfcomm_session *s, u8 dlci) if (list_empty(&s->dlcs)) { s->state = BT_DISCONN; rfcomm_send_disc(s, 0); + rfcomm_session_clear_timer(s); } break; diff --git a/net/bridge/br_netfilter.c b/net/bridge/br_netfilter.c index d6ec372..fa8b8f7 100644 --- a/net/bridge/br_netfilter.c +++ b/net/bridge/br_netfilter.c @@ -114,12 +114,18 @@ static struct neighbour *fake_neigh_lookup(const struct dst_entry *dst, const vo return NULL; } +static unsigned int fake_mtu(const struct dst_entry *dst) +{ + return dst->dev->mtu; +} + static struct dst_ops fake_dst_ops = { .family = AF_INET, .protocol = cpu_to_be16(ETH_P_IP), .update_pmtu = fake_update_pmtu, .cow_metrics = fake_cow_metrics, .neigh_lookup = fake_neigh_lookup, + .mtu = fake_mtu, }; /* @@ -141,7 +147,7 @@ void br_netfilter_rtable_init(struct net_bridge *br) rt->dst.dev = br->dev; rt->dst.path = &rt->dst; dst_init_metrics(&rt->dst, br_dst_default_metrics, true); - rt->dst.flags = DST_NOXFRM; + rt->dst.flags = DST_NOXFRM | DST_NOPEER; rt->dst.ops = &fake_dst_ops; } diff --git a/net/core/flow.c b/net/core/flow.c index 8ae42de..e318c7e 100644 --- a/net/core/flow.c +++ b/net/core/flow.c @@ -358,6 +358,18 @@ void flow_cache_flush(void) put_online_cpus(); } +static void flow_cache_flush_task(struct work_struct *work) +{ + flow_cache_flush(); +} + +static DECLARE_WORK(flow_cache_flush_work, flow_cache_flush_task); + +void flow_cache_flush_deferred(void) +{ + schedule_work(&flow_cache_flush_work); +} + static int __cpuinit flow_cache_cpu_prepare(struct flow_cache *fc, int cpu) { struct flow_cache_percpu *fcp = per_cpu_ptr(fc->percpu, cpu); diff --git a/net/core/net-sysfs.c b/net/core/net-sysfs.c index c71c434..385aefe 100644 --- a/net/core/net-sysfs.c +++ b/net/core/net-sysfs.c @@ -665,11 +665,14 @@ static ssize_t store_rps_dev_flow_table_cnt(struct netdev_rx_queue *queue, if (count) { int i; - if (count > 1<<30) { + if (count > INT_MAX) + return -EINVAL; + count = roundup_pow_of_two(count); + if (count > (ULONG_MAX - sizeof(struct rps_dev_flow_table)) + / sizeof(struct rps_dev_flow)) { /* Enforce a limit to prevent overflow */ return -EINVAL; } - count = roundup_pow_of_two(count); table = vmalloc(RPS_DEV_FLOW_TABLE_SIZE(count)); if (!table) return -ENOMEM; diff --git a/net/core/sock.c b/net/core/sock.c index 4ed7b1d..b23f174 100644 --- a/net/core/sock.c +++ b/net/core/sock.c @@ -288,11 +288,7 @@ int sock_queue_rcv_skb(struct sock *sk, struct sk_buff *skb) unsigned long flags; struct sk_buff_head *list = &sk->sk_receive_queue; - /* Cast sk->rcvbuf to unsigned... It's pointless, but reduces - number of warnings when compiling with -W --ANK - */ - if (atomic_read(&sk->sk_rmem_alloc) + skb->truesize >= - (unsigned)sk->sk_rcvbuf) { + if (atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf) { atomic_inc(&sk->sk_drops); trace_sock_rcvqueue_full(sk, skb); return -ENOMEM; diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c index 0da2afc..99ec116 100644 --- a/net/ipv4/ipconfig.c +++ b/net/ipv4/ipconfig.c @@ -253,6 +253,10 @@ static int __init ic_open_devs(void) } } + /* no point in waiting if we could not bring up at least one device */ + if (!ic_first_dev) + goto have_carrier; + /* wait for a carrier on at least one device */ start = jiffies; while (jiffies - start < msecs_to_jiffies(CONF_CARRIER_TIMEOUT)) { diff --git a/net/ipv4/route.c b/net/ipv4/route.c index 46af623..94cdbc5 100644 --- a/net/ipv4/route.c +++ b/net/ipv4/route.c @@ -91,6 +91,7 @@ #include <linux/rcupdate.h> #include <linux/times.h> #include <linux/slab.h> +#include <linux/prefetch.h> #include <net/dst.h> #include <net/net_namespace.h> #include <net/protocol.h> @@ -120,6 +121,7 @@ static int ip_rt_max_size; static int ip_rt_gc_timeout __read_mostly = RT_GC_TIMEOUT; +static int ip_rt_gc_interval __read_mostly = 60 * HZ; static int ip_rt_gc_min_interval __read_mostly = HZ / 2; static int ip_rt_redirect_number __read_mostly = 9; static int ip_rt_redirect_load __read_mostly = HZ / 50; @@ -133,6 +135,9 @@ static int ip_rt_min_advmss __read_mostly = 256; static int rt_chain_length_max __read_mostly = 20; static int redirect_genid; +static struct delayed_work expires_work; +static unsigned long expires_ljiffies; + /* * Interface to generic destination cache. */ @@ -830,6 +835,97 @@ static int has_noalias(const struct rtable *head, const struct rtable *rth) return ONE; } +static void rt_check_expire(void) +{ + static unsigned int rover; + unsigned int i = rover, goal; + struct rtable *rth; + struct rtable __rcu **rthp; + unsigned long samples = 0; + unsigned long sum = 0, sum2 = 0; + unsigned long delta; + u64 mult; + + delta = jiffies - expires_ljiffies; + expires_ljiffies = jiffies; + mult = ((u64)delta) << rt_hash_log; + if (ip_rt_gc_timeout > 1) + do_div(mult, ip_rt_gc_timeout); + goal = (unsigned int)mult; + if (goal > rt_hash_mask) + goal = rt_hash_mask + 1; + for (; goal > 0; goal--) { + unsigned long tmo = ip_rt_gc_timeout; + unsigned long length; + + i = (i + 1) & rt_hash_mask; + rthp = &rt_hash_table[i].chain; + + if (need_resched()) + cond_resched(); + + samples++; + + if (rcu_dereference_raw(*rthp) == NULL) + continue; + length = 0; + spin_lock_bh(rt_hash_lock_addr(i)); + while ((rth = rcu_dereference_protected(*rthp, + lockdep_is_held(rt_hash_lock_addr(i)))) != NULL) { + prefetch(rth->dst.rt_next); + if (rt_is_expired(rth)) { + *rthp = rth->dst.rt_next; + rt_free(rth); + continue; + } + if (rth->dst.expires) { + /* Entry is expired even if it is in use */ + if (time_before_eq(jiffies, rth->dst.expires)) { +nofree: + tmo >>= 1; + rthp = &rth->dst.rt_next; + /* + * We only count entries on + * a chain with equal hash inputs once + * so that entries for different QOS + * levels, and other non-hash input + * attributes don't unfairly skew + * the length computation + */ + length += has_noalias(rt_hash_table[i].chain, rth); + continue; + } + } else if (!rt_may_expire(rth, tmo, ip_rt_gc_timeout)) + goto nofree; + + /* Cleanup aged off entries. */ + *rthp = rth->dst.rt_next; + rt_free(rth); + } + spin_unlock_bh(rt_hash_lock_addr(i)); + sum += length; + sum2 += length*length; + } + if (samples) { + unsigned long avg = sum / samples; + unsigned long sd = int_sqrt(sum2 / samples - avg*avg); + rt_chain_length_max = max_t(unsigned long, + ip_rt_gc_elasticity, + (avg + 4*sd) >> FRACT_BITS); + } + rover = i; +} + +/* + * rt_worker_func() is run in process context. + * we call rt_check_expire() to scan part of the hash table + */ +static void rt_worker_func(struct work_struct *work) +{ + rt_check_expire(); + schedule_delayed_work(&expires_work, ip_rt_gc_interval); +} + /* * Perturbation of rt_genid by a small quantity [1..256] * Using 8 bits of shuffling ensure we can call rt_cache_invalidate() @@ -1271,7 +1367,7 @@ void __ip_select_ident(struct iphdr *iph, struct dst_entry *dst, int more) { struct rtable *rt = (struct rtable *) dst; - if (rt) { + if (rt && !(rt->dst.flags & DST_NOPEER)) { if (rt->peer == NULL) rt_bind_peer(rt, rt->rt_dst, 1); @@ -1282,7 +1378,7 @@ void __ip_select_ident(struct iphdr *iph, struct dst_entry *dst, int more) iph->id = htons(inet_getid(rt->peer, more)); return; } - } else + } else if (!rt) printk(KERN_DEBUG "rt_bind_peer(0) @%p\n", __builtin_return_address(0)); @@ -3179,6 +3275,13 @@ static ctl_table ipv4_route_table[] = { .proc_handler = proc_dointvec_jiffies, }, { + .procname = "gc_interval", + .data = &ip_rt_gc_interval, + .maxlen = sizeof(int), + .mode = 0644, + .proc_handler = proc_dointvec_jiffies, + }, + { .procname = "redirect_load", .data = &ip_rt_redirect_load, .maxlen = sizeof(int), @@ -3388,6 +3491,11 @@ int __init ip_rt_init(void) devinet_init(); ip_fib_init(); + INIT_DELAYED_WORK_DEFERRABLE(&expires_work, rt_worker_func); + expires_ljiffies = jiffies; + schedule_delayed_work(&expires_work, + net_random() % ip_rt_gc_interval + ip_rt_gc_interval); + if (ip_rt_proc_init()) printk(KERN_ERR "Unable to create route proc files\n"); #ifdef CONFIG_XFRM diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c index 84d0bd5..ec56271 100644 --- a/net/ipv6/ip6_output.c +++ b/net/ipv6/ip6_output.c @@ -603,7 +603,7 @@ void ipv6_select_ident(struct frag_hdr *fhdr, struct rt6_info *rt) static atomic_t ipv6_fragmentation_id; int old, new; - if (rt) { + if (rt && !(rt->dst.flags & DST_NOPEER)) { struct inet_peer *peer; if (!rt->rt6i_peer) diff --git a/net/llc/af_llc.c b/net/llc/af_llc.c index dfd3a64..a18e6c3 100644 --- a/net/llc/af_llc.c +++ b/net/llc/af_llc.c @@ -833,15 +833,15 @@ static int llc_ui_recvmsg(struct kiocb *iocb, struct socket *sock, copied += used; len -= used; + /* For non stream protcols we get one packet per recvmsg call */ + if (sk->sk_type != SOCK_STREAM) + goto copy_uaddr; + if (!(flags & MSG_PEEK)) { sk_eat_skb(sk, skb, 0); *seq = 0; } - /* For non stream protcols we get one packet per recvmsg call */ - if (sk->sk_type != SOCK_STREAM) - goto copy_uaddr; - /* Partial read */ if (used + offset < skb->len) continue; @@ -857,6 +857,12 @@ copy_uaddr: } if (llc_sk(sk)->cmsg_flags) llc_cmsg_rcv(msg, skb); + + if (!(flags & MSG_PEEK)) { + sk_eat_skb(sk, skb, 0); + *seq = 0; + } + goto out; } diff --git a/net/netfilter/ipvs/ip_vs_conn.c b/net/netfilter/ipvs/ip_vs_conn.c index 12571fb..29fa5ba 100644 --- a/net/netfilter/ipvs/ip_vs_conn.c +++ b/net/netfilter/ipvs/ip_vs_conn.c @@ -616,7 +616,7 @@ struct ip_vs_dest *ip_vs_try_bind_dest(struct ip_vs_conn *cp) if ((cp) && (!cp->dest)) { dest = ip_vs_find_dest(ip_vs_conn_net(cp), cp->af, &cp->daddr, cp->dport, &cp->vaddr, cp->vport, - cp->protocol, cp->fwmark); + cp->protocol, cp->fwmark, cp->flags); ip_vs_bind_dest(cp, dest); return dest; } else diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c index 008bf97..e1a66cf 100644 --- a/net/netfilter/ipvs/ip_vs_ctl.c +++ b/net/netfilter/ipvs/ip_vs_ctl.c @@ -619,15 +619,21 @@ struct ip_vs_dest *ip_vs_find_dest(struct net *net, int af, const union nf_inet_addr *daddr, __be16 dport, const union nf_inet_addr *vaddr, - __be16 vport, __u16 protocol, __u32 fwmark) + __be16 vport, __u16 protocol, __u32 fwmark, + __u32 flags) { struct ip_vs_dest *dest; struct ip_vs_service *svc; + __be16 port = dport; svc = ip_vs_service_get(net, af, fwmark, protocol, vaddr, vport); if (!svc) return NULL; - dest = ip_vs_lookup_dest(svc, daddr, dport); + if (fwmark && (flags & IP_VS_CONN_F_FWD_MASK) != IP_VS_CONN_F_MASQ) + port = 0; + dest = ip_vs_lookup_dest(svc, daddr, port); + if (!dest) + dest = ip_vs_lookup_dest(svc, daddr, port ^ dport); if (dest) atomic_inc(&dest->refcnt); ip_vs_service_put(svc); diff --git a/net/netfilter/ipvs/ip_vs_sync.c b/net/netfilter/ipvs/ip_vs_sync.c index 3cdd479..2b6678c0 100644 --- a/net/netfilter/ipvs/ip_vs_sync.c +++ b/net/netfilter/ipvs/ip_vs_sync.c @@ -740,7 +740,7 @@ static void ip_vs_proc_conn(struct net *net, struct ip_vs_conn_param *param, * but still handled. */ dest = ip_vs_find_dest(net, type, daddr, dport, param->vaddr, - param->vport, protocol, fwmark); + param->vport, protocol, fwmark, flags); /* Set the approprite ativity flag */ if (protocol == IPPROTO_TCP) { diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c index ef21b22..257e772 100644 --- a/net/netfilter/nf_conntrack_netlink.c +++ b/net/netfilter/nf_conntrack_netlink.c @@ -135,7 +135,7 @@ nla_put_failure: static inline int ctnetlink_dump_timeout(struct sk_buff *skb, const struct nf_conn *ct) { - long timeout = (ct->timeout.expires - jiffies) / HZ; + long timeout = ((long)ct->timeout.expires - (long)jiffies) / HZ; if (timeout < 0) timeout = 0; @@ -1358,12 +1358,15 @@ ctnetlink_create_conntrack(struct net *net, u16 zone, nf_ct_protonum(ct)); if (helper == NULL) { rcu_read_unlock(); + spin_unlock_bh(&nf_conntrack_lock); #ifdef CONFIG_MODULES if (request_module("nfct-helper-%s", helpname) < 0) { + spin_lock_bh(&nf_conntrack_lock); err = -EOPNOTSUPP; goto err1; } + spin_lock_bh(&nf_conntrack_lock); rcu_read_lock(); helper = __nf_conntrack_helper_find(helpname, nf_ct_l3num(ct), @@ -1638,7 +1641,7 @@ ctnetlink_exp_dump_expect(struct sk_buff *skb, const struct nf_conntrack_expect *exp) { struct nf_conn *master = exp->master; - long timeout = (exp->timeout.expires - jiffies) / HZ; + long timeout = ((long)exp->timeout.expires - (long)jiffies) / HZ; struct nf_conn_help *help; if (timeout < 0) @@ -1869,25 +1872,30 @@ ctnetlink_get_expect(struct sock *ctnl, struct sk_buff *skb, err = -ENOMEM; skb2 = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); - if (skb2 == NULL) + if (skb2 == NULL) { + nf_ct_expect_put(exp); goto out; + } rcu_read_lock(); err = ctnetlink_exp_fill_info(skb2, NETLINK_CB(skb).pid, nlh->nlmsg_seq, IPCTNL_MSG_EXP_NEW, exp); rcu_read_unlock(); + nf_ct_expect_put(exp); if (err <= 0) goto free; - nf_ct_expect_put(exp); + err = netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT); + if (err < 0) + goto out; - return netlink_unicast(ctnl, skb2, NETLINK_CB(skb).pid, MSG_DONTWAIT); + return 0; free: kfree_skb(skb2); out: - nf_ct_expect_put(exp); - return err; + /* this avoids a loop in nfnetlink. */ + return err == -EAGAIN ? -ENOBUFS : err; } static int diff --git a/net/netfilter/xt_connbytes.c b/net/netfilter/xt_connbytes.c index 5b13850..9ddf1c3 100644 --- a/net/netfilter/xt_connbytes.c +++ b/net/netfilter/xt_connbytes.c @@ -87,10 +87,10 @@ connbytes_mt(const struct sk_buff *skb, struct xt_action_param *par) break; } - if (sinfo->count.to) + if (sinfo->count.to >= sinfo->count.from) return what <= sinfo->count.to && what >= sinfo->count.from; - else - return what >= sinfo->count.from; + else /* inverted */ + return what < sinfo->count.to || what > sinfo->count.from; } static int connbytes_mt_check(const struct xt_mtchk_param *par) diff --git a/net/nfc/nci/core.c b/net/nfc/nci/core.c index 3925c657..ea66034 100644 --- a/net/nfc/nci/core.c +++ b/net/nfc/nci/core.c @@ -69,7 +69,7 @@ static int __nci_request(struct nci_dev *ndev, __u32 timeout) { int rc = 0; - unsigned long completion_rc; + long completion_rc; ndev->req_status = NCI_REQ_PEND; diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c index 82a6f34..d9d4970 100644 --- a/net/packet/af_packet.c +++ b/net/packet/af_packet.c @@ -1630,8 +1630,7 @@ static int packet_rcv(struct sk_buff *skb, struct net_device *dev, if (snaplen > res) snaplen = res; - if (atomic_read(&sk->sk_rmem_alloc) + skb->truesize >= - (unsigned)sk->sk_rcvbuf) + if (atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf) goto drop_n_acct; if (skb_shared(skb)) { @@ -1762,8 +1761,7 @@ static int tpacket_rcv(struct sk_buff *skb, struct net_device *dev, if (po->tp_version <= TPACKET_V2) { if (macoff + snaplen > po->rx_ring.frame_size) { if (po->copy_thresh && - atomic_read(&sk->sk_rmem_alloc) + skb->truesize - < (unsigned)sk->sk_rcvbuf) { + atomic_read(&sk->sk_rmem_alloc) < sk->sk_rcvbuf) { if (skb_shared(skb)) { copy_skb = skb_clone(skb, GFP_ATOMIC); } else { @@ -2450,8 +2448,12 @@ static int packet_do_bind(struct sock *sk, struct net_device *dev, __be16 protoc { struct packet_sock *po = pkt_sk(sk); - if (po->fanout) + if (po->fanout) { + if (dev) + dev_put(dev); + return -EINVAL; + } lock_sock(sk); diff --git a/net/sched/sch_mqprio.c b/net/sched/sch_mqprio.c index f88256c..28de430 100644 --- a/net/sched/sch_mqprio.c +++ b/net/sched/sch_mqprio.c @@ -107,7 +107,7 @@ static int mqprio_init(struct Qdisc *sch, struct nlattr *opt) if (!netif_is_multiqueue(dev)) return -EOPNOTSUPP; - if (nla_len(opt) < sizeof(*qopt)) + if (!opt || nla_len(opt) < sizeof(*qopt)) return -EINVAL; qopt = nla_data(opt); diff --git a/net/sched/sch_netem.c b/net/sched/sch_netem.c index eb3b9a8..a4ab207 100644 --- a/net/sched/sch_netem.c +++ b/net/sched/sch_netem.c @@ -488,7 +488,7 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr) return -EINVAL; s = sizeof(struct disttable) + n * sizeof(s16); - d = kmalloc(s, GFP_KERNEL); + d = kmalloc(s, GFP_KERNEL | __GFP_NOWARN); if (!d) d = vmalloc(s); if (!d) @@ -501,9 +501,10 @@ static int get_dist_table(struct Qdisc *sch, const struct nlattr *attr) root_lock = qdisc_root_sleeping_lock(sch); spin_lock_bh(root_lock); - dist_free(q->delay_dist); - q->delay_dist = d; + swap(q->delay_dist, d); spin_unlock_bh(root_lock); + + dist_free(d); return 0; } diff --git a/net/sctp/associola.c b/net/sctp/associola.c index 152b5b3..acd2edb 100644 --- a/net/sctp/associola.c +++ b/net/sctp/associola.c @@ -173,7 +173,7 @@ static struct sctp_association *sctp_association_init(struct sctp_association *a asoc->timeouts[SCTP_EVENT_TIMEOUT_HEARTBEAT] = 0; asoc->timeouts[SCTP_EVENT_TIMEOUT_SACK] = asoc->sackdelay; asoc->timeouts[SCTP_EVENT_TIMEOUT_AUTOCLOSE] = - (unsigned long)sp->autoclose * HZ; + min_t(unsigned long, sp->autoclose, sctp_max_autoclose) * HZ; /* Initializes the timers */ for (i = SCTP_EVENT_TIMEOUT_NONE; i < SCTP_NUM_TIMEOUT_TYPES; ++i) diff --git a/net/sctp/output.c b/net/sctp/output.c index 08b3cea..817174e 100644 --- a/net/sctp/output.c +++ b/net/sctp/output.c @@ -697,13 +697,7 @@ static void sctp_packet_append_data(struct sctp_packet *packet, /* Keep track of how many bytes are in flight to the receiver. */ asoc->outqueue.outstanding_bytes += datasize; - /* Update our view of the receiver's rwnd. Include sk_buff overhead - * while updating peer.rwnd so that it reduces the chances of a - * receiver running out of receive buffer space even when receive - * window is still open. This can happen when a sender is sending - * sending small messages. - */ - datasize += sizeof(struct sk_buff); + /* Update our view of the receiver's rwnd. */ if (datasize < rwnd) rwnd -= datasize; else diff --git a/net/sctp/outqueue.c b/net/sctp/outqueue.c index 14c2b06..cfeb1d4 100644 --- a/net/sctp/outqueue.c +++ b/net/sctp/outqueue.c @@ -411,8 +411,7 @@ void sctp_retransmit_mark(struct sctp_outq *q, chunk->transport->flight_size -= sctp_data_size(chunk); q->outstanding_bytes -= sctp_data_size(chunk); - q->asoc->peer.rwnd += (sctp_data_size(chunk) + - sizeof(struct sk_buff)); + q->asoc->peer.rwnd += sctp_data_size(chunk); } continue; } @@ -432,8 +431,7 @@ void sctp_retransmit_mark(struct sctp_outq *q, * (Section 7.2.4)), add the data size of those * chunks to the rwnd. */ - q->asoc->peer.rwnd += (sctp_data_size(chunk) + - sizeof(struct sk_buff)); + q->asoc->peer.rwnd += sctp_data_size(chunk); q->outstanding_bytes -= sctp_data_size(chunk); if (chunk->transport) transport->flight_size -= sctp_data_size(chunk); diff --git a/net/sctp/protocol.c b/net/sctp/protocol.c index 61b9fca..6f6ad86 100644 --- a/net/sctp/protocol.c +++ b/net/sctp/protocol.c @@ -1285,6 +1285,9 @@ SCTP_STATIC __init int sctp_init(void) sctp_max_instreams = SCTP_DEFAULT_INSTREAMS; sctp_max_outstreams = SCTP_DEFAULT_OUTSTREAMS; + /* Initialize maximum autoclose timeout. */ + sctp_max_autoclose = INT_MAX / HZ; + /* Initialize handle used for association ids. */ idr_init(&sctp_assocs_id); diff --git a/net/sctp/socket.c b/net/sctp/socket.c index 13bf5fc..54a7cd2 100644 --- a/net/sctp/socket.c +++ b/net/sctp/socket.c @@ -2200,8 +2200,6 @@ static int sctp_setsockopt_autoclose(struct sock *sk, char __user *optval, return -EINVAL; if (copy_from_user(&sp->autoclose, optval, optlen)) return -EFAULT; - /* make sure it won't exceed MAX_SCHEDULE_TIMEOUT */ - sp->autoclose = min_t(long, sp->autoclose, MAX_SCHEDULE_TIMEOUT / HZ); return 0; } diff --git a/net/sctp/sysctl.c b/net/sctp/sysctl.c index 6b39529..60ffbd0 100644 --- a/net/sctp/sysctl.c +++ b/net/sctp/sysctl.c @@ -53,6 +53,10 @@ static int sack_timer_min = 1; static int sack_timer_max = 500; static int addr_scope_max = 3; /* check sctp_scope_policy_t in include/net/sctp/constants.h for max entries */ static int rwnd_scale_max = 16; +static unsigned long max_autoclose_min = 0; +static unsigned long max_autoclose_max = + (MAX_SCHEDULE_TIMEOUT / HZ > UINT_MAX) + ? UINT_MAX : MAX_SCHEDULE_TIMEOUT / HZ; extern long sysctl_sctp_mem[3]; extern int sysctl_sctp_rmem[3]; @@ -258,6 +262,15 @@ static ctl_table sctp_table[] = { .extra1 = &one, .extra2 = &rwnd_scale_max, }, + { + .procname = "max_autoclose", + .data = &sctp_max_autoclose, + .maxlen = sizeof(unsigned long), + .mode = 0644, + .proc_handler = &proc_doulongvec_minmax, + .extra1 = &max_autoclose_min, + .extra2 = &max_autoclose_max, + }, { /* sentinel */ } }; diff --git a/net/sunrpc/sched.c b/net/sunrpc/sched.c index d12ffa5..00a1a2a 100644 --- a/net/sunrpc/sched.c +++ b/net/sunrpc/sched.c @@ -590,6 +590,27 @@ void rpc_prepare_task(struct rpc_task *task) task->tk_ops->rpc_call_prepare(task, task->tk_calldata); } +static void +rpc_init_task_statistics(struct rpc_task *task) +{ + /* Initialize retry counters */ + task->tk_garb_retry = 2; + task->tk_cred_retry = 2; + task->tk_rebind_retry = 2; + + /* starting timestamp */ + task->tk_start = ktime_get(); +} + +static void +rpc_reset_task_statistics(struct rpc_task *task) +{ + task->tk_timeouts = 0; + task->tk_flags &= ~(RPC_CALL_MAJORSEEN|RPC_TASK_KILLED|RPC_TASK_SENT); + + rpc_init_task_statistics(task); +} + /* * Helper that calls task->tk_ops->rpc_call_done if it exists */ @@ -602,6 +623,7 @@ void rpc_exit_task(struct rpc_task *task) WARN_ON(RPC_ASSASSINATED(task)); /* Always release the RPC slot and buffer memory */ xprt_release(task); + rpc_reset_task_statistics(task); } } } @@ -804,11 +826,6 @@ static void rpc_init_task(struct rpc_task *task, const struct rpc_task_setup *ta task->tk_calldata = task_setup_data->callback_data; INIT_LIST_HEAD(&task->tk_task); - /* Initialize retry counters */ - task->tk_garb_retry = 2; - task->tk_cred_retry = 2; - task->tk_rebind_retry = 2; - task->tk_priority = task_setup_data->priority - RPC_PRIORITY_LOW; task->tk_owner = current->tgid; @@ -818,8 +835,7 @@ static void rpc_init_task(struct rpc_task *task, const struct rpc_task_setup *ta if (task->tk_ops->rpc_call_prepare != NULL) task->tk_action = rpc_prepare_task; - /* starting timestamp */ - task->tk_start = ktime_get(); + rpc_init_task_statistics(task); dprintk("RPC: new task initialized, procpid %u\n", task_pid_nr(current)); diff --git a/net/sunrpc/xprt.c b/net/sunrpc/xprt.c index f4385e4..c64c0ef 100644 --- a/net/sunrpc/xprt.c +++ b/net/sunrpc/xprt.c @@ -995,13 +995,11 @@ out_init_req: static void xprt_free_slot(struct rpc_xprt *xprt, struct rpc_rqst *req) { - if (xprt_dynamic_free_slot(xprt, req)) - return; - - memset(req, 0, sizeof(*req)); /* mark unused */ - spin_lock(&xprt->reserve_lock); - list_add(&req->rq_list, &xprt->free); + if (!xprt_dynamic_free_slot(xprt, req)) { + memset(req, 0, sizeof(*req)); /* mark unused */ + list_add(&req->rq_list, &xprt->free); + } rpc_wake_up_next(&xprt->backlog); spin_unlock(&xprt->reserve_lock); } diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c index 2118d64..9049a5c 100644 --- a/net/xfrm/xfrm_policy.c +++ b/net/xfrm/xfrm_policy.c @@ -2276,8 +2276,6 @@ static void __xfrm_garbage_collect(struct net *net) { struct dst_entry *head, *next; - flow_cache_flush(); - spin_lock_bh(&xfrm_policy_sk_bundle_lock); head = xfrm_policy_sk_bundles; xfrm_policy_sk_bundles = NULL; @@ -2290,6 +2288,18 @@ static void __xfrm_garbage_collect(struct net *net) } } +static void xfrm_garbage_collect(struct net *net) +{ + flow_cache_flush(); + __xfrm_garbage_collect(net); +} + +static void xfrm_garbage_collect_deferred(struct net *net) +{ + flow_cache_flush_deferred(); + __xfrm_garbage_collect(net); +} + static void xfrm_init_pmtu(struct dst_entry *dst) { do { @@ -2422,7 +2432,7 @@ int xfrm_policy_register_afinfo(struct xfrm_policy_afinfo *afinfo) if (likely(dst_ops->neigh_lookup == NULL)) dst_ops->neigh_lookup = xfrm_neigh_lookup; if (likely(afinfo->garbage_collect == NULL)) - afinfo->garbage_collect = __xfrm_garbage_collect; + afinfo->garbage_collect = xfrm_garbage_collect_deferred; xfrm_policy_afinfo[afinfo->family] = afinfo; } write_unlock_bh(&xfrm_policy_afinfo_lock); @@ -2516,7 +2526,7 @@ static int xfrm_dev_event(struct notifier_block *this, unsigned long event, void switch (event) { case NETDEV_DOWN: - __xfrm_garbage_collect(dev_net(dev)); + xfrm_garbage_collect(dev_net(dev)); } return NOTIFY_DONE; } diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index ba573fe..914833d 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -60,8 +60,8 @@ update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h --directory=$(srctree) --directory=$(objtree) \ --output $(obj)/config.pot $(Q)sed -i s/CHARSET/UTF-8/ $(obj)/config.pot - $(Q)ln -fs Kconfig.x86 arch/um/Kconfig - $(Q)(for i in `ls $(srctree)/arch/*/Kconfig`; \ + $(Q)(for i in `ls $(srctree)/arch/*/Kconfig \ + $(srctree)/arch/*/um/Kconfig`; \ do \ echo " GEN $$i"; \ $(obj)/kxgettext $$i \ @@ -69,7 +69,6 @@ update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h done ) $(Q)msguniq --sort-by-file --to-code=UTF-8 $(obj)/config.pot \ --output $(obj)/linux.pot - $(Q)rm -f $(srctree)/arch/um/Kconfig $(Q)rm -f $(obj)/config.pot PHONY += allnoconfig allyesconfig allmodconfig alldefconfig randconfig diff --git a/security/integrity/evm/evm_crypto.c b/security/integrity/evm/evm_crypto.c index 5dd5b140..8738def 100644 --- a/security/integrity/evm/evm_crypto.c +++ b/security/integrity/evm/evm_crypto.c @@ -27,20 +27,35 @@ static int evmkey_len = MAX_KEY_SIZE; struct crypto_shash *hmac_tfm; +static DEFINE_MUTEX(mutex); + static struct shash_desc *init_desc(void) { int rc; struct shash_desc *desc; if (hmac_tfm == NULL) { + mutex_lock(&mutex); + if (hmac_tfm) + goto out; hmac_tfm = crypto_alloc_shash(evm_hmac, 0, CRYPTO_ALG_ASYNC); if (IS_ERR(hmac_tfm)) { pr_err("Can not allocate %s (reason: %ld)\n", evm_hmac, PTR_ERR(hmac_tfm)); rc = PTR_ERR(hmac_tfm); hmac_tfm = NULL; + mutex_unlock(&mutex); + return ERR_PTR(rc); + } + rc = crypto_shash_setkey(hmac_tfm, evmkey, evmkey_len); + if (rc) { + crypto_free_shash(hmac_tfm); + hmac_tfm = NULL; + mutex_unlock(&mutex); return ERR_PTR(rc); } +out: + mutex_unlock(&mutex); } desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(hmac_tfm), @@ -51,11 +66,7 @@ static struct shash_desc *init_desc(void) desc->tfm = hmac_tfm; desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP; - rc = crypto_shash_setkey(hmac_tfm, evmkey, evmkey_len); - if (rc) - goto out; rc = crypto_shash_init(desc); -out: if (rc) { kfree(desc); return ERR_PTR(rc); diff --git a/security/selinux/netport.c b/security/selinux/netport.c index 0b62bd11..7b9eb1f 100644 --- a/security/selinux/netport.c +++ b/security/selinux/netport.c @@ -123,7 +123,9 @@ static void sel_netport_insert(struct sel_netport *port) if (sel_netport_hash[idx].size == SEL_NETPORT_HASH_BKT_LIMIT) { struct sel_netport *tail; tail = list_entry( - rcu_dereference(sel_netport_hash[idx].list.prev), + rcu_dereference_protected( + sel_netport_hash[idx].list.prev, + lockdep_is_held(&sel_netport_lock)), struct sel_netport, list); list_del_rcu(&tail->list); kfree_rcu(tail, rcu); diff --git a/sound/atmel/ac97c.c b/sound/atmel/ac97c.c index 6e5adde..73516f6 100644 --- a/sound/atmel/ac97c.c +++ b/sound/atmel/ac97c.c @@ -899,6 +899,10 @@ static void atmel_ac97c_reset(struct atmel_ac97c *chip) /* AC97 v2.2 specifications says minimum 1 us. */ udelay(2); gpio_set_value(chip->reset_pin, 1); + } else { + ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA); + udelay(2); + ac97c_writel(chip, MR, AC97C_MR_ENA); } } diff --git a/sound/soc/codecs/wm8776.c b/sound/soc/codecs/wm8776.c index bfdc523..d3b0a20 100644 --- a/sound/soc/codecs/wm8776.c +++ b/sound/soc/codecs/wm8776.c @@ -235,6 +235,7 @@ static int wm8776_hw_params(struct snd_pcm_substream *substream, switch (snd_pcm_format_width(params_format(params))) { case 16: iface = 0; + break; case 20: iface = 0x10; break; diff --git a/virt/kvm/assigned-dev.c b/virt/kvm/assigned-dev.c index 3ad0925..758e3b3 100644 --- a/virt/kvm/assigned-dev.c +++ b/virt/kvm/assigned-dev.c @@ -17,6 +17,8 @@ #include <linux/pci.h> #include <linux/interrupt.h> #include <linux/slab.h> +#include <linux/namei.h> +#include <linux/fs.h> #include "irq.h" static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head, @@ -480,12 +482,76 @@ out: return r; } +/* + * We want to test whether the caller has been granted permissions to + * use this device. To be able to configure and control the device, + * the user needs access to PCI configuration space and BAR resources. + * These are accessed through PCI sysfs. PCI config space is often + * passed to the process calling this ioctl via file descriptor, so we + * can't rely on access to that file. We can check for permissions + * on each of the BAR resource files, which is a pretty clear + * indicator that the user has been granted access to the device. + */ +static int probe_sysfs_permissions(struct pci_dev *dev) +{ +#ifdef CONFIG_SYSFS + int i; + bool bar_found = false; + + for (i = PCI_STD_RESOURCES; i <= PCI_STD_RESOURCE_END; i++) { + char *kpath, *syspath; + struct path path; + struct inode *inode; + int r; + + if (!pci_resource_len(dev, i)) + continue; + + kpath = kobject_get_path(&dev->dev.kobj, GFP_KERNEL); + if (!kpath) + return -ENOMEM; + + /* Per sysfs-rules, sysfs is always at /sys */ + syspath = kasprintf(GFP_KERNEL, "/sys%s/resource%d", kpath, i); + kfree(kpath); + if (!syspath) + return -ENOMEM; + + r = kern_path(syspath, LOOKUP_FOLLOW, &path); + kfree(syspath); + if (r) + return r; + + inode = path.dentry->d_inode; + + r = inode_permission(inode, MAY_READ | MAY_WRITE | MAY_ACCESS); + path_put(&path); + if (r) + return r; + + bar_found = true; + } + + /* If no resources, probably something special */ + if (!bar_found) + return -EPERM; + + return 0; +#else + return -EINVAL; /* No way to control the device without sysfs */ +#endif +} + static int kvm_vm_ioctl_assign_device(struct kvm *kvm, struct kvm_assigned_pci_dev *assigned_dev) { int r = 0, idx; struct kvm_assigned_dev_kernel *match; struct pci_dev *dev; + u8 header_type; + + if (!(assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU)) + return -EINVAL; mutex_lock(&kvm->lock); idx = srcu_read_lock(&kvm->srcu); @@ -513,6 +579,18 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm, r = -EINVAL; goto out_free; } + + /* Don't allow bridges to be assigned */ + pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type); + if ((header_type & PCI_HEADER_TYPE) != PCI_HEADER_TYPE_NORMAL) { + r = -EPERM; + goto out_put; + } + + r = probe_sysfs_permissions(dev); + if (r) + goto out_put; + if (pci_enable_device(dev)) { printk(KERN_INFO "%s: Could not enable PCI device\n", __func__); r = -EBUSY; @@ -544,16 +622,14 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm, list_add(&match->list, &kvm->arch.assigned_dev_head); - if (assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) { - if (!kvm->arch.iommu_domain) { - r = kvm_iommu_map_guest(kvm); - if (r) - goto out_list_del; - } - r = kvm_assign_device(kvm, match); + if (!kvm->arch.iommu_domain) { + r = kvm_iommu_map_guest(kvm); if (r) goto out_list_del; } + r = kvm_assign_device(kvm, match); + if (r) + goto out_list_del; out: srcu_read_unlock(&kvm->srcu, idx); @@ -593,8 +669,7 @@ static int kvm_vm_ioctl_deassign_device(struct kvm *kvm, goto out; } - if (match->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) - kvm_deassign_device(kvm, match); + kvm_deassign_device(kvm, match); kvm_free_assigned_device(kvm, match); |
