ppc64: merge binfmt_elf32.c

and use start_thread for both 32 and 64 bit bineries.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>

5 files changed, 7 insertions, 51 deletions

diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index f03f6d4f..adac749a 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -11,6 +11,7 @@ CFLAGS_btext.o		+= -fPIC
 endif
 
 obj-y				:= semaphore.o cputable.o
+obj-$(CONFIG_PPC64)		+= binfmt_elf32.o
 obj-$(CONFIG_ALTIVEC)		+= vecemu.o vector.o
 obj-$(CONFIG_POWER4)		+= idle_power4.o
 
diff --git a/arch/ppc64/kernel/binfmt_elf32.c b/arch/powerpc/kernel/binfmt_elf32.c
index fadc699..8ad6b0f 100644
--- a/arch/ppc64/kernel/binfmt_elf32.c
+++ b/arch/powerpc/kernel/binfmt_elf32.c
@@ -70,9 +70,6 @@ cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
 	value->tv_sec = jiffies / HZ;
 }
 
-extern void start_thread32(struct pt_regs *, unsigned long, unsigned long);
-#undef start_thread
-#define start_thread start_thread32
 #define init_elf_binfmt init_elf32_binfmt
 
 #include "../../../fs/binfmt_elf.c"
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 92bc75f..193c8c1 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -620,7 +620,7 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
 	regs->nip = start;
 	regs->msr = MSR_USER;
 #else
-	{
+	if (!test_thread_flag(TIF_32BIT)) {
 		unsigned long entry, toc, load_addr = regs->gpr[2];
 
 		/* start is a relocated pointer to the function descriptor for
@@ -641,6 +641,10 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
 		regs->nip = entry;
 		regs->gpr[2] = toc;
 		regs->msr = MSR_USER64;
+	} else {
+		regs->nip = start;
+		regs->gpr[2] = 0;
+		regs->msr = MSR_USER32;
 	}
 #endif
 
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index 834aef0..a724f6f 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -14,7 +14,7 @@ endif
 obj-y               +=	irq.o idle.o dma.o \
 			time.o signal.o syscalls.o ptrace.o \
 			align.o bitops.o pacaData.o \
-			udbg.o binfmt_elf32.o sys_ppc32.o ioctl32.o \
+			udbg.o sys_ppc32.o ioctl32.o \
 			ptrace32.o signal32.o rtc.o \
 			cpu_setup_power4.o \
 			iommu.o sysfs.o vdso.o pmc.o firmware.o
diff --git a/arch/ppc64/kernel/sys_ppc32.c b/arch/ppc64/kernel/sys_ppc32.c
index 1cacf61..b53f565 100644
--- a/arch/ppc64/kernel/sys_ppc32.c
+++ b/arch/ppc64/kernel/sys_ppc32.c
@@ -609,52 +609,6 @@ out:
 	return error;
 }
 
-/* Set up a thread for executing a new program. */
-void start_thread32(struct pt_regs* regs, unsigned long nip, unsigned long sp)
-{
-	set_fs(USER_DS);
-
-	/*
-	 * If we exec out of a kernel thread then thread.regs will not be
-	 * set. Do it now.
-	 */
-	if (!current->thread.regs) {
-		unsigned long childregs = (unsigned long)current->thread_info +
-						THREAD_SIZE;
-		childregs -= sizeof(struct pt_regs);
-		current->thread.regs = (struct pt_regs *)childregs;
-	}
-
-	/*
-	 * ELF_PLAT_INIT already clears all registers but it also sets r2.
-	 * So just clear r2 here.
-	 */
-	regs->gpr[2] = 0;
-
-	regs->nip = nip;
-	regs->gpr[1] = sp;
-	regs->msr = MSR_USER32;
-#ifndef CONFIG_SMP
-	if (last_task_used_math == current)
-		last_task_used_math = 0;
-#endif /* CONFIG_SMP */
-	current->thread.fpscr = 0;
-	memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
-#ifdef CONFIG_ALTIVEC
-#ifndef CONFIG_SMP
-	if (last_task_used_altivec == current)
-		last_task_used_altivec = 0;
-#endif /* CONFIG_SMP */
-	memset(current->thread.vr, 0, sizeof(current->thread.vr));
-	current->thread.vscr.u[0] = 0;
-	current->thread.vscr.u[1] = 0;
-	current->thread.vscr.u[2] = 0;
-	current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
-	current->thread.vrsave = 0;
-	current->thread.used_vr = 0;
-#endif /* CONFIG_ALTIVEC */
-}
-
 /* Note: it is necessary to treat option as an unsigned int, 
  * with the corresponding cast to a signed int to insure that the 
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)