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author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2011-04-02 00:15:49 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-05-19 13:11:32 +0200 |
commit | d286a43aa248cb657e0876b5aa4fe0034170d05c (patch) | |
tree | 14ab77f7d3a85ff9f397153e58c3cc90405d60ba | |
parent | 7db4d88206e20b8d91e8e7bba3b79805a1b1a98d (diff) | |
download | op-kernel-dev-d286a43aa248cb657e0876b5aa4fe0034170d05c.zip op-kernel-dev-d286a43aa248cb657e0876b5aa4fe0034170d05c.tar.gz |
ARM: mx3: make ioremap quirk ready for multi-SoC kernels
To be able to compile e.g. i.MX31 and i.MX51 in a single kernel image
the ioremap quirk needs a runtime check.
While touching this code make the comment more understandable by adding
a sentence from the commit log that introduced it
(eadefef ([ARM] MX3: Use ioremap wrapper to map SoC devices nonshared)).
As mach/io.h now uses cpu_is_ some header reshuffling in mach/hardware.h
was necessary. (mach/mx27.h and mach/mx31.h #include <linux/io.h> which
#includes <mach/io.h>. So mach/mxc.h which provides the cpu_is_ macros
needs to be included before mach/mx27.h and mach/mx31.h.)
LAKML-Reference: 1302464943-20721-5-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/plat-mxc/include/mach/hardware.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/io.h | 23 |
2 files changed, 17 insertions, 10 deletions
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index a881db5..67d3e2b 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -95,6 +95,8 @@ #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) +#include <mach/mxc.h> + #ifdef CONFIG_ARCH_MX5 #include <mach/mx50.h> #include <mach/mx51.h> @@ -125,8 +127,6 @@ # include <mach/mx25.h> #endif -#include <mach/mxc.h> - #define imx_map_entry(soc, name, _type) { \ .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \ diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h index b4f2de7..4347a87 100644 --- a/arch/arm/plat-mxc/include/mach/io.h +++ b/arch/arm/plat-mxc/include/mach/io.h @@ -14,19 +14,26 @@ /* Allow IO space to be anywhere in the memory */ #define IO_SPACE_LIMIT 0xffffffff -#ifdef CONFIG_ARCH_MX3 -#define __arch_ioremap __mx3_ioremap +#if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35) +#include <mach/hardware.h> + +#define __arch_ioremap __imx_ioremap #define __arch_iounmap __iounmap +#define addr_in_module(addr, mod) \ + ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE) + static inline void __iomem * -__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) +__imx_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) { - if (mtype == MT_DEVICE) { - /* Access all peripherals below 0x80000000 as nonshared device - * but leave l2cc alone. + if (mtype == MT_DEVICE && (cpu_is_mx31() || cpu_is_mx35())) { + /* + * Access all peripherals below 0x80000000 as nonshared device + * on mx3, but leave l2cc alone. Otherwise cache corruptions + * can occur. */ - if ((phys_addr < 0x80000000) && ((phys_addr < 0x30000000) || - (phys_addr >= 0x30000000 + SZ_1M))) + if (phys_addr < 0x80000000 && + !addr_in_module(phys_addr, MX3x_L2CC)) mtype = MT_DEVICE_NONSHARED; } |