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author | Barry Song <Baohua.Song@csr.com> | 2012-08-23 13:41:59 +0800 |
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committer | Barry Song <Barry.Song@csr.com> | 2012-08-28 17:06:10 +0800 |
commit | c1e3c1196be37acaea95803043bc1055ea5131ac (patch) | |
tree | 51312f4cb63ced129b9050a1039d24b072e7d5c0 | |
parent | 156a09979710f260f4482961869d6260148341e9 (diff) | |
download | op-kernel-dev-c1e3c1196be37acaea95803043bc1055ea5131ac.zip op-kernel-dev-c1e3c1196be37acaea95803043bc1055ea5131ac.tar.gz |
ARM: SIRF: make sirf irqchip driver optional since new SoCs will have GIC
New MARCO and POLO SoC use GIC, so make irq.c optional and enable it
only if we enable ARCH_PRIMA2 in Kconfig
Signed-off-by: Barry Song <Baohua.Song@csr.com>
-rw-r--r-- | arch/arm/mach-prima2/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/mach-prima2/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-prima2/irq.c | 2 |
3 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 65438e1..41fc853 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig @@ -7,9 +7,13 @@ config ARCH_PRIMA2 default y select CPU_V7 select ZONE_DMA + select SIRF_IRQ help Support for CSR SiRFSoC ARM Cortex A9 Platform endmenu +config SIRF_IRQ + bool + endif diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile index f2cde60..fc9ce22 100644 --- a/arch/arm/mach-prima2/Makefile +++ b/arch/arm/mach-prima2/Makefile @@ -1,8 +1,8 @@ obj-y := timer.o -obj-y += irq.o obj-y += rstc.o obj-y += common.o obj-y += rtciobrg.o obj-$(CONFIG_DEBUG_LL) += lluart.o obj-$(CONFIG_CACHE_L2X0) += l2x0.o obj-$(CONFIG_SUSPEND) += pm.o sleep.o +obj-$(CONFIG_SIRF_IRQ) += irq.o diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c index a7b9415..7dee917 100644 --- a/arch/arm/mach-prima2/irq.c +++ b/arch/arm/mach-prima2/irq.c @@ -63,7 +63,7 @@ void __init sirfsoc_of_irq_init(void) np = of_find_matching_node(NULL, intc_ids); if (!np) - panic("unable to find compatible intc node in dtb\n"); + return; sirfsoc_intc_base = of_iomap(np, 0); if (!sirfsoc_intc_base) |