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author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2015-12-17 15:27:49 +0200 |
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committer | Sekhar Nori <nsekhar@ti.com> | 2015-12-24 16:32:14 +0530 |
commit | b47a8560695c552889923c71605000ac1f5e4b2d (patch) | |
tree | 77460dbb69599ac9ae69ed0687d4e24b05f33260 | |
parent | 7a7faedde65307c364f831046ded1a7720d5a6fe (diff) | |
download | op-kernel-dev-b47a8560695c552889923c71605000ac1f5e4b2d.zip op-kernel-dev-b47a8560695c552889923c71605000ac1f5e4b2d.tar.gz |
ARM: DTS: da850: Enable eDMA1
The eDMA1 in da850 has only one TPTC and for example MMC1 is HW events are
handled by it.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Sushaanth Srirangapathi <sushaanth.s@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r-- | arch/arm/boot/dts/da850-enbw-cmc.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/da850-evm.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/da850.dtsi | 17 |
3 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/da850-enbw-cmc.dts b/arch/arm/boot/dts/da850-enbw-cmc.dts index 1811f82..645549e 100644 --- a/arch/arm/boot/dts/da850-enbw-cmc.dts +++ b/arch/arm/boot/dts/da850-enbw-cmc.dts @@ -32,3 +32,7 @@ &edma0 { ti,edma-reserved-slot-ranges = <32 50>; }; + +&edma1 { + ti,edma-reserved-slot-ranges = <32 90>; +}; diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts index b7ea8318..ef061e9 100644 --- a/arch/arm/boot/dts/da850-evm.dts +++ b/arch/arm/boot/dts/da850-evm.dts @@ -246,3 +246,7 @@ &edma0 { ti,edma-reserved-slot-ranges = <32 50>; }; + +&edma1 { + ti,edma-reserved-slot-ranges = <32 90>; +}; diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 6e39f9b..c08b6c0 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -173,6 +173,23 @@ interrupts = <32>; interrupt-names = "edm3_tcerrint"; }; + edma1: edma@01e30000 { + compatible = "ti,edma3-tpcc"; + /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */ + reg = <0x230000 0x8000>; + reg-names = "edma3_cc"; + interrupts = <93 94>; + interrupt-names = "edma3_ccint", "edma3_ccerrint"; + #dma-cells = <2>; + + ti,tptcs = <&edma1_tptc0 7>; + }; + edma1_tptc0: tptc@01e38000 { + compatible = "ti,edma3-tptc"; + reg = <0x238000 0x400>; + interrupts = <95>; + interrupt-names = "edm3_tcerrint"; + }; serial0: serial@1c42000 { compatible = "ns16550a"; reg = <0x42000 0x100>; |