diff options
| author | Kumar Gala <galak@freescale.com> | 2005-04-16 15:24:21 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:24:21 -0700 |
| commit | a85f6d4aca822acdb49d27c44519cd6514b06a1d (patch) | |
| tree | df39f6f9cfd8017be90ab658196336c69b8de9b5 | |
| parent | 7a1e335085ead05da08f791340f58b493126894d (diff) | |
| download | op-kernel-dev-a85f6d4aca822acdb49d27c44519cd6514b06a1d.zip op-kernel-dev-a85f6d4aca822acdb49d27c44519cd6514b06a1d.tar.gz | |
[PATCH] ppc32: make usage of CONFIG_PTE_64BIT & CONFIG_PHYS_64BIT consistent
CONFIG_PTE_64BIT & CONFIG_PHYS_64BIT are not currently consistently used in
the code base. Fixed up the usage such that CONFIG_PTE_64BIT is used when we
have a 64-bit PTE regardless of physical address width. CONFIG_PHYS_64BIT is
used if the physical address width is larger than 32-bits, regardless of PTE
size.
These changes required a few sub-arch specific ifdef's to be fixed and the
introduction of a physical address format string.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| -rw-r--r-- | arch/ppc/mm/pgtable.c | 10 | ||||
| -rw-r--r-- | include/asm-ppc/mmu.h | 4 |
2 files changed, 8 insertions, 6 deletions
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c index 0a5cd20..5d2f3f6 100644 --- a/arch/ppc/mm/pgtable.c +++ b/arch/ppc/mm/pgtable.c @@ -74,7 +74,7 @@ extern unsigned long p_mapped_by_tlbcam(unsigned long pa); #define p_mapped_by_tlbcam(x) (0UL) #endif /* HAVE_TLBCAM */ -#ifdef CONFIG_44x +#ifdef CONFIG_PTE_64BIT /* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */ #define PGDIR_ORDER 1 #else @@ -142,13 +142,13 @@ void pte_free(struct page *ptepage) __free_page(ptepage); } -#ifndef CONFIG_44x +#ifndef CONFIG_PHYS_64BIT void __iomem * ioremap(phys_addr_t addr, unsigned long size) { return __ioremap(addr, size, _PAGE_NO_CACHE); } -#else /* CONFIG_44x */ +#else /* CONFIG_PHYS_64BIT */ void __iomem * ioremap64(unsigned long long addr, unsigned long size) { @@ -162,7 +162,7 @@ ioremap(phys_addr_t addr, unsigned long size) return ioremap64(addr64, size); } -#endif /* CONFIG_44x */ +#endif /* CONFIG_PHYS_64BIT */ void __iomem * __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) @@ -193,7 +193,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) */ if ( mem_init_done && (p < virt_to_phys(high_memory)) ) { - printk("__ioremap(): phys addr "PTE_FMT" is RAM lr %p\n", p, + printk("__ioremap(): phys addr "PHYS_FMT" is RAM lr %p\n", p, __builtin_return_address(0)); return NULL; } diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 4a0c67f..d465aee 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -15,11 +15,13 @@ * virtual/physical addressing like 32-bit virtual / 36-bit * physical need a larger than native word size type. -Matt */ -#ifndef CONFIG_PTE_64BIT +#ifndef CONFIG_PHYS_64BIT typedef unsigned long phys_addr_t; +#define PHYS_FMT "%.8lx" #else typedef unsigned long long phys_addr_t; extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t); +#define PHYS_FMT "%16Lx" #endif /* Default "unsigned long" context */ |
