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authorChen-Yu Tsai <wens@csie.org>2014-06-26 23:55:41 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-07-04 12:05:12 +0200
commit9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1 (patch)
tree283615dde84a477cae1909b831be8778867ad342
parent70eab199fa39cb78e13d369db55f24a3839b8f9e (diff)
downloadop-kernel-dev-9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1.zip
op-kernel-dev-9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1.tar.gz
clk: sunxi: Support factor clocks with N factor starting not from 0
The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a N multiplier factor that starts from 1, not 0. This patch adds an option to the factor clk driver's config data structures to specify the base value of N. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--drivers/clk/sunxi/clk-factors.c2
-rw-r--r--drivers/clk/sunxi/clk-factors.h1
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index 3806d97..2057c8a 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -62,7 +62,7 @@ static unsigned long clk_factors_recalc_rate(struct clk_hw *hw,
p = FACTOR_GET(config->pshift, config->pwidth, reg);
/* Calculate the rate */
- rate = (parent_rate * n * (k + 1) >> p) / (m + 1);
+ rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1);
return rate;
}
diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
index 02e1a43..d2d0efa 100644
--- a/drivers/clk/sunxi/clk-factors.h
+++ b/drivers/clk/sunxi/clk-factors.h
@@ -15,6 +15,7 @@ struct clk_factors_config {
u8 mwidth;
u8 pshift;
u8 pwidth;
+ u8 n_start;
};
struct clk_factors {
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