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authorLee Jones <lee.jones@linaro.org>2015-05-12 14:51:00 +0200
committerMaxime Coquelin <maxime.coquelin@st.com>2015-05-13 10:41:40 +0200
commit9723bac00bb71475ff96e1b1252e5c5cff3e116b (patch)
treef8d06670305f17a467fab5c848145c80dbdcaaaa
parent416ef034cbc5280aab16a64cbb1116c588cd02b4 (diff)
downloadop-kernel-dev-9723bac00bb71475ff96e1b1252e5c5cff3e116b.zip
op-kernel-dev-9723bac00bb71475ff96e1b1252e5c5cff3e116b.tar.gz
ARM: STi: STiH416: Add Pinctrl settings for PWM
Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416 based development boards. Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
-rw-r--r--arch/arm/boot/dts/stih416-pinctrl.dtsi50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index 9cccf2d..051fc16 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -216,6 +216,29 @@
};
};
};
+
+ pwm1 {
+ pinctrl_pwm1_chan0_default: pwm1-0-default {
+ st,pins {
+ pwm-out = <&pio3 0 ALT1 OUT>;
+ };
+ };
+ pinctrl_pwm1_chan1_default: pwm1-1-default {
+ st,pins {
+ pwm-out = <&pio4 4 ALT1 OUT>;
+ };
+ };
+ pinctrl_pwm1_chan2_default: pwm1-2-default {
+ st,pins {
+ pwm-out = <&pio4 6 ALT3 OUT>;
+ };
+ };
+ pinctrl_pwm1_chan3_default: pwm1-3-default {
+ st,pins {
+ pwm-out = <&pio4 7 ALT3 OUT>;
+ };
+ };
+ };
};
pin-controller-front {
@@ -310,6 +333,14 @@
st,bank-name = "PIO31";
};
+ pwm0 {
+ pinctrl_pwm0_chan0_default: pwm0-0-default {
+ st,pins {
+ pwm-out = <&pio9 7 ALT2 OUT>;
+ };
+ };
+ };
+
serial2-oe {
pinctrl_serial2_oe: serial2-1 {
st,pins {
@@ -540,6 +571,25 @@
};
};
};
+
+ pwm0 {
+ pinctrl_pwm0_chan1_default: pwm0-1-default {
+ st,pins {
+ pwm-out = <&pio13 2 ALT2 OUT>;
+ };
+ };
+ pinctrl_pwm0_chan2_default: pwm0-2-default {
+ st,pins {
+ pwm-out = <&pio15 2 ALT4 OUT>;
+ };
+ };
+ pinctrl_pwm0_chan3_default: pwm0-3-default {
+ st,pins {
+ pwm-out = <&pio17 4 ALT1 OUT>;
+ };
+ };
+ };
+
};
pin-controller-fvdp-fe {
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