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author | Amelie Delaunay <amelie.delaunay@st.com> | 2018-04-24 13:24:00 +0200 |
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committer | Alexandre Torgue <alexandre.torgue@st.com> | 2018-05-04 09:45:47 +0200 |
commit | 949a0c0dec8596385a3162ee8141224533c517b3 (patch) | |
tree | 50e291697f087934b9148e77fc3b49815d0201fe | |
parent | 9d26228d2448f9acb675190c92a2d6f4719d9023 (diff) | |
download | op-kernel-dev-949a0c0dec8596385a3162ee8141224533c517b3.zip op-kernel-dev-949a0c0dec8596385a3162ee8141224533c517b3.tar.gz |
ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c
Add support for USBH (USB Host) to STM32MP157C SoC.
USBH is a USB Host controller supporting the standard registers used for
full- and low-speed (OHCI controller) and high-speed (EHCI controller).
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
-rw-r--r-- | arch/arm/boot/dts/stm32mp157c.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index 319788c..ab5e1d7 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -718,6 +718,25 @@ status = "disabled"; }; + usbh_ohci: usbh-ohci@5800c000 { + compatible = "generic-ohci"; + reg = <0x5800c000 0x1000>; + clocks = <&rcc USBH>; + resets = <&rcc USBH_R>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + usbh_ehci: usbh-ehci@5800d000 { + compatible = "generic-ehci"; + reg = <0x5800d000 0x1000>; + clocks = <&rcc USBH>; + resets = <&rcc USBH_R>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + companion = <&usbh_ohci>; + status = "disabled"; + }; + dsi: dsi@5a000000 { compatible = "st,stm32-dsi"; reg = <0x5a000000 0x800>; |