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authorDavid Lechner <david@lechnology.com>2016-03-24 18:51:30 -0500
committerSekhar Nori <nsekhar@ti.com>2016-04-14 15:31:48 +0530
commit8a9d088f66f84d7317b4adc64d3d3114f1ee8583 (patch)
tree6b868ee939265ca6306f929785ff73ada3078bdf
parent86cad16087a8cdad88c1ac124afde4de01500c21 (diff)
downloadop-kernel-dev-8a9d088f66f84d7317b4adc64d3d3114f1ee8583.zip
op-kernel-dev-8a9d088f66f84d7317b4adc64d3d3114f1ee8583.tar.gz
ARM: davinci: clk: add set_parent callback for mux clocks
Introduce a set_parent callback that will be used for mux clocks, such as the USB PHY muxes and the async3 clock domain mux. Signed-off-by: David Lechner <david@lechnology.com> [nsekhar@ti.com: checkpatch fixes] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r--arch/arm/mach-davinci/clock.c19
-rw-r--r--arch/arm/mach-davinci/clock.h1
2 files changed, 19 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 3424eac6..34b4f9f 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -195,6 +195,14 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
return -EINVAL;
mutex_lock(&clocks_mutex);
+ if (clk->set_parent) {
+ int ret = clk->set_parent(clk, parent);
+
+ if (ret) {
+ mutex_unlock(&clocks_mutex);
+ return ret;
+ }
+ }
clk->parent = parent;
list_del_init(&clk->childnode);
list_add(&clk->childnode, &clk->parent->children);
@@ -224,8 +232,17 @@ int clk_register(struct clk *clk)
mutex_lock(&clocks_mutex);
list_add_tail(&clk->node, &clocks);
- if (clk->parent)
+ if (clk->parent) {
+ if (clk->set_parent) {
+ int ret = clk->set_parent(clk, clk->parent);
+
+ if (ret) {
+ mutex_unlock(&clocks_mutex);
+ return ret;
+ }
+ }
list_add_tail(&clk->childnode, &clk->parent->children);
+ }
mutex_unlock(&clocks_mutex);
/* If rate is already set, use it */
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 1e4e836..e2a5437 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -106,6 +106,7 @@ struct clk {
int (*reset) (struct clk *clk, bool reset);
void (*clk_enable) (struct clk *clk);
void (*clk_disable) (struct clk *clk);
+ int (*set_parent) (struct clk *clk, struct clk *parent);
};
/* Clock flags: SoC-specific flags start at BIT(16) */
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