diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2014-10-04 16:02:27 +0200 |
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committer | Lee Jones <lee.jones@linaro.org> | 2014-11-10 15:21:58 +0000 |
commit | 871c3cf4ea7d5baf58e0a40bce7431ca5525aa2a (patch) | |
tree | 7d205496660224832cf10b3f9392e86dced99cc5 | |
parent | f114040e3ea6e07372334ade75d1ee0775c355e1 (diff) | |
download | op-kernel-dev-871c3cf4ea7d5baf58e0a40bce7431ca5525aa2a.zip op-kernel-dev-871c3cf4ea7d5baf58e0a40bce7431ca5525aa2a.tar.gz |
mfd: stmpe: Fix STMPE24xx GPMR LSB
The least significat byte of the GPIO value read register
on the STMPE24xx series is on addres 0xA4 not 0xA5. Correct
against datasheet and tested on the STMPE2401 hardware.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r-- | drivers/mfd/stmpe.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mfd/stmpe.h b/drivers/mfd/stmpe.h index 2d045f2..bee0abf 100644 --- a/drivers/mfd/stmpe.h +++ b/drivers/mfd/stmpe.h @@ -269,7 +269,7 @@ int stmpe_remove(struct stmpe *stmpe); #define STMPE24XX_REG_CHIP_ID 0x80 #define STMPE24XX_REG_IEGPIOR_LSB 0x18 #define STMPE24XX_REG_ISGPIOR_MSB 0x19 -#define STMPE24XX_REG_GPMR_LSB 0xA5 +#define STMPE24XX_REG_GPMR_LSB 0xA4 #define STMPE24XX_REG_GPSR_LSB 0x85 #define STMPE24XX_REG_GPCR_LSB 0x88 #define STMPE24XX_REG_GPDR_LSB 0x8B |