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| author | Russell King <rmk+kernel@armlinux.org.uk> | 2017-01-02 14:58:41 +0000 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-01-04 11:38:07 +0100 |
| commit | 744771fc982a0670f4828f36504ba71f83b074d9 (patch) | |
| tree | ae3b02e3e06c0356c9fb7169ec0bbf04b8479559 | |
| parent | 2cd367356a76fff5de652c68d6b6541d329ad5f6 (diff) | |
| download | op-kernel-dev-744771fc982a0670f4828f36504ba71f83b074d9.zip op-kernel-dev-744771fc982a0670f4828f36504ba71f83b074d9.tar.gz | |
ARM: dts: armada388-clearfog: move SPI flash into microsom
The optional SPI flash is fitted to the microsom, not the clearfog
board, so it should be specified in the microsom DTS include file.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| -rw-r--r-- | arch/arm/boot/dts/armada-388-clearfog.dts | 14 | ||||
| -rw-r--r-- | arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 14 |
2 files changed, 16 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts index 4744a31..00618d8 100644 --- a/arch/arm/boot/dts/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/armada-388-clearfog.dts @@ -423,9 +423,8 @@ &spi1 { /* - * We don't seem to have the W25Q32 on the - * A1 Rev 2.0 boards, so disable SPI. - * CS0: W25Q32 (doesn't appear to be present) + * Add SPI CS pins for clearfog: + * CS0: W25Q32 (not populated on uSOM) * CS1: * CS2: mikrobus */ @@ -434,13 +433,4 @@ &mikro_spi_pins>; pinctrl-names = "default"; status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "w25q32", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <3000000>; - status = "disabled"; - }; }; diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi index 02f18ab..c67e617 100644 --- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi +++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi @@ -126,3 +126,17 @@ }; }; + +&spi1 { + /* The microsom has an optional W25Q32 on board, connected to CS0 */ + pinctrl-0 = <&spi1_pins>; + + w25q32: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "w25q32", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <3000000>; + status = "disabled"; + }; +}; |
