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| author | Stefan Agner <stefan@agner.ch> | 2018-01-10 22:04:53 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-02-12 21:13:08 +0800 |
| commit | 71a0febaa443fa5506ba00622047237949b9129d (patch) | |
| tree | 8af8846c94b51da02ef5c7c33daf35e969dcdb19 | |
| parent | c28bb160662604478d21b744c9525df62445eaf5 (diff) | |
| download | op-kernel-dev-71a0febaa443fa5506ba00622047237949b9129d.zip op-kernel-dev-71a0febaa443fa5506ba00622047237949b9129d.tar.gz | |
ARM: dts: imx6ull: add UART8 support
In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of
AIPS-1. Clocks and interrupts remain the same.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6ull.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index bc2cd4f..571ddd7 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -43,6 +43,9 @@ #include "imx6ull-pinfunc.h" #include "imx6ull-pinfunc-snvs.h" +/* Delete UART8 in AIPS-1 (i.MX6UL specific) */ +/delete-node/ &uart8; + / { soc { aips3: aips-bus@2200000 { @@ -56,6 +59,17 @@ compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; + + uart8: serial@2288000 { + compatible = "fsl,imx6ul-uart", + "fsl,imx6q-uart"; + reg = <0x02288000 0x4000>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_UART8_IPG>, + <&clks IMX6UL_CLK_UART8_SERIAL>; + clock-names = "ipg", "per"; + status = "disabled"; + }; }; }; }; |
