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| author | Imre Deak <imre.deak@intel.com> | 2016-04-20 20:46:04 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2016-04-22 16:30:52 +0300 |
| commit | 67856d4d3ccdd4612bcef3a7b624aa33e5b6828d (patch) | |
| tree | 9b1891374f5a047978dbb1643a365f3aed8f867e | |
| parent | df28564d9848358c9a4104d2b4a6c44b384fcc9c (diff) | |
| download | op-kernel-dev-67856d4d3ccdd4612bcef3a7b624aa33e5b6828d.zip op-kernel-dev-67856d4d3ccdd4612bcef3a7b624aa33e5b6828d.tar.gz | |
drm/i915/bxt: Use PHY0 GRC value for HW state verification
It's possible that BIOS enables PHY1 only to read out the GRC value from
it to be used in PHY0 and then disables PHY1. In this case we can't use
the PHY1 GRC value for state verification, so use instead the one in PHY0
always.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461174366-16758-2-git-send-email-imre.deak@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index a887b31..59dbd47 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1778,7 +1778,7 @@ static void broxton_phy_init(struct drm_i915_private *dev_priv, DRM_DEBUG_DRIVER("DDI PHY %d already enabled, " "won't reprogram it\n", phy); /* Still read out the GRC value for state verification */ - if (phy == DPIO_PHY1) + if (phy == DPIO_PHY0) dev_priv->bxt_phy_grc = broxton_get_grc(dev_priv, phy); return; |
