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| author | Nicolas Ferre <nicolas.ferre@microchip.com> | 2017-10-10 13:09:48 +0300 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2017-10-10 15:26:20 +0200 |
| commit | 66156ea9e9941ef38dced44f1cc18cd8763112bb (patch) | |
| tree | f037e8e6691f31c7d67681e7f74dd05b374d3ab5 | |
| parent | e5f0472f7a10a0a35f8ee07771ba615de4c60aac (diff) | |
| download | op-kernel-dev-66156ea9e9941ef38dced44f1cc18cd8763112bb.zip op-kernel-dev-66156ea9e9941ef38dced44f1cc18cd8763112bb.tar.gz | |
ARM: dts: at91: at91sam9x25ek: add pwm0
Add the PWM0 interface and one output of channel 0 (on PC10) on this headless
board. The output conflicts with LCD and ISI, so only enable it for this
particular board of the series (ISI is enabled on at91sam9g25ek, as an example
but we can do the other way around).
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
| -rw-r--r-- | arch/arm/boot/dts/at91sam9x25ek.dts | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9x25ek.dts b/arch/arm/boot/dts/at91sam9x25ek.dts index f8360fb..f705a31 100644 --- a/arch/arm/boot/dts/at91sam9x25ek.dts +++ b/arch/arm/boot/dts/at91sam9x25ek.dts @@ -29,6 +29,12 @@ phy-mode = "rmii"; status = "okay"; }; + + pwm0: pwm@f8034000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_pwm0_1>; + status = "okay"; + }; }; }; }; |
