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authorJoshua Clayton <stillcompiling@gmail.com>2017-06-14 10:36:30 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-07-17 17:26:14 +0200
commit60acfa593731f496a9f258d2e118297ef956d98d (patch)
treea3f1281c846b1092bc4e1fa83f48cd772e84d322
parent5692fae0742df7587189174b1cba364d22846c85 (diff)
downloadop-kernel-dev-60acfa593731f496a9f258d2e118297ef956d98d.zip
op-kernel-dev-60acfa593731f496a9f258d2e118297ef956d98d.tar.gz
ARM: dts: imx6q-evi: support altera-ps-spi
Add support for Altera FPGA connected to an spi port to the evi devicetree file Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--arch/arm/boot/dts/imx6q-evi.dts16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index 1f0f950..e0aea78 100644
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -94,6 +94,15 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
status = "okay";
+
+ fpga: fpga@0 {
+ compatible = "altr,fpga-passive-serial";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ pinctrl-0 = <&pinctrl_fpgaspi>;
+ nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+ nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+ };
};
&ecspi3 {
@@ -319,6 +328,13 @@
>;
};
+ pinctrl_fpgaspi: fpgaspigrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
+ >;
+ };
+
pinctrl_gpminand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
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