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authorChris Wilson <chris@chris-wilson.co.uk>2018-01-30 16:44:57 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2018-01-31 10:49:16 +0000
commit5b364bec5cbfd6c23505952a40150b053ec551d1 (patch)
tree2b4d76ce4a9d39b7b1940bc0ff5a8c344c82b78b
parentb1852d362f31ac0c233e7c7b040f7c58bd381267 (diff)
downloadop-kernel-dev-5b364bec5cbfd6c23505952a40150b053ec551d1.zip
op-kernel-dev-5b364bec5cbfd6c23505952a40150b053ec551d1.tar.gz
drm/i915: Flush ggtt writes through the old fenced vma before changing fences
This is a precautionary measure as I have no evidence to suggest we've hit a bug here (I was hoping this might explain gdg's odd behaviour, but alas), but given that we have a function to flush the ggtt writes it seems prudent to use it prior to changing the fence register. Due to the intrinsic nature of the GTT often operating as an independent mmio path, we should not just rely on the write to the fence acting as a full flush for GTT writes. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180130164457.14037-1-chris@chris-wilson.co.uk
-rw-r--r--drivers/gpu/drm/i915/i915_gem_fence_reg.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 012250f..b8338d7 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -230,10 +230,14 @@ static int fence_update(struct drm_i915_fence_reg *fence,
}
if (fence->vma) {
- ret = i915_gem_active_retire(&fence->vma->last_fence,
- &fence->vma->obj->base.dev->struct_mutex);
+ struct i915_vma *old = fence->vma;
+
+ ret = i915_gem_active_retire(&old->last_fence,
+ &old->obj->base.dev->struct_mutex);
if (ret)
return ret;
+
+ i915_vma_flush_writes(old);
}
if (fence->vma && fence->vma != vma) {
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