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| author | Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | 2014-08-29 20:15:08 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-09-02 15:03:14 -0700 |
| commit | 5acb7bbbab7cec0ee68295e3ade929c880ad461e (patch) | |
| tree | a8c9542ca2a47e87da82309e08eaab5502a21966 | |
| parent | 105299381d8720a3afd4252689ae8551f49944be (diff) | |
| download | op-kernel-dev-5acb7bbbab7cec0ee68295e3ade929c880ad461e.zip op-kernel-dev-5acb7bbbab7cec0ee68295e3ade929c880ad461e.tar.gz | |
ARM: shmobile: r8a7794: document MSTP clock support
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt index 8a92b5f..a03c8c0 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt @@ -14,6 +14,7 @@ Required Properties: - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks + - "renesas,r8a7794-mstp-clocks" for R8A7794 (R-Car E2) MSTP gate clocks - "renesas,cpg-mstp-clock" for generic MSTP gate clocks - reg: Base address and length of the I/O mapped registers used by the MSTP clocks. The first register is the clock control register and is mandatory. |
