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| author | James Hogan <james.hogan@imgtec.com> | 2016-05-11 15:50:32 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 15:30:25 +0200 |
| commit | 4b62fad50efd1cff9017d3e4dcfcf5c4b6c13193 (patch) | |
| tree | ae7ebc8a3e3e6151cafb2c49cc932671f2275508 | |
| parent | 382208dc8c856b4d8ba602031412842b121decb2 (diff) | |
| download | op-kernel-dev-4b62fad50efd1cff9017d3e4dcfcf5c4b6c13193.zip op-kernel-dev-4b62fad50efd1cff9017d3e4dcfcf5c4b6c13193.tar.gz | |
MIPS: Print GuestCtl1 on machine check exception
The GuestCtl1 CP0 register can contain the GuestID used for root TLB
operations, which affects TLB matching. The other TLB registers are
already dumped out to the log on a machine check exception due to
multiple matching TLB entries, so also dump the value of the GuestCtl1
register if GuestIDs are supported.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13232/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/lib/dump_tlb.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 2cb10db..0f80b93 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -19,6 +19,8 @@ void dump_tlb_regs(void) pr_info("Index : %0x\n", read_c0_index()); pr_info("PageMask : %0x\n", read_c0_pagemask()); + if (cpu_has_guestid) + pr_info("GuestCtl1: %0x\n", read_c0_guestctl1()); pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi()); pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0()); pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1()); |
