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author | Paul Mundt <lethal@linux-sh.org> | 2007-11-10 19:16:55 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-28 13:18:42 +0900 |
commit | 36bcd39dbca824daffe16d607ae574b6edc7d31a (patch) | |
tree | 93c096c3703b1a89c0a440c4ff54fac4cf141641 | |
parent | af3c7dfe822b598a2f977098101ed8b63cf0fdd1 (diff) | |
download | op-kernel-dev-36bcd39dbca824daffe16d607ae574b6edc7d31a.zip op-kernel-dev-36bcd39dbca824daffe16d607ae574b6edc7d31a.tar.gz |
sh: Split out 29-bit and 32-bit physical mode definitions.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/mm/Kconfig | 11 | ||||
-rw-r--r-- | arch/sh/mm/Makefile | 2 | ||||
-rw-r--r-- | include/asm-sh/pgtable.h | 17 |
3 files changed, 29 insertions, 1 deletions
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index a7bbc2c..8192c87 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -46,9 +46,20 @@ config MEMORY_SIZE as 0x00400000 which was the default value before this became configurable. +# Physical addressing modes + +config 29BIT + def_bool !32BIT + depends on SUPERH32 + config 32BIT + bool + default y if CPU_SH5 + +config PMB bool "Support 32-bit physical addressing through PMB" depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) + select 32BIT default y help If you say Y here, physical addressing will be extended to diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile index aa44607..d35cacc 100644 --- a/arch/sh/mm/Makefile +++ b/arch/sh/mm/Makefile @@ -31,7 +31,7 @@ endif endif obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o -obj-$(CONFIG_32BIT) += pmb.o +obj-$(CONFIG_PMB) += pmb.o obj-$(CONFIG_NUMA) += numa.o EXTRA_CFLAGS += -Werror diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 8f1e8be8d..6ab3ba8 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -29,6 +29,23 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #endif /* !__ASSEMBLY__ */ /* + * Effective and physical address definitions, to aid with sign + * extension. + */ +#define NEFF 32 +#define NEFF_SIGN (1LL << (NEFF - 1)) +#define NEFF_MASK (-1LL << NEFF) + +#ifdef CONFIG_29BIT +#define NPHYS 29 +#else +#define NPHYS 32 +#endif + +#define NPHYS_SIGN (1LL << (NPHYS - 1)) +#define NPHYS_MASK (-1LL << NPHYS) + +/* * traditional two-level paging structure */ /* PTE bits */ |