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| author | Linus Walleij <linus.walleij@linaro.org> | 2013-05-29 19:30:04 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-05-30 09:51:24 +0200 |
| commit | 2a9c8faf9f95bd71a8e2699876f4fcf3c301df4b (patch) | |
| tree | b5c783b81b5df7740fcdc8c3655593c439a4e387 | |
| parent | 90c40257fe1a9cd0373507cfb05390ad1f2c06ee (diff) | |
| download | op-kernel-dev-2a9c8faf9f95bd71a8e2699876f4fcf3c301df4b.zip op-kernel-dev-2a9c8faf9f95bd71a8e2699876f4fcf3c301df4b.tar.gz | |
ARM: ux500: cut chip-select GPIOs from SSP device
What GPIO pin is used with which device on the SSP/SPI bus
is as board-specific as it gets, so it does not belong here
in the core SoC file, and it is disabled so it doesn't hurt
to delete this.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/dbx5x0.dtsi | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index b4b542b..12f36d4 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -589,11 +589,6 @@ #address-cells = <1>; #size-cells = <0>; status = "disabled"; - - // Add one of these for each child device - cs-gpios = <&gpio0 31 0x4 &gpio4 14 0x4 &gpio4 16 0x4 - &gpio6 22 0x4 &gpio7 0 0x4>; - }; uart@80120000 { |
