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| author | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:16 +0200 |
|---|---|---|
| committer | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:16 +0200 |
| commit | 15ab218318892f60e65c98bba81d725b3c19dab0 (patch) | |
| tree | a87c5a9b740f1e4a5338bd73bd28bf9c1f92680e | |
| parent | cfaf025112d3856637ff34a767ef785ef5cf2ca9 (diff) | |
| download | op-kernel-dev-15ab218318892f60e65c98bba81d725b3c19dab0.zip op-kernel-dev-15ab218318892f60e65c98bba81d725b3c19dab0.tar.gz | |
ARM: LPC32xx: Add NAND flash timing to PHY3250 board dts
This patch adds necessary NAND flash timings to the board specific dts file of
the PHY3250 reference board of the LPC32xx SoC.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
| -rw-r--r-- | arch/arm/boot/dts/phy3250.dts | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts index c4ff6d1..d7e985e 100644 --- a/arch/arm/boot/dts/phy3250.dts +++ b/arch/arm/boot/dts/phy3250.dts @@ -54,6 +54,17 @@ #address-cells = <1>; #size-cells = <1>; + nxp,wdr-clks = <14>; + nxp,wwidth = <40000000>; + nxp,whold = <100000000>; + nxp,wsetup = <100000000>; + nxp,rdr-clks = <14>; + nxp,rwidth = <40000000>; + nxp,rhold = <66666666>; + nxp,rsetup = <100000000>; + nand-on-flash-bbt; + gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */ + mtd0@00000000 { label = "phy3250-boot"; reg = <0x00000000 0x00064000>; |
