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author | Marek Szyprowski <m.szyprowski@samsung.com> | 2016-12-09 08:22:10 +0100 |
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committer | Krzysztof Kozlowski <krzk@kernel.org> | 2016-12-28 19:25:13 +0200 |
commit | 087ce39cdf4b0a95344ae18676017aacfe51b954 (patch) | |
tree | 5c7798e4d54759556f3b405d972e6fcb0b91ad2e | |
parent | 7ce7d89f48834cefece7804d38fc5d85382edf77 (diff) | |
download | op-kernel-dev-087ce39cdf4b0a95344ae18676017aacfe51b954.zip op-kernel-dev-087ce39cdf4b0a95344ae18676017aacfe51b954.tar.gz |
ARM: dts: exynos: Correct clocks for Exynos4 I2S module
"iis", "i2s_opclk0" and "i2s_opclk1" are standard clocks for Exynos4 I2S
hardware module, so they should be defined in .dtsi file not in the random
board .dts file.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
-rw-r--r-- | arch/arm/boot/dts/exynos4.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos4412-itop-elite.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 |
3 files changed, 4 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index c64737b..23d8560 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -64,8 +64,10 @@ i2s0: i2s@03830000 { compatible = "samsung,s5pv210-i2s"; reg = <0x03830000 0x100>; - clocks = <&clock_audss EXYNOS_I2S_BUS>; - clock-names = "iis"; + clocks = <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>, + <&clock_audss EXYNOS_SCLK_I2S>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; #clock-cells = <1>; clock-output-names = "i2s_cdclk0"; dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>; diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts index 76d87f3..1ac9129 100644 --- a/arch/arm/boot/dts/exynos4412-itop-elite.dts +++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts @@ -198,10 +198,6 @@ pinctrl-0 = <&i2s0_bus>; pinctrl-names = "default"; status = "okay"; - clocks = <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_DOUT_AUD_BUS>, - <&clock_audss EXYNOS_SCLK_I2S>; - clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; }; &pinctrl_1 { diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 8aa19ba..7815efd 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -503,10 +503,6 @@ pinctrl-0 = <&i2s0_bus>; pinctrl-names = "default"; status = "okay"; - clocks = <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_DOUT_AUD_BUS>, - <&clock_audss EXYNOS_SCLK_I2S>; - clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; }; &mixer { |