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authorShawn Guo <shawn.guo@linaro.org>2011-09-21 21:24:04 +0800
committerGrant Likely <grant.likely@secretlab.ca>2011-09-21 10:26:42 -0600
commit0e44b6eccfcb0b2da65b0e9eddd5d8b4eac5d8df (patch)
tree7bc3e9d54c7e35e8ce43852f296708d5a7419d72
parent479a0c7eee68243ad9915a9ccc217a35c4e5e0e2 (diff)
downloadop-kernel-dev-0e44b6eccfcb0b2da65b0e9eddd5d8b4eac5d8df.zip
op-kernel-dev-0e44b6eccfcb0b2da65b0e9eddd5d8b4eac5d8df.tar.gz
gpio/mxc: add chained_irq_enter/exit() to mx3_gpio_irq_handler()
The mx3_gpio_irq_handler() is also called on imx6q which has GIC as the primary interrupt controller. As GIC implements the fasteoi flow control, we need to add chained_irq_enter/exit() to mx3_gpio_irq_handler() for signaling EOI, otherwise system will hang whenever there is a gpio irq triggered. v2: use chained_irq_{enter,exit}() Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r--drivers/gpio/gpio-mxc.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 4340aca..82f7b65 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -30,6 +30,7 @@
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm-generic/bug.h>
+#include <asm/mach/irq.h>
enum mxc_gpio_hwtype {
IMX1_GPIO, /* runs on i.mx1 */
@@ -232,10 +233,15 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
{
u32 irq_stat;
struct mxc_gpio_port *port = irq_get_handler_data(irq);
+ struct irq_chip *chip = irq_get_chip(irq);
+
+ chained_irq_enter(chip, desc);
irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
mxc_gpio_irq_handler(port, irq_stat);
+
+ chained_irq_exit(chip, desc);
}
/* MX2 has one interrupt *for all* gpio ports */
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