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author | Robert Richter <robert.richter@amd.com> | 2010-02-26 13:45:24 +0100 |
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committer | Robert Richter <robert.richter@amd.com> | 2010-02-26 15:28:16 +0100 |
commit | cfc9c0b450176a077205ef39092f0dc1a04e020a (patch) | |
tree | 68e10fea2b2759458e6b955e8d2d24fe85bfbcdd | |
parent | c17c8fbf349482e89b57d1b800e83e9f4cf40c47 (diff) | |
download | op-kernel-dev-cfc9c0b450176a077205ef39092f0dc1a04e020a.zip op-kernel-dev-cfc9c0b450176a077205ef39092f0dc1a04e020a.tar.gz |
oprofile/x86: fix msr access to reserved counters
During switching virtual counters there is access to perfctr msrs. If
the counter is not available this fails due to an invalid
address. This patch fixes this.
Cc: stable@kernel.org
Signed-off-by: Robert Richter <robert.richter@amd.com>
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index f4ebc45..6a58256 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c @@ -127,7 +127,7 @@ static void op_mux_switch_ctrl(struct op_x86_model_spec const *model, /* enable active counters */ for (i = 0; i < NUM_COUNTERS; ++i) { int virt = op_x86_phys_to_virt(i); - if (!counter_config[virt].enabled) + if (!reset_value[virt]) continue; rdmsrl(msrs->controls[i].addr, val); val &= model->reserved; @@ -163,7 +163,8 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, /* setup reset_value */ for (i = 0; i < NUM_VIRT_COUNTERS; ++i) { - if (counter_config[i].enabled) + if (counter_config[i].enabled + && msrs->counters[op_x86_virt_to_phys(i)].addr) reset_value[i] = counter_config[i].count; else reset_value[i] = 0; @@ -197,9 +198,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model, /* enable active counters */ for (i = 0; i < NUM_COUNTERS; ++i) { int virt = op_x86_phys_to_virt(i); - if (!counter_config[virt].enabled) - continue; - if (!msrs->counters[i].addr) + if (!reset_value[virt]) continue; /* setup counter registers */ |