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| author | Suman Tripathi <stripathi@apm.com> | 2014-08-28 14:51:21 +0530 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2014-09-06 11:27:14 +0900 |
| commit | 0bed13bebd6c99d097796d2ca6c4f10fb5b2eabc (patch) | |
| tree | 461e7ed7cfc5e7d32c5c76f6fad5218cdc01fd3f | |
| parent | c5edfff9db6f4d2c35c802acb4abe0df178becee (diff) | |
| download | op-kernel-dev-0bed13bebd6c99d097796d2ca6c4f10fb5b2eabc.zip op-kernel-dev-0bed13bebd6c99d097796d2ca6c4f10fb5b2eabc.tar.gz | |
ahci_xgene: Skip the PHY and clock initialization if already configured by the firmware.
This patch implements the feature to skip the PHY and clock
initialization if it is already configured by the firmware.
Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Suman Tripathi <stripathi@apm.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
| -rw-r--r-- | drivers/ata/ahci_xgene.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c index c696230..37501fd 100644 --- a/drivers/ata/ahci_xgene.c +++ b/drivers/ata/ahci_xgene.c @@ -145,6 +145,14 @@ static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc) return rc; } +static bool xgene_ahci_is_memram_inited(struct xgene_ahci_context *ctx) +{ + void __iomem *diagcsr = ctx->csr_diag; + + return (readl(diagcsr + CFG_MEM_RAM_SHUTDOWN) == 0 && + readl(diagcsr + BLOCK_MEM_RDY) == 0xFFFFFFFF); +} + /** * xgene_ahci_read_id - Read ID data from the specified device * @dev: device @@ -467,6 +475,11 @@ static int xgene_ahci_probe(struct platform_device *pdev) return -ENODEV; } + if (xgene_ahci_is_memram_inited(ctx)) { + dev_info(dev, "skip clock and PHY initialization\n"); + goto skip_clk_phy; + } + /* Due to errata, HW requires full toggle transition */ rc = ahci_platform_enable_clks(hpriv); if (rc) @@ -479,7 +492,7 @@ static int xgene_ahci_probe(struct platform_device *pdev) /* Configure the host controller */ xgene_ahci_hw_init(hpriv); - +skip_clk_phy: hpriv->flags = AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_NCQ; rc = ahci_platform_init_host(pdev, hpriv, &xgene_ahci_port_info); |
