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authorThomas Gleixner <tglx@linutronix.de>2011-06-06 11:51:43 +0200
committerSekhar Nori <nsekhar@ti.com>2011-06-08 14:33:52 +0530
commit7416401661fad5c7ee9edb17cb54e7bff7a74dfe (patch)
tree598260d3ccbdeb7bb8b93c0ee6ec79fda48bbf28
parent59c5f46fbe01a00eedf54a23789634438bb80603 (diff)
downloadop-kernel-dev-7416401661fad5c7ee9edb17cb54e7bff7a74dfe.zip
op-kernel-dev-7416401661fad5c7ee9edb17cb54e7bff7a74dfe.tar.gz
arm: davinci: Fix fallout from generic irq chip conversion
The code which does the chained handler setup was overwriting chip_data. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Holger Hans Peter Freyther <holger@freyther.de> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r--arch/arm/mach-davinci/gpio.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index a0b8388..e722139 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -252,9 +252,11 @@ static struct irq_chip gpio_irqchip = {
static void
gpio_irq_handler(unsigned irq, struct irq_desc *desc)
{
- struct davinci_gpio_regs __iomem *g = irq2regs(irq);
+ struct davinci_gpio_regs __iomem *g;
u32 mask = 0xffff;
+ g = (__force struct davinci_gpio_regs __iomem *) irq_desc_get_handler_data(desc);
+
/* we only care about one bank */
if (irq & 1)
mask <<= 16;
@@ -422,8 +424,7 @@ static int __init davinci_gpio_irq_setup(void)
/* set up all irqs in this bank */
irq_set_chained_handler(bank_irq, gpio_irq_handler);
- irq_set_chip_data(bank_irq, (__force void *)g);
- irq_set_handler_data(bank_irq, (void *)irq);
+ irq_set_handler_data(bank_irq, (__force void *)g);
for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
irq_set_chip(irq, &gpio_irqchip);
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