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authorChen Liqin <liqin.chen@sunplusct.com>2009-11-18 13:22:33 +0800
committerChen Liqin <liqin.chen@sunplusct.com>2009-12-17 18:28:31 +0800
commit11ab3f3d3c2474d3ed6912443de74c3972bd6f23 (patch)
tree51b121a80494989c220b10dbef1f2c463882899f
parent718deb6b61e34c200c1f2b706176d9aac334cb2d (diff)
downloadop-kernel-dev-11ab3f3d3c2474d3ed6912443de74c3972bd6f23.zip
op-kernel-dev-11ab3f3d3c2474d3ed6912443de74c3972bd6f23.tar.gz
score: add flush_dcahce_page and PG_dcache_dirty define
Signed-off-by: Cui Bixiong <bixiong@sunnorth.com.cn> Signed-off-by: Chen Liqin <liqin.chen@sunplusct.com> modified: arch/score/include/asm/cacheflush.h modified: arch/score/mm/cache.c
-rw-r--r--arch/score/include/asm/cacheflush.h4
-rw-r--r--arch/score/mm/cache.c26
2 files changed, 27 insertions, 3 deletions
diff --git a/arch/score/include/asm/cacheflush.h b/arch/score/include/asm/cacheflush.h
index caaba24..1d545d0 100644
--- a/arch/score/include/asm/cacheflush.h
+++ b/arch/score/include/asm/cacheflush.h
@@ -14,10 +14,12 @@ extern void flush_cache_sigtramp(unsigned long addr);
extern void flush_icache_all(void);
extern void flush_icache_range(unsigned long start, unsigned long end);
extern void flush_dcache_range(unsigned long start, unsigned long end);
+extern void flush_dcache_page(struct page *page);
+
+#define PG_dcache_dirty PG_arch_1
#define flush_cache_dup_mm(mm) do {} while (0)
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page) do {} while (0)
#define flush_dcache_mmap_lock(mapping) do {} while (0)
#define flush_dcache_mmap_unlock(mapping) do {} while (0)
#define flush_cache_vmap(start, end) do {} while (0)
diff --git a/arch/score/mm/cache.c b/arch/score/mm/cache.c
index dbac9d9..b25e957 100644
--- a/arch/score/mm/cache.c
+++ b/arch/score/mm/cache.c
@@ -29,6 +29,7 @@
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/sched.h>
+#include <linux/fs.h>
#include <asm/mmu_context.h>
@@ -51,6 +52,27 @@ static void flush_data_cache_page(unsigned long addr)
}
}
+void flush_dcache_page(struct page *page)
+{
+ struct address_space *mapping = page_mapping(page);
+ unsigned long addr;
+
+ if (PageHighMem(page))
+ return;
+ if (mapping && !mapping_mapped(mapping)) {
+ set_bit(PG_dcache_dirty, &(page)->flags);
+ return;
+ }
+
+ /*
+ * We could delay the flush for the !page_mapping case too. But that
+ * case is for exec env/arg pages and those are %99 certainly going to
+ * get faulted into the tlb (and thus flushed) anyways.
+ */
+ addr = (unsigned long) page_address(page);
+ flush_data_cache_page(addr);
+}
+
/* called by update_mmu_cache. */
void __update_cache(struct vm_area_struct *vma, unsigned long address,
pte_t pte)
@@ -63,11 +85,11 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
if (unlikely(!pfn_valid(pfn)))
return;
page = pfn_to_page(pfn);
- if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) {
+ if (page_mapping(page) && test_bit(PG_dcache_dirty, &(page)->flags)) {
addr = (unsigned long) page_address(page);
if (exec)
flush_data_cache_page(addr);
- clear_bit(PG_arch_1, &page->flags);
+ clear_bit(PG_dcache_dirty, &(page)->flags);
}
}
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