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authorKrzysztof HaƂasa <khalasa@piap.pl>2014-11-14 09:35:06 -0300
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2014-11-21 15:45:35 -0200
commit3c787b108fe0d1c341a76e718a25897ae14673cf (patch)
tree2e31ba0629b6a6195e35e0fb7bc193383bfb7d79
parentb31eb901c4e5eeef4c83c43dfbc7fe0d4348cb21 (diff)
downloadop-kernel-dev-3c787b108fe0d1c341a76e718a25897ae14673cf.zip
op-kernel-dev-3c787b108fe0d1c341a76e718a25897ae14673cf.tar.gz
[media] solo6x10: fix a race in IRQ handler
The IRQs have to be acknowledged before they are serviced, otherwise some events may be skipped. Also, acknowledging IRQs just before returning from the handler doesn't leave enough time for the device to deassert the INTx line, and for bridges to propagate this change. This resulted in twice the IRQ rate on ARMv6 dual core CPU. Signed-off-by: Krzysztof Ha?asa <khalasa@piap.pl> Acked-by: Andrey Utkin <andrey.utkin@corp.bluecherry.net> Tested-by: Andrey Utkin <andrey.utkin@corp.bluecherry.net> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
-rw-r--r--drivers/media/pci/solo6x10/solo6x10-core.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/media/pci/solo6x10/solo6x10-core.c b/drivers/media/pci/solo6x10/solo6x10-core.c
index 172583d..8cbe6b4 100644
--- a/drivers/media/pci/solo6x10/solo6x10-core.c
+++ b/drivers/media/pci/solo6x10/solo6x10-core.c
@@ -105,11 +105,8 @@ static irqreturn_t solo_isr(int irq, void *data)
if (!status)
return IRQ_NONE;
- if (status & ~solo_dev->irq_mask) {
- solo_reg_write(solo_dev, SOLO_IRQ_STAT,
- status & ~solo_dev->irq_mask);
- status &= solo_dev->irq_mask;
- }
+ /* Acknowledge all interrupts immediately */
+ solo_reg_write(solo_dev, SOLO_IRQ_STAT, status);
if (status & SOLO_IRQ_PCI_ERR)
solo_p2m_error_isr(solo_dev);
@@ -132,9 +129,6 @@ static irqreturn_t solo_isr(int irq, void *data)
if (status & SOLO_IRQ_G723)
solo_g723_isr(solo_dev);
- /* Clear all interrupts handled */
- solo_reg_write(solo_dev, SOLO_IRQ_STAT, status);
-
return IRQ_HANDLED;
}
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