summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2015-10-22 15:35:00 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2015-10-26 16:28:46 +0200
commite97d8fbec130767236ead8641ae0205f541df68b (patch)
treed039d924a8edfbc75fe976b37d93f4378856f3f3
parent6a42d0f4b32d9f4c978bf03f286e488186ecba80 (diff)
downloadop-kernel-dev-e97d8fbec130767236ead8641ae0205f541df68b.zip
op-kernel-dev-e97d8fbec130767236ead8641ae0205f541df68b.tar.gz
drm/i915: Add NEEDS_FORCEWAKE() checks for vlv/chv
Include an early NEEDS_FORCEWAKE() check for vlv and chv. Hopefully that will avoid doing so many range checks in for many register accesses (at least for all display registers). Note that vlv already had the check in the write path since it shares the gen6+ code for that. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1445517300-28173-6-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/intel_uncore.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index f38e88b..f0f97b2 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -726,7 +726,9 @@ static u##x \
vlv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
enum forcewake_domains fw_engine = 0; \
GEN6_READ_HEADER(x); \
- if (FORCEWAKE_VLV_RENDER_RANGE_OFFSET(reg)) \
+ if (!NEEDS_FORCE_WAKE(reg)) \
+ fw_engine = 0; \
+ else if (FORCEWAKE_VLV_RENDER_RANGE_OFFSET(reg)) \
fw_engine = FORCEWAKE_RENDER; \
else if (FORCEWAKE_VLV_MEDIA_RANGE_OFFSET(reg)) \
fw_engine = FORCEWAKE_MEDIA; \
@@ -741,7 +743,9 @@ static u##x \
chv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
enum forcewake_domains fw_engine = 0; \
GEN6_READ_HEADER(x); \
- if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
+ if (!NEEDS_FORCE_WAKE(reg)) \
+ fw_engine = 0; \
+ else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
fw_engine = FORCEWAKE_RENDER; \
else if (FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg)) \
fw_engine = FORCEWAKE_MEDIA; \
@@ -935,7 +939,8 @@ static void \
chv_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
enum forcewake_domains fw_engine = 0; \
GEN6_WRITE_HEADER; \
- if (is_gen8_shadowed(dev_priv, reg)) \
+ if (!NEEDS_FORCE_WAKE(reg) || \
+ is_gen8_shadowed(dev_priv, reg)) \
fw_engine = 0; \
else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
fw_engine = FORCEWAKE_RENDER; \
OpenPOWER on IntegriCloud