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authorMarek Szyprowski <m.szyprowski@samsung.com>2011-12-23 09:30:47 +0100
committerMarek Szyprowski <m.szyprowski@samsung.com>2012-03-28 16:36:43 +0200
commit8a4134322bd429d24f71147eb59a47a981e8f63a (patch)
treebce9920c5f163669666693cd9d307bd865ad2bb1
parent9adc537452e1e341cabd39a02d4788d3c510b0e2 (diff)
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op-kernel-dev-8a4134322bd429d24f71147eb59a47a981e8f63a.tar.gz
common: DMA-mapping: add WRITE_COMBINE attribute
DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be buffered to improve performance. It will be used by the replacement for ARM/ARV32 specific dma_alloc_writecombine() function. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--Documentation/DMA-attributes.txt10
-rw-r--r--include/linux/dma-attrs.h1
2 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
index b768cc0..811a5d4 100644
--- a/Documentation/DMA-attributes.txt
+++ b/Documentation/DMA-attributes.txt
@@ -31,3 +31,13 @@ may be weakly ordered, that is that reads and writes may pass each other.
Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
those that do not will simply ignore the attribute and exhibit default
behavior.
+
+DMA_ATTR_WRITE_COMBINE
+----------------------
+
+DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
+buffered to improve performance.
+
+Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
+those that do not will simply ignore the attribute and exhibit default
+behavior.
diff --git a/include/linux/dma-attrs.h b/include/linux/dma-attrs.h
index 71ad34e..ada61e1 100644
--- a/include/linux/dma-attrs.h
+++ b/include/linux/dma-attrs.h
@@ -13,6 +13,7 @@
enum dma_attr {
DMA_ATTR_WRITE_BARRIER,
DMA_ATTR_WEAK_ORDERING,
+ DMA_ATTR_WRITE_COMBINE,
DMA_ATTR_MAX,
};
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